TISP4A250H3BJR-S [BOURNS]

Silicon Surge Protector, 125V V(BO) Max, 60A, ROHS COMPLIANT, SMB, 2 PIN;
TISP4A250H3BJR-S
型号: TISP4A250H3BJR-S
厂家: BOURNS ELECTRONIC SOLUTIONS    BOURNS ELECTRONIC SOLUTIONS
描述:

Silicon Surge Protector, 125V V(BO) Max, 60A, ROHS COMPLIANT, SMB, 2 PIN

触发装置 硅浪涌保护器 光电二极管
文件: 总8页 (文件大小:530K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
TISP4A250H3BJ  
ASYMMETRICAL-BIDIRECTIONAL THYRISTOR  
OVERVOLTAGE PROTECTOR  
TISP4A250H3BJ Overvoltage Protector  
RING Line Protection for:  
— LCAS (Line Card Access Switch) such as Le75181,  
Le75183 and Le75282  
SMB Package (Top View)  
Voltages Optimized for:  
— Battery-Backed Ringing Circuits  
1
2
(Ring)  
(Ground)  
Maximum Ringing a.c..................................................104 Vrms  
Maximum Battery Voltage................................................. -52 V  
Terminal typical application names  
shown in parenthesis  
VDRM  
V
V(BO)  
V
MD-SMB-006-a  
Device Name  
Device Symbol  
+100  
-200  
+125  
-250  
TISP4A250H3BJ  
(Ring)  
Rated for International Surge Wave Shapes  
IPPSM  
Wave Shape  
Standard  
A
2/10  
8/20  
GR-1089-CORE  
IEC 61000-4-5  
TIA-968-A  
500  
300  
250  
200  
160  
100  
10/160  
10/700  
10/560  
10/1000  
(Ground)  
ITU-T K.20/21/45  
TIA-968-A  
SD-TISP4A-001-a  
GR-1089-CORE  
..........................................UL Recognized Component  
How To Order  
Device  
Package  
Carrier  
Embossed Tape Reeled  
Order As  
Marking Code  
Standard Quantity  
TISP4A250H3BJ  
SMB  
TISP4A250H3BJR-S  
4A250H  
3000  
Description  
The TISP4A250H3BJ is an asymmetrical bidirectional overvoltage protector. It is designed to limit the peak voltages on the Ring line  
terminal of the LCAS (Line Card Access Switch) such as Le75181, Le75183 and Le75282. The TISP4A250H3BJ must be connected  
with bar-indexed terminal 1 to the protective Ground, and terminal 2 to the Ring conductor.  
The TISP4A250H3BJ voltages are chosen to give adequate LCAS ring line terminal protection for all switch conditions. The most  
potentially stressful condition is low level power cross when the LCAS switches are closed. Under this condition, the TISP4A250H3BJ  
limits the voltage and corresponding LCAS dissipation until the LCAS thermal trip operates and opens the switches.  
Under open-circuit ringing conditions, the line Ring conductor will have high peak voltages. For battery backed ringing, the Ring  
conductor will have a larger peak negative voltage than positive, i.e. the peak voltages are asymmetric. The TISP4A250H3BJ has a  
similar voltage asymmetry and will allow the maximum possible ringing voltage, while giving the most effective protection. On a connected  
line, the Tip conductor will have much smaller voltage levels than the open-circuit Ring conductor values. Here a TISP4xxxH3BJ series  
symmetrical voltage protector gives adequate protection.  
Overvoltages are initially clipped by breakdown clamping. If sufficient current is available from the overvoltage, the breakdown voltage  
will rise to the breakover level, which causes the device to switch into a low-voltage on-state condition. This switching action removes  
the high voltage stress from the following circuitry and causes the current resulting from the overvoltage to be safely diverted through the  
protector. The high holding (switch off) current prevents d.c. latchup as the diverted current subsides.  
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex  
NOVEMBER 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP4A250H3BJ Overvoltage Protector  
Absolute Maximum Ratings, TA = 25 °C (Unless Otherwise Noted)  
Rating  
Repetitive peak off-state voltage (see Note 1)  
Symbol  
Value  
Unit  
+100  
-200  
VDRM  
V
Non-repetitive peak impulse current (see Notes 2 and 3)  
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)  
500  
300  
250  
200  
200  
160  
100  
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 µs current combination wave generator)  
10/160 µs (TIA-968-A, 10/160 µs voltage wave shape)  
5/310 µs (ITU-T K.44, 10/700 µs voltage wave shape used in K.20/21/45)  
5/320 µs (TIA-968-A, 9/720 µs voltage wave shape)  
IPPSM  
A
10/560 µs (TIA-968-A, 10/560 µs voltage wave shape)  
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)  
Non-repetitive peak on-state current (see Notes 2, 3 and 4)  
55  
60  
20 ms, 50 Hz (full sine wave)  
16.7 ms, 60 Hz (full sine wave)  
1000 s, 50 Hz or 60 Hz a.c.  
ITSM  
A
2.2  
Initial rate of rise of on-state currrent, exponential current ramp. Maximum ramp value < 200 A  
Junction temperature  
Storage temperature range  
di T/dt  
TJ  
T
stg  
400  
A/µs  
-40 to +150 °C  
-65 to +150 °C  
NOTES: 1. See Figure 6 for voltages at other temperatures.  
2. Initially the device must be in thermal equilibrium with TJ = 25 °C.  
3. The surge may be repeated after the device returns to its initial conditions.  
4. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring  
track widths. See Figure 5 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient temperatures  
above 25 °C.  
Overload Ratings, TA = 25 °C (Unless Otherwise Noted)  
Rating  
Symbol Value  
Unit  
Maximum overload on-state current without open circuit, 50 Hz or 60 Hz a.c. (see note 5)  
0.03 s  
0.07 s  
1.6 s  
60  
40  
IT(OV)M  
A rms  
8
5.0 s  
7
1000 s  
2.2  
NOTE: 5. Peak overload on-state current during a.c. power cross tests of GR-1089-CORE and UL 1950/60950. These electrical stress levels  
may damage the TISP4A250H3BJ silicon die. After test, the pass criterion is either that the device is functional or, if it is faulty, that  
it has a short-circuit fault mode. In the short-circuit fault mode, the following equipment is protected as the device is a permanent  
short across the line. The equipment would be unprotected if an open-circuit fault mode developed.  
NOVEMBER 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP4A250H3BJ Overvoltage Protector  
Electrical Characteristics, TA = 25 °C (Unless Otherwise Noted)  
Parameter  
Test Conditions  
Min Typ Max Unit  
TA = 25 °C  
TA = 85 °C  
±5  
µA  
IDRM  
Repetitive peak off-state current  
V D = VDRM  
±±1  
+±25  
V
V(BO)  
Breakover voltage  
dv/dt = ±251 V/ms, R SOURCE = 311 Ω  
-251  
I(BO)  
VT  
Breakover current  
On-state voltage  
Holding current  
dv/dt = ±251 V/ms, R SOURCE = 311 Ω  
IT = ±5 A, tw = ±11 µs  
±±51  
±611 mA  
±3  
V
IH  
IT = ±5 A, di/dt = ±31 mA/ms  
±±51  
±5  
±611 mA  
Critical rate of rise of  
off-state voltage  
Linear voltage ramp  
Maximum ramp value < 1.85VDRM  
dv/dt  
CO  
kV/µs  
Off-state capacitance  
f = ± MHz, V d = ± V rms  
VD = 2 V  
72  
pF  
Thermal Characteristics, TA = 25 °C (Unless Otherwise Noted)  
Parameter  
Test Conditions  
Min Typ Max Unit  
EIA/JESD5±-3 PCB, IT = ITSM(±111)  
(see Note 6)  
±±3  
°C/W  
R
Junction to ambien t thermal resistance  
JA  
265 mm x 2±1 mm populated line card,  
4-layer PCB, IT = ITSM(±111)  
51  
NOTE: 6. EIA/JESD5±-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.  
NOVEMBER 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP4A250H3BJ Overvoltage Protector  
Parameter Measurement Information  
+i  
IPPSM  
Quadrant I  
Switching  
Characteristic  
ITSM  
ITRM  
IT  
V(BO)  
VT  
I(BO)  
IH  
V(BR)  
I(BR)  
V(BR)M  
IDRM  
VDRM  
VD  
ID  
+v  
-v  
ID  
VD  
VDRM  
I(BR)  
V(BR)  
IDRM  
V(BR)M  
IH  
I(BO)  
VT  
V(BO)  
IT  
ITRM  
ITSM  
Quadrant III  
Switching  
Characteristic  
IPPSM  
PM-TISP4Axxx-112-a  
-i  
Figure 1. Voltage-Current Characteristic for the Ring and Ground Terminals  
All Measurements are Referenced to the Ground Terminal  
NOVEMBER 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP4A250H3BJ Overvoltage Protector  
Typical Characteristics  
OFF-STATE CURRENT  
vs  
JUNCTION TEMPERATURE  
NORMALIZED BREAKOVER VOLTAGE  
vs  
JUNCTION TEMPERATURE  
TCHAG  
TC4HAF  
100  
1.10  
1.05  
1.00  
0.95  
VD  
= 50 V  
10  
1
0·1  
0·01  
0·001  
-25  
0
25  
50  
75  
100 125 150  
-25  
0
25  
50  
75  
100 125 150  
TJ - Junction Temperature - °C  
TJ - Junction Temperature - °C  
Figure 2.  
Figure 3.  
NORMALIZED HOLDING CURRENT  
vs  
JUNCTION TEMPERATURE  
TC4HAD  
2.0  
1.5  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
-25  
0
25  
50  
75  
100 125 150  
TJ - Junction Temperature - °C  
Figure 4.  
NOVEMBER 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP4A250H3BJ Overvoltage Protector  
Rating and Thermal Information  
VDRM DERATING FACTOR  
NON-REPETITIVE PEAK ON-STATE CURRENT  
vs  
vs  
CURRENT DURATION  
MINIMUM AMBIENT TEMPERATURE  
TI4HAC  
TI4HADC  
30  
1.00  
0.99  
0.98  
0.97  
0.96  
0.95  
0.94  
0.93  
VGEN = 600 Vrms, 50/60 Hz  
RGEN = 1.4*VGEN/ITSM(t)  
20  
15  
EIA/JESD51-2 ENVIRONMENT  
EIA/JESD51-3 PCB  
TA = 25 °C  
10  
9
8
7
6
5
4
3
2
1.5  
0·1  
1
10  
100  
1000  
-40 -35 -30 -25 -20 -15 -10 -5  
0
5
10 15 20 25  
TAMIN - Minimum Ambient Temperature - °C  
Figure 6.  
t - Current Duration - s  
Figure 5.  
NOVEMBER 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
TISP4A250H3BJ Overvoltage Protector  
Applications Information  
ATEST±  
ARINGING±  
SW SW  
SW  
Tip±  
ALINE±  
ASLIC±  
FGND±  
BSLIC±  
Tip  
B1250T  
Telefuse™  
TISP4125H3BJ  
Ground  
Ground  
TISP4A250H3BJ  
Ring  
BLINE±  
Ring±  
SW  
B1250T  
SW SW  
Telefuse™  
BRINGING±  
BTEST±  
Battery  
Monitor  
Le79232  
Dual SLIC  
VBH  
ATEST2  
ARINGING2  
SW  
SW  
SW  
ALINE2  
Tip2  
ASLIC2  
FGND2  
BSLIC2  
Tip  
B1250T  
Telefuse™  
TISP4125H3BJ  
Ground  
Ground  
Le75282  
Dual LCAS  
TISP4A250H3BJ  
Ring  
BLINE2  
Ring2  
SW  
B1250T  
Telefuse™  
SW SW  
P±'  
P2'  
BRINGING2  
Switch  
Control  
Logic  
Latch  
P3'  
LD±  
BTEST2  
LD2  
TSD±  
TSD2  
OFF±  
OFF2  
AI-TISP4A-11±-a  
Figure 7. Typical Application Circuit  
NOVEMBER 2006 - REVISED MAY 2007  
Specifications are subject to change without notice.  
Customers should verify actual device performance in their specific applications.  
Bourns Sales Offices  
Region  
Phone  
Fax  
The Americas:  
Europe:  
+1-951-781-5500  
+41-41-7685555  
+886-2-25624117  
+1-951-781-5700  
+41-41-7685510  
+886-2-25624116  
Asia-Pacific:  
Technical Assistance  
Region  
Phone  
Fax  
The Americas:  
Europe:  
+1-951-781-5500  
+41-41-7685555  
+886-2-25624117  
+1-951-781-5700  
+41-41-7685510  
+886-2-25624116  
Asia-Pacific:  
www.bourns.com  
Bourns® products are available through an extensive network of manufacturer’s representatives, agents and distributors.  
To obtain technical applications assistance, a quotation, or to place an order, contact a Bourns representative in your area.  
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.  
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.  
COPYRIGHT© 2007, BOURNS, INC. LITHO IN U.S.A. e 05/07 TSP0705  

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