TISP4A265H3BJR-S [BOURNS]
Silicon Surge Protector, 125V V(BO) Max, 60A, DO-214AA, ROHS COMPLIANT, PLASTIC, SMBJ, 2 PIN;
| 型号： | TISP4A265H3BJR-S |
| 厂家： | 
BOURNS ELECTRONIC SOLUTIONS |
| 描述： | Silicon Surge Protector, 125V V(BO) Max, 60A, DO-214AA, ROHS COMPLIANT, PLASTIC, SMBJ, 2 PIN 光电二极管 |
| 文件： | 总8页 (文件大小：270K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TISP4A265H3BJ
T
N
A
I
L
P
M
O
C
S
H
o
R
*
ASYMMETRICAL BIDIRECTIONAL THYRISTOR SPD
TISP4A265H3BJ LCAS RLINE Protector
RING Line Protection for:
-LCAS (Line Card Access Switch)
-ADSL Interfaces
SMB Package (Top View)
Voltages Optimized for:
-Battery-Backed Ringing Circuits
1
2
MT2
MT1
Maximum Ringing a.c. .......................................... 90 V rms
Maximum Battery Voltage .......................................... -52 V
-ADSL Voltage ......................................................... ±23 V peak
-Minimum Ambient Temperature ...................................... 0 °C
MD4A265
VDRM
V(BO)
Device Symbol
Device
V
V
MT2
MT1
+100
-200
+125
-265
‘4A265
Rated for International Surge Wave Shapes
ITSP
Wave Shape
Standard
A
SD4XAN
2/10 µs
8/20 µs
GR-1089-CORE
IEC 61000-4-5
TIA/EIA-IS-968
ITU-T K.20/45/21
TIA/EIA-IS-968
GR-1089-CORE
500
300
250
200
160
100
10/160 µs
10/700 µs
10/560 µs
10/1000 µs
............................................... UL Recognized Component
Description
The TISP4A265H3BJ is an asymmetrical bidirectional overvoltage protector. It is designed to limit the peak voltages on the ring line terminal of
the ‘7581/2/3 LCAS (Line Card Access Switches). The TISP4A265H3BJ must be connected with bar-indexed terminal 1, MT1, to the protective
ground and terminal 2, MT2, to the ring conductor.
The TISP4A265H3BJ voltages are chosen to give adequate LCAS ring line terminal protection for all switch conditions. The most potentially
stressful condition is low level power cross when the LCAS switches are closed. Under this condition, the TISP4A265H3BJ limits the voltage
and corresponding LCAS dissipation until the LCAS thermal trip operates and opens the switches.
Under open-circuit ringing conditions, the line ring conductor will have high peak voltages. For battery backed ringing, the ring conductor will
have a larger peak negative voltage than positive, i.e. the peak voltages are asymmetric. The TISP4A265H3BJ has a similar voltage asymmetry
and will allow the maximum possible ringing voltage, while giving the most effective protection. On a connected line, the tip conductor will
have much smaller voltage levels than the open-circuit ring conductor values. Here a TISP4xxxH3BJ series, symmetrical voltage protector
gives adequate protection.
Overvoltages are initially clipped by breakdown clamping. If sufficient current is available from the overvoltage, the breakdown voltage will rise
to the breakover level, which causes the device to switch into a low-voltage on-state condition. This switching action removes the high voltage
stress from the following circuitry and causes the current resulting from the overvoltage to be safely diverted through the protector. The high
holding (switch off) current helps prevent d.c. latchup as the diverted current subsides.
How to Order
Device
Package
Carrier
Order As
TISP4A265H3BJ
BJ (J-Bend DO-214AA/SMB)
R (Embossed Tape Reeled)
TISP4A265H3BJR-S
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A265H3BJ LCAS RLINE Protector
Description (Continued)
The TISP4A265H3BJ is guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. This high (H)
current protection device is in a plastic SMBJ package (JEDEC DO-214AA with J-bend leads) and supplied in embossed carrier reel pack. For
alternative voltage and holding current values, consult the factory.
Absolute Maximum Ratings, T = 25 °C (Unless Otherwise Noted)
A
Rating
Repetitive peak off-state voltage, (see Note 1)
Symbol
Value
+100
-200
Unit
VDRM
V
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
8/20 µs (IEC 61000-4-5, 1.2/50 µs voltage, 8/20 current combination wave generator)
10/160 µs (TIA/EIA-IS-968 (Replaces FCC Part 68), 10/160 µs voltage wave shape)
5/310 µs (ITU-T K.44, 10/700 µs voltage wave shape used in K.20/45/21)
5/320 µs (TIA/EIA-IS-968 (Replaces FCC Part 68), 9/720 µs voltage wave shape)
10/560 µs (TIA/EIA-IS-968 (Replaces FCC Part 68), 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
500
300
250
200
200
160
100
ITSP
A
55
60
16.7 ms (60 Hz) full sine wave
ITSM
A
1000 s 50 Hz/60 Hz a.c.
2.2
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A
Junction temperature
diT/dt
TJ
400
A/µs
°C
-40 to +150
-65 to +150
Storage temperature range
T
°C
stg
NOTES: 1. See Figure 7 for voltage values at other temperatures.
2. Initially, the TISP4A265H3BJ must be in thermal equilibrium with TJ = 25 °C.
3. The surge may be repeated after the TISP4A265H3BJ returns to its initial conditions.
4. See Figure 8 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 6 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient
temperatures above 25 °C.
Overload Ratings, T = 25 °C (Unless Otherwise Noted)
A
Rating
Symbol
Value
Unit
Maximum overload on-state current without open circuit, 50 Hz/60 Hz a.c. (see Note 6)
0.03 s
0.07 s
1.6 s
60
40
8
IT(OV)M
A rms
5.0 s
7
1000 s
2.2
NOTE 6: Peak overload on-state current during a.c. power cross tests of GR-1089-CORE and UL 1950/60950. These electrical stress
levels may damage the TISP4A265H3BJ silicon chip. After test, the pass criterion is either that the device is functional or, if it is
faulty, that it has a short circuit fault mode. In the short circuit fault mode, the following equipment is protected as the device is a
permanent short across the line. The equipment would be unprotected if an open circuit fault mode developed.
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A265H3BJ LCAS RLINE Protector
Electrical Characteristics, T = 25 °C (Unless Otherwise Noted)
A
Parameter
Test Conditions
Min
Typ
Max
±5
Unit
Repetitive peak off-
state current
TA = 25 °C
TA = 85 °C
IDRM
VD = +100 V and -200 V
µA
±10
+125
-265
±0.6
±0.6
V(BO) Breakover voltage
I(BO) Breakover current
dv/dt = ±250 V/ms, R SOURCE = 300 Ω
V
dv/dt = ±250 V/ms, R SOURCE = 300 Ω
IT = ±5 A, di/dt = +/-30 mA/ms
±0.15
±0.15
A
A
IH
dv/dt
ID
Holding current
Critical rate of rise of
off-state voltage
Linear voltage ramp, Maximum ramp value < 0.85VDRM
±5
kV/µs
µA
Off-state current
VD = ±50 V
TA = 85 °C
±10
30
36
54
62
72
79
86
79
69
57
48
31
24
V
D = 98 V
25
30
45
52
60
65
71
65
58
48
40
26
20
VD = 50 V
VD = 10 V
VD = 5 V
VD = 2 V
VD = 1 V
VD = 0
Coff Off-state capacitance
f = 1 MHz, V d = 1 V rms, (see Note 7)
pF
VD = -1 V
VD = -2 V
VD = -5 V
VD = -10 V
VD = -50 V
VD = -100 V
.
To avoid possible voltage clipping, the TISP4A265H3BJ is tested with VD = +98 V in the positive polarity.
NOTE 7:
Thermal Characteristics
Parameter
Test Conditions
EIA/JESD51-3 PCB, IT = ITSM(1000)
TA = 25 °C, (see Note 8)
Min
Typ
Max
Unit
,
113
RΘJA Junction to free air thermal resistance
°C/W
265 mm x 210 mm populated line card,
4-layer PCB, IT = ITSM(1000), T = 25 °C
50
A
NOTE 8: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A265H3BJ LCAS RLINE Protector
Parameter Measurement Information
+i
Quadrant I
IPPSM
Switching
Characteristic
ITSM
V(BO)
I(BO)
IH
IDRM
VDRM
VD
ID
+v
-v
VD
ID
VDRM
IDRM
IH
I(BO)
V(BO)
ITSM
I
Quadrant III
IPPSM
Switching
Characteristic
-i
PMXXAEA
Figure 1. Voltage-Current Characteristic for MT1 and MT2 Terminals
All Measurements are Referenced to the MT1 Terminal
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A265H3BJ LCAS RLINE Protector
Typical Characteristics
NORMALIZED BREAKOVER VOLTAGE
OFF-STATE CURRENT
vs
vs
JUNCTION TEMPERATURE
JUNCTION TEMPERATURE
TC4HAF
TCHAG
1.10
1.05
1.00
0.95
100
VD = ±50 V
10
1
0·1
0·01
°C
0·001
-25
0
25
50
75
100
125
150
-25
0
25
50
75
100 125 150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 3.
Figure 2.
ON-STATE CURRENT
vs
NORMALIZED HOLDING CURRENT
vs
JUNCTION TEMPERATURE
ON-STATE VOLTAGE
TC4HAD
TC4HACBA
2.0
1.5
200
150
TA = 25 °C
tW = 100 µs
100
70
50
40
30
1.0
0.9
20
15
0.8
0.7
10
7
5
4
3
0.6
0.5
2
1.5
0.4
1
0.7
-25
0
25
50
75
100
125 150
1
1.5
2
3
4
5
7
10
TJ - Junction Temperature - °C
VT - On-State Voltage - V
Figure 4.
Figure 5.
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A265H3BJ LCAS RLINE Protector
Rating and Thermal Information
NON-REPETITIVE PEAKON-STATE CURRENT
vs
CURRENT DURATION
TI4HAC
30
VGEN = 600 Vrms, 50/60 Hz
GEN = 1.4*VGEN/ITSM(t)
R
20
15
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
10
9
8
7
6
5
4
3
2
1.5
0·1
1
10
100
1000
t - Current Duration - s
Figure 6.
VDRM DERATING FACTOR
IMPULSE RATING
vs
vs
MINIMUM AMBIENT TEMPERATURE
AMBIENT TEMPERATURE
TI4HADC
TC4HAA
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
700
600
BELLCORE 2/10
500
400
IEC 1.2/50, 8/20
300
250
FCC 10/160
ITU-T 10/700
FCC 10/560
200
150
120
BELLCORE 10/1000
100
90
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
-40 -35 -30 -25 -20 -15 -10 -5
0
5
10 15 20 25
TA - Ambient Temperature - °C
TAMIN - Minimum Ambient Temperature - °C
Figure 7.
Figure 8.
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A265H3BJ LCAS RLINE Protector
Typical Circuits
SW1
Break
switch
LCAS
'7581
TISP4125H3BJ
(Th1)
+23 V, -64 V
SLIC
)
(VTIP
TIP
TBAT
FGND
TLINE
F1
SW3
Ring
return
switch
Th1
1.25 A
Surge
Low
pass
filter
Le7555
withstand
SW2
Break
switch
VBAT
e.g. SMP 1.25
Th2
F2
RING
RBAT
RLINE
+97 V, -193 V
TISP4A265H3BJ
(Th2)
SW4
Ringing
access
switch
)
(VRING
Vbat
±23 V
)
(V
ADSL
RRING
TRING
R2
C1
R1
+74 V, -170 V
High
pass
filter
ADSL
MODEM
)
(VGEN
86 V rms
(VRING
)
-48 V
)
(VBAT
AI4A265A
Ring
generator
Figure 9. Integrated Voice Data (IVD) System with Typical Operating Voltage Levels Indicated
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A265H3BJ LCAS RLINE Protector
MECHANICAL DATA
Recommended Printed Wiring Land Pattern Dimensions
2.54
(.100)
SMB Land Pattern
2.40
(.095)
2.16
(.085)
MILLIMETERS
(INCHES)
DIMENSIONS ARE:
MDXX BID
Device Symbolization Code
Devices will be coded as below. Terminal 1 is indicated by an adjacent bar marked on the package body.
Symbolization
Device
Code
TISP4A265H3BJ
4A265H
Carrier Information
For production quantities, the carrier will be embossed tape reel pack. Evaluation quantities may be shipped in bulk pack or embossed tape.
Package
Carrier
Standard Quantity
SMB
Embossed Tape Reel Pack
3000
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
JANUARY 2002 - REVISED MAY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
相关型号：
TISP4A270H3BJRS
217V, 60A, SILICON SURGE PROTECTOR, DO-214AA, LEAD FREE, PLASTIC, SMB02, 2 PIN
BOURNS
©2020 ICPDF网 联系我们和版权申明