TISP4115H3LM-S [BOURNS]
Silicon Surge Protector, 115V V(BO) Max, 2.3A, DO-92, ROHS COMPLIANT, PLASTIC, LM PACKAGE-3;
| 型号： | TISP4115H3LM-S |
| 厂家： | 
BOURNS ELECTRONIC SOLUTIONS |
| 描述： | Silicon Surge Protector, 115V V(BO) Max, 2.3A, DO-92, ROHS COMPLIANT, PLASTIC, LM PACKAGE-3 |
| 文件： | 总13页 (文件大小：493K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
The TISP4xxxH3LM Series is currently
available, although not recommended
for new designs.
TISP4070H3LM THRU TISP4115H3LM,
TISP4125H3LM THRU TISP4220H3LM,
TISP4240H3LM THRU TISP4400H3LM
BIDIRECTIONAL THYRISTOR OVERVOLTAGE PROTECTORS
TISP4xxxH3LM Overvoltage Protector Series
TISP4xxxH3LM Overview
This TISP® device series protects central office, access and customer premise equipment against overvoltages on the telecom line. The
TISP4xxxH3LM is available in a wide range of voltages and has a high current capability, allowing minimal series resistance to be used.
These protectors have been specified mindful of the following standards and recommendations: GR-1089-CORE, FCC Part 68, UL1950, EN
60950, IEC 60950, ITU-T K.20, K.21 and K.45. The TISP4350H3LM meets the FCC Part 68 “B” ringer voltage requirement and survives the
Type A and B impulse tests. These devices are housed in a through-hole DO-92 package (TO-92 package with cropped center leg).
Summary Electrical Characteristics
V
V
V @ I
T
I
I
I
I
H
C @ -2 V
o
Functionally
Replaces
DRM
V
(BO)
V
T
DRM
A
(BO)
T
Part #
V
3
3
3
3
3
3
3
3
mA
600
600
600
600
600
600
600
600
A
5
5
5
5
5
5
5
5
mA
150
150
150
150
150
150
150
150
pF
120
120
120
120
65
TISP4070H3
TISP4080H3
TISP4095H3
TISP4115H3
TISP4125H3
TISP4145H3
TISP4165H3
TISP4180H3
58
65
75
90
70
80
5
5
5
5
5
5
5
5
P0640EC†
P0720EC†
P0900EC†
P1100EC†
95
115
125
145
165
180
100
120
135
145
65
P1300EC†
65
65
P1500EC
P1800EC
TISP4220H3
TISP4240H3
TISP4250H3
TISP4260H3
TISP4290H3
TISP4300H3
TISP4350H3
TISP4395H3
TISP4400H3
160
180
190
200
220
230
275
320
300
220
240
250
260
290
300
350
395
400
3
3
3
3
3
3
3
3
3
5
5
5
5
5
5
5
5
5
600
600
600
600
600
600
600
600
600
5
5
5
5
5
5
5
5
5
150
150
150
150
150
150
150
150
150
65
55
55
55
55
55
55
55
55
P2300EC†
P2600EC†
P3100EC
P3500EC†
† Bourns part has an improved protection voltage
Summary Current Ratings
Parameter
I
I
di/dt
A/μs
TSP
A
TSM
A
Waveshape
Value
2/10
500
1.2/50, 8/20
300
10/160
250
5/320
200
10/560
160
10/1000
100
1 cycle 60 Hz 2/10 Wavefront
60 400
NOVEMBER 1997 - REVISED JANUARY 2010
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex.
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
ITU-T K.20/21 Rating............................ 8 kV 10/700, 100 A 5/310
LM Package (Top View)
Ion-Implanted Breakdown Region
Precise and Stable Voltage
T(A)
NC
R(B)
1
2
3
Low Voltage Overshoot under Surge
V
V
(BO)
DRM
Device
MD4XAT
V
V
NC - No internal connection on pin 2
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
58
70
65
80
75
95
LMF Package (LM Package with Formed Leads) (Top View)
90
115
125
145
165
180
100
120
135
145
T(A)
1
2
3
NC
R(B)
MD4XAKB
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
160
180
190
200
220
230
275
320
300
220
240
250
260
290
300
350
395
400
NC - No internal connection on pin 2
Device Symbol
T
Rated for International Surge Wave Shapes
I
TSP
A
Waveshape
Standard
R
SD4XAA
2/10 µs
8/20 µs
GR-1089-CORE
IEC 61000-4-5
FCC Part 68
500
300
250
200
160
100
Terminals T and R correspond to the
alternative line designators of A and B
10/160 µs
10/700 µs
10/560 µs
10/1000 µs
ITU-T K.20/21
FCC Part 68
Low Differential Capacitance......................................80 pF max.
................................................UL Recognized Component
GR-1089-CORE
Description
These devices are designed to limit overvoltages on the telephone line. Overvoltages are normally caused by a.c. power system or lightning
flash disturbances which are induced or conducted on to the telephone line. A single device provides 2-point protection and is typically used
for the protection of 2-wire telecommunication equipment (e.g. between the Ring and Tip wires for telephones and modems). Combinations
of devices can be used for multi-point protection (e.g. 3-point protection between Ring, Tip and Ground).
The protector consists of a symmetrical voltage-triggered bidirectional thyristor. Overvoltages are initially clipped by breakdown clamping
until the voltage rises to the breakover level, which causes the device to crowbar into a low-voltage on state. This low-voltage on state
causes the current resulting from the overvoltage to be safely diverted through the device. The high crowbar holding current prevents d.c.
latchup as the diverted current subsides.
How to Order
Order As
Device
Package
Carrier
Bulk Pack
TISP4xxxH3LM-S
TISP4xxxH3LMR-S
TISP4xxxH3LMFR-S
Straight Lead DO-92 (LM)
TISP4xxxH3LM
Tape and Reeled
Formed Lead DO-92 (LMF) Tape and Reeled
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Insert xxx value corresponding to protection voltages of 070, 080, 095, 115 etc.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
Description (Continued)
This TISP4xxxH3LM range consists of seventeen voltage variants to meet various maximum system voltage levels (58 V to 320 V). They are
guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. These protection devices are supplied
in a DO-92 (LM) cylindrical plastic package. The TISP4xxxH3LM is a straight lead DO-92 supplied in bulk pack and on tape and reel. The
TISP4xxxH3LMF is a formed lead DO-92 supplied only on tape and reel. For lower rated impulse currents in the DO-92 package, the 50 A
10/1000 TISP4xxxM3LM series is available.
Absolute Maximum Ratings, T = 25 °C (Unless Otherwise Noted)
A
Rating
Symbol
Value
± 58
± 65
± 75
± 90
Unit
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
±100
±120
±135
±145
±160
±180
±190
±200
±220
±230
±275
±320
±300
Repetitive peak off-state voltage, (see Note 1)
V
V
DRM
Non-repetitive peak on-state pulse current (see Notes 2, 3 and 4)
2/10 µs (GR-1089-CORE, 2/10 µs voltage wave shape)
500
300
250
220
200
200
200
200
160
100
8/20 µs (IEC 61000-4-5, combination wave generator, 1.2/50 voltage, 8/20 current)
10/160 µs (FCC Part 68, 10/160 µs voltage wave shape)
5/200 µs (VDE 0433, 10/700 µs voltage wave shape)
0.2/310 µs (I 31-24, 0.5/700 µs voltage wave shape)
5/310 µs (ITU-T K20/21, 10/700 µs voltage wave shape)
5/310 µs (FTZ R12, 10/700 µs voltage wave shape)
5/320 µs (FCC Part 68, 9/720 µs voltage wave shape)
10/560 µs (FCC Part 68, 10/560 µs voltage wave shape)
10/1000 µs (GR-1089-CORE, 10/1000 µs voltage wave shape)
Non-repetitive peak on-state current (see Notes 2, 3 and 5)
20 ms (50 Hz) full sine wave
I
A
TSP
55
60
I
A
16.7 ms (60 Hz) full sine wave
TSM
2.3
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 100 A
Junction temperature
di /dt
400
A/µs
°C
T
T
-40 to +150
-65 to +150
J
Storage temperature range
T
°C
stg
NOTES: 1. See Applications Information and Figure 10 for voltage values at lower temperatures.
2. Initially, the TISP4xxxH3LM must be in thermal equilibrium with T = 25 °C.
J
3. The surge may be repeated after the TISP4xxxH3LM returns to its initial conditions.
4. See Applications Information and Figure 11 for current ratings at other temperatures.
5. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 8 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient
temperatures above 25 °C.
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LMOvervoltageProtectorSeries
Electrical Characteristics, T = 25 °C (Unless Otherwise Noted)
A
Parameter
Test Conditions
Min
Typ
Max
5
10
Unit
Repetitive peak off-
state current
T = 25 °C
A
I
V = V
D DRM
DRM
T = 85 °C
A
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
70
80
95
115
125
145
165
180
220
240
250
260
290
300
350
395
400
V
Breakover voltage
dv/dt = 750 V/ms,
R
=
V
(BO)
SOURCE
‘4070
‘4080
‘4095
‘4115
‘4125
‘4145
‘4165
‘4180
‘4220
‘4240
‘4250
‘4260
‘4290
‘4300
‘4350
‘4395
‘4400
78
88
103
124
134
154
174
189
230
250
261
271
301
311
362
408
413
0.6
dv/dt ≤ 1000
Maximum ramp value = 500 V
di/dt = 20 A
Maximum ramp value = 10 A
Linear voltage ramp,
Impulse breakover
voltage
V
V
(BO)
Linear current ramp,
I
Breakover current
On-state voltage
Holding current
dv/dt = 750 V/ms,
I = 5 A,t = 100
R
=
0.15
A
V
A
(BO)
SOURCE
V
3
T
T
W
I
I = 5 A,d i/dt = - /+30 mA/ms
T
0.15
5
0.6
H
Critical rate of rise of
off-state voltage
Off-state current
dv/dt
Linear voltage ramp, Maximum ramp value < 0.85V
kV
μA
DRM
I
V
=
50 V
T = 85 °C
10
D
D
A
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
Electrical Characteristics, T = 25 °C (Unless Otherwise Noted) (Continued)
A
Parameter
Test Conditions
= 1 V rms, V = 0,
Min
Typ
172
95
92
157
85
80
145
78
72
70
Max
218
120
115
200
110
100
185
100
90
Unit
f = 100 kHz,
f = 100 kHz,
f = 100 kHz,
f = 100 kHz,
V
V
V
V
V
4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4070 thru ‘4115
‘4125 thru ‘4220
‘4240 thru ‘4400
‘4125 thru ‘4220
‘4240 thru ‘4400
d
d
d
d
d
D
= 1 V rms, V = -1 V
D
= 1 V rms, V = -2 V
D
C
Off-state capacitance
pF
off
= 1 V rms, V = -50 V
90
43
35
33
D
33
28
25
22
f = 100 kHz,
(see Note 6)
= 1 V rms, V = -100 V
D
28
NOTE 6: To avoid possible voltage clipping, the ‘4125 is tested with V = -98 V.
D
Thermal Characteristics
Parameter
Test Conditions
EIA/JESD51-3 PCB, I = I
Min
Typ
Max
Unit
,
TSM(1000)
T
105
T = 25 °C, (see Note 7)
A
R
Junction to free air thermal resistance
°C/W
θJA
265 mm x 210 mm populated line card,
4-layer PCB, I = I , T = 25 °C
55
T
TSM(1000)
A
NOTE 7: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
Parameter Measurement Information
+i
Quadrant I
Switching
ITSP
Characteristic
ITSM
IT
V(BO)
VT
I(BO)
IH
IDRM
ID
VDRM
VD
+v
-v
ID
VD
VDRM
IDRM
IH
I(BO)
VT
V(BO)
IT
ITSM
Quadrant III
ITSP
Switching
Characteristic
-i
PMXXAAB
Figure 1. Voltage-current Characteristic for T and R Terminals
All Measurements are Referenced to the R Terminal
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
Typical Characteristics
NORMALIZED BREAKOVER VOLTAGE
OFF-STATE CURRENT
vs
JUNCTION TEMPERATURE
vs
JUNCTION TEMPERATURE
TC4HAF
TCHAS
1.10
102
VD = ±50 V
101
100
1.05
10-1
10-2
1.00
10-3
10-4
0.95
10-5
-25
0
25
50
75
100 125 150
-25
0
25
50
75
100
125
150
TJ - Junction Temperature - °C
TJ - Junction Temperature - °C
Figure 2.
Figure 3.
NORMALIZED HOLDING CURRENT
vs
ON-STATE CURRENT
vs
ON-STATE VOLTAGE
JUNCTION TEMPERATURE
TC4HAD
TC4HACB
2.0
1.5
200
150
TA = 25 °C
tW = 100 µs
100
70
50
40
30
1.0
0.9
20
15
0.8
0.7
'4125
THRU
'4220
10
7
5
4
3
0.6
0.5
'4070
THRU
'4115
'4240
THRU
'4400
2
1.5
0.4
1
0.7
-25
0
25
50
75
100 125 150
1
1.5
2
3
4
5
7
10
TJ - Junction Temperature - °C
VT - On-State Voltage - V
Figure 4.
Figure 5.
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
Typical Characteristics
DIFFERENTIAL OFF-STATE CAPACITANCE
vs
NORMALIZED CAPACITANCE
vs
RATED REPETITIVE PEAK OFF-STATE VOLTAGE
OFF-STATE VOLTAGE
TCHATB
TC4HAQA
90
85
80
75
70
65
60
55
50
45
40
1
0.9
TJ = 25 °C
Vd = 1 Vrms
0.8
0.7
0.6
0.5
C =Coff(-2 V) - Coff(-50 V)
'4070 THRU '4115
0.4
0.3
'4125 THRU '4220
'4240 THRU '4400
0.2
0.5
1
2
3
5
10
20 30 50
100150
50 60 70 80 90100
150
200 250 300
VDRM - Repetitive Peak Off-State Voltage - V
VD - Off-state Voltage - V
Figure 6.
Figure 7.
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
Rating and Thermal Information
THERMAL IMPEDANCE
vs
POWER DURATION
NON-REPETITIVE PEAK ON-STATE CURRENT
vs
CURRENT DURATION
TI4HAG
30
150
VGEN = 600 Vrms, 50/60 Hz
GEN = 1.4*VGEN/ITSM(t)
100
80
R
20
15
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
60
50
40
10
9
30
8
20
15
7
6
5
10
8
4
ITSM(t) APPLIED FOR TIME t
6
5
4
3
EIA/JESD51-2 ENVIRONMENT
EIA/JESD51-3 PCB
TA = 25 °C
2
3
1.5
2
0·1
1
10
100
1000
0·1
1
10
100
1000
t - Current Duration - s
t - Power Duration - s
Figure 8.
Figure 9.
V
IMPULSE RATING
vs
DRM DERATING FACTOR
vs
MINIMUM AMBIENT TEMPERATURE
AMBIENT TEMPERATURE
TC4HAA
TI4HAIA
700
600
1.00
0.99
0.98
0.97
0.96
0.95
0.94
0.93
BELLCORE 2/10
500
400
IEC 1.2/50, 8/20
300
250
FCC 10/160
ITU-T 10/700
FCC 10/560
'4070 THRU '4115
200
150
120
'4125 THRU '4220
BELLCORE 10/1000
100
90
'4240 THRU '4440
-40 -35 -30 -25 -20 -15 -10 -5
-40 -30 -20 -10
0
10 20 30 40 50 60 70 80
0
5
10 15 20 25
TA - Ambient Temperature - °C
TAMIN - Minimum Ambient Temperature - °C
Figure 10.
Figure 11.
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
APPLICATIONS INFORMATION
Deployment
These devices are two terminal overvoltage protectors. They may be used either singly to limit the voltage between two conductors
(Figure 12) or in multiples to limit the voltage at several points in a circuit (Figure 13).
Th3
Th1
Th1
Th2
Figure 12. Two Point Protection
Figure 13. Multi-point Protection
. This configuration is normally used to
In Figure 12, protector Th1 limits the maximum voltage between the two conductors to ±±
(BO)
protect circuits without a ground reference, such as modems. In Figure 13, protectors Th2 and Th3 limit the maximum voltage between each
conductor and ground to the ±± of the individual protector. Protector Th1 limits the maximum voltage between the two conductors to its
(BO)
±±
value. If the equipment being protected has all its vulnerable components connected between the conductors and ground, then
(BO)
protector Th1 is not required.
Impulse Testing
To verify the withstand capability and safety of the equipment, standards require that the equipment is tested with various impulse wave
forms. The table below shows some common values.
Voltage
Peak Voltage
Peak Current
Current
Waveform
µs
TISP4xxxH3
25 °C Rating
A
Series
Resistance
Ω
Standard
Setting
V
Value
A
Waveform
µs
2500
1000
1500
800
2/10
500
100
200
100
37.5
25
2/10
500
100
250
160
200
200
200
GR-1089-CORE
0
10/1000
10/160
10/560
9/720 †
9/720 †
0.5/700
10/1000
10/160
10/560
5/320 †
5/320 †
0.2/310
0
0
0
0
0
FCC Part 68
(March 1998)
1500
1000
1500
1500
4000
I3124
37.5
37.5
100
ITU-T K.20/K21
10/700
5/310
200
0
† FCC Part 68 terminology for the waveforms produced by the ITU-T recommendation K.21 10/700 impulse generator
If the impulse generator current exceeds the protector’s current rating, then a series resistance can be used to reduce the current to the
protector’s rated value to prevent possible failure. The required value of series resistance for a given waveform is given by the following
calculations. First, the minimum total circuit impedance is found by dividing the impulse generator’s peak voltage by the protector’s rated
current. The impulse generator’s fictive impedance (generator’s peak voltage divided by peak short circuit current) is then subtracted from the
minimum total circuit impedance to give the required value of series resistance. In some cases, the equipment will require verification over a
temperature range. By using the rated waveform values from Figure 11, the appropriate series resistor value can be calculated for ambient
temperatures in the range of -40 °C to 85 °C.
AC Power Testing
The protector can withstand currents applied for times not exceeding those shown in Figure 8. Currents that exceed these times must be
terminated or reduced to avoid protector failure. Fuses, PTC (Positive Temperature Coefficient) resistors and fusible resistors are overcurrent
protection devices which can be used to reduce the current flow. Protective fuses may range from a few hundred milliamperes to one am-
pere. In some cases, it may be necessary to add some extra series resistance to prevent the fuse opening during impulse testing. The current
versus time characteristic of the overcurrent protector must be below the line shown in Figure 8. In some cases, there may be a further time
limit imposed by the test standard (e.g. UL 1459 wiring simulator failure).
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
APPLICATIONS INFORMATION
Capacitance
The protector characteristic off-state capacitance values are given for d.c. bias voltage, V , values of 0, -1 V, -2 V and -50 V. Where possible,
D
values are also given for -100 V. Values for other voltages may be calculated by multiplying the V = 0 capacitance value by the factor given
D
in Figure 6. Up to 10 MHz, the capacitance is essentially independent of frequency. Above 10 MHz, the effective capacitance is strongly
dependent on connection inductance. In many applications, such as Figure 15 and Figure 17, the typical conductor bias voltages will be
about -2 V and -50 V. Figure 7 shows the differential (line unbalance) capacitance caused by biasing one protector at -2 V and the other at
-50 V.
Normal System Voltage Levels
The protector should not clip or limit the voltages that occur in normal system operation. For unusual conditions, such as ringing without the
line connected, some degree of clipping is permissible. Under this condition, about 10 V of clipping is normally possible without activating
the ring trip circuit.
Figure 10 allows the calculation of the protector V
maximum normal system voltages. The TISP4260H3LM, with a V
value at temperatures below 25 °C. The calculated value should not be less than the
DRM
of 200 V, can be used for the protection of ring generators producing
DRM
100 V rms of ring on a battery voltage of -58 V (Th2 and Th3 in Figure 17). The peak ring voltage will be 58 + 1.414*100 = 199.4 V. However,
this is the open circuit voltage and the connection of the line and its equipment will reduce the peak voltage. In the extreme case of an
unconnected line, clipping the peak voltage to 190 V should not activate the ring trip. This level of clipping would occur at the temperature
when the V
has reduced to 190/200 = 0.95 of its 25 °C value. Figure 10 shows that this condition will occur at an ambient temperature of
DRM
-28 °C. In this example, the TISP4260M3LM will allow normal equipment operation provided that the minimum expected ambient temperature
does not fall below -28 °C.
JESD51 Thermal Measurement Method
To standardize thermal measurements, the EIA (Electronic Industries Alliance) has created the JESD51 standard. Part 2 of the standard
3
3
(JESD51-2, 1995) describes the test environment. This is a 0.0283 m (1 ft ) cube which contains the test PCB (Printed Circuit Board)
horizontally mounted at the center. Part 3 of the standard (JESD51-3, 1996) defines two test PCBs for surface mount components; one for
packages smaller than 27 mm (1.06 ’’) on a side and the other for packages up to 48 mm (1.89 ’’). The LM package measurements used the
smaller 76.2 mm x 114.3 mm (3.0 ’’ x 4.5 ’’) PCB. The JESD51-3 PCBs are designed to have low effective thermal conductivity (high thermal
resistance) and represent a worse case condition. The PCBs used in the majority of applications will achieve lower values of thermal resis-
tance and so can dissipate higher power levels than indicated by the JESD51 values.
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
Typical Circuits
MODEM
TIP
TIP
WIRE
WIRE
FUSE
R1a
RING DETECTOR
HOOK SWITCH
D.C. SINK
Th3
Th2
PROTECTED
EQUIPMENT
Th1
E.G. LINE CARD
TISP4350
OR
TISP4400
SIGNAL
R1b
RING
WIRE
RING
WIRE
AI6XBK
AI6XBM
Figure 14. MODEM INTER-WIRE PROTECTION
Figure 15. PROTECTION MODULE
R1a
Th3
SIGNAL
Th1
Th2
R1b
AI6XBL
D.C.
Figure 16. ISDN PROTECTION
OVER-
CURRENT
PROTECTION
SLIC
PROTECTION
RING/TEST
PROTECTION
TEST
RELAY
RING
RELAY
SLIC
RELAY
TIP
WIRE
S3a
R1a
Th4
Th5
Th3
S1a
S2a
SLIC
Th1
Th2
R1b
RING
WIRE
S3b
TISP6xxxx,
TISPPBLx,
1/2TISP6NTP2
S1b
S2b
VBAT
C1
220 nF
TEST
EQUIP-
MENT
RING
GENERATOR
AI6XBJ
Figure 17. LINE CARD RING/TEST PROTECTION
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4xxxH3LM Overvoltage Protector Series
MECHANICAL DATA
Device Symbolization Code
Devices will be coded as below.
Symbolization
Device
Code
TISP4070H3LM
TISP4080H3LM
TISP4095H3LM
TISP4115H3LM
TISP4125H3LM
TISP4145H3LM
TISP4165H3LM
TISP4180H3LM
TISP4220H3LM
TISP4240H3LM
TISP4250H3LM
TISP4260H3LM
TISP4290H3LM
TISP4300H3LM
TISP4350H3LM
TISP4395H3LM
TISP4400H3LM
4070H3
4080H3
4095H3
4115H3
4125H3
4145H3
4165H3
4180H3
4220H3
4240H3
4250H3
4260H3
4290H3
4300H3
4350H3
4395H3
4400H3
Carrier Information
Devices are shipped in one of the carriers below. A reel contains 2,000 devices.
Package Type
Carrier
Order As
Straight Lead DO-92
Bulk Pack
TISP4xxxH3LM-S
TISP4xxxH3LMR-S
Straight Lead DO-92 Tape and Reeled
Formed Lead DO-92 Tape and Reeled
TISP4xxxH3LMFR-S
“TISP” is a trademark of Bourns, Ltd., a Bourns Company, and is Registered in U.S. Patent and Trademark Office.
“Bourns” is a registered trademark of Bourns, Inc. in the U.S. and other countries.
NOVEMBER 1997 - REVISED JANUARY 2010
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
相关型号：
TISP4115J1BJR-S
Silicon Surge Protector, 115V V(BO) Max, 100A, DO-214AA, ROHS COMPLIANT, SMB, 2 PIN
BOURNS
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