HDLS-2416 [AVAGO]
Four Character 5.0 mm (0.2 inch) Smart 5x7 Alphanumeric Displays; 四个字符5.0毫米（ 0.2英寸）智能5x7个字母数字显示器
| 型号： | HDLS-2416 |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | Four Character 5.0 mm (0.2 inch) Smart 5x7 Alphanumeric Displays |
| 文件： | 总12页 (文件大小：234K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HDLx-2416 Series
Four Character 5.0 mm (0.2 inch) Smart 5x7
Alphanumeric Displays
Data Sheet
Description
Features
These are 5.0 mm (0.2 inch) four character 5 x 7 dot matrix
displaysdrivenbyanon-boardCMOSIC.Thesedisplaysare
pin for pin compatible with the HPDL-2416. The IC stores
and decodes 7 bit ASCII data and displays it using a 5 x 7
font. Multiplexingcircuitry, anddriversarealsopartofthe
IC.TheIChasfastsetupandholdtimeswhichmakesiteasy
to interface to a microprocessor.
• Enhanced drop-in replacement to HPDL-2416
• Smart alphanumeric display
Built-in RAM, ASCII decoder, and LED drive circuitry
• CMOS IC for low power consumption
• Software controlled dimming levels and blank
• 128 ASCII character set
• End-stackable
• Categorized for luminous intensity; Yellow and Green
categorized for color
• Low power and sunlight viewable AlGaAs versions
• Wide operating temperature range
-40°C to +85°C
• Excellent ESD protection
• Wide viewing angle (50° typ.)
Absolute Maximum Ratings
Supply Voltage, VDD to Ground[1]
Input Voltage, Any Pin to Ground
Free Air Operating Temperature Range, TA
Storage Temperature, TS
-0.5 V to 7.0 V
-0.5 V to VDD + 0.5 V
-40°C to +85°C
-40°C to 100°C
+150°C
CMOS IC Junction Temperature, TJ (IC)
Relative Humidity (non-condensing) at 65°C
85%
Soldering Temperature [1.59 mm (0.063 in.) Below Body]
Solder Dipping
Wave Soldering
260°C for 5 secs
250°C for 3 secs
ESD Protection, R = 1.5 kΩ, C = 100 pF
VZ = 2 kV (each pin)
Note:
1. Maximum Voltage is with no LEDs illuminated.
Devices:
AlGaAs Red
HDLS-2416
HDLU-2416
High Efficiency Red
HDLO-2416
Orange
Yellow
Green
HDLA-2416
HDLY-2416
HDLG-2416
HDLG-2416-FG000
HDLO-2416-DE000
ESD WARNING: Standard CMOS handling precautions should be observed with the HDLX-2416.
The address and data inputs can be directly connected to
the microprocessor address and data buses.
The difference between the sunlight viewable HDLS-
2416 and the low power HDLU-2416 occurs at power-on
or at the default brightness level. Following power up,
the HDLS-2416 operates at the 100% brightness level,
while the HDLU-2416 operates at the 27% brightness
level. Power on sets the internal brightness control (bits
3-5) in the control register to binary code (000). For the
HDLS-2416 binary code (000) corresponds to a 100%
brightness level, and for the HDLU-2416 binary code (000)
corresponds to a 27% brightness level. The other seven
brightness levels are identical for both parts.
The HDLX-2416 has several enhancements over the HPDL-
2416. These features include an expanded character set,
internal 8 level dimming control, external dimming capa-
bility, and individual digit blanking. Finally, the extended
functions can be disabled which allows the HDLX-2416 to
operate exactly like an HPDL-2416 by disabling all of the
enhancements except the expanded character set.
Package Dimensions
25.15
(0.990)
0.38
(0.015)
REF.
3.05
(0.120)
0.25 0.13
TYP.
6.35
(0.250)
TYP.
(0.010 0.005)
10.03
(0.395)
15.24
(0.600)
10.16
(0.400)
5.08
(0.200)
REF.
20.07
(0.790)
IMAGE PLANE
PIN 1 IDENTIFIER
3.43
1.52
2.41
REF.
TYP.
(0.095)
(0.060)
(0.135)
PART NUMBER
DATE CODE (YEAR, WEEK)
LUMINOUS INTENSITY
COLOR BIN (3)
6.60
(0.260)
HDLX-2416
YYWW
X Z
4.06
(0.160)
REF.
NOTES:
1. UNLESS OTHERWISE SPECIFIED, THE TOLERANCE
ON ALL DIMENSIONS IS 0.254 mm ( 0.010).
0.51 0.13
(0.020 0.005)
TYP.
2. ALL DIMENSIONS ARE IN MILLIMETERS (INCHES).
3. FOR YELLOW AND GREEN DISPLAYS ONLY.
2.41
(0.095)
2.54
TYP.
(0.100)
Pin Numbering and Location
Pin No. Function
Pin No. Function
1
2
3
4
5
6
7
8
9
CE1 Chip Enable
10
11
12
13
14
15
16
17
18
GND
CE1
CE2
CLR
CUE
CU
WR
A1
BL
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
CE2 Chip Enable
CLR Cle ar
D0 Data Input
D1 Data Input
D2 Data Input
D3 Data Input
D6 Data Input
D5 Data Input
D4 Data Input
BL Display Blank
D4
D5
D6
D3
D2
D1
D0
CUE Cursor Enable
CU Cursor Select
WR Write
A0
VDD
A1 Address Input
A0 Address Input
VDD
GND
2
Character Set
D0
D1
D2
D3
0
0
0
0
0
1
0
0
0
1
0
1
0
0
2
1
1
0
0
3
0
0
1
0
4
1
0
1
0
5
0
1
1
0
6
1
1
1
0
7
0
0
0
1
8
1
0
0
1
9
0
1
0
1
A
1
1
0
1
B
0
0
1
1
C
1
0
1
1
D
0
1
1
1
E
1
1
1
1
F
ASCII
CODE
D6 D5 D4 HEX
0
0
0
0
1
0
0
1
0
0
1
1
0
1
2
3
1
1
0
0
0
1
4
5
1
1
1
1
0
1
6
7
NOTES: 1 = HIGH LEVEL
0 = LOW LEVEL
3
Recommended Operating Conditions
Parameter
Symbol
Min.
Typ.
Max.
Unit
Supply Voltage
VDD
4.5
5.0
5.5
V
Electrical Characteristics over Operating Temperature Range
4.5 < V < 5.5 V (unless otherwise specified)
DD
All Devices
[1]
25°C
Parameter
IDD Blank
Symbol
IDD (blnk)
II
Min.
Typ.
Max.
Max.
4.0
Units
mA
µA
Test Conditions
1.0
All Digits Blanked
Input Current
-40
10
VIN = 0 V to VDD
VDD = 5.0 V
Input Voltage High
Input Voltage Low
VIH
VIL
2.0
VDD
0.8
V
V
GND
HDLO/HDLA/HDLY/HDLG-2416
Parameter
[1]
25°C
Symbol
Min.
Typ.
Max.
Max.
Units
Test Conditions
IDD 4 digits
IDD(#)
110
135
160
mA
“#”ON in All
Four Locations
20 Dots/Character[2, 3]
IDD Cursor All
Dots ON @ 50%
IDD (CU)
92
110
135
mA
Cursor ON in All
Four Locations
HDLS/HDLU-2416
[1]
25°C
Part Number
HDLS-2416
HDLU-2416
HDLS-2416
HDLU-2416
Parameter
Symbol
Typ.
125
34
Max.
146
42
Max.
180
52
Units
Test Conditions
IDD 4 digits
20 dots/character[2,3]
IDD(#)
mA
Four “#”ON in All
Four Locations
IDD Cursor all dots
ON @ 50%
IDD(CU)
105
29
124
36
154
45
mA
Four Cursors ON in
All Four Locations
Notes:
1. V = 5.0 V.
DD
2. Average I measured at full brightness. Peak I = 28/15 x Average I (#).
DD
DD
DD
3. I (#) max. = 135 mA for HDLO/HDLA/HDLY/HDLG-2416, 146 mA for HDLS-2416, and 42 mA for HDLU-2416 at default brightness, 150°C IC
DD
junction temperature and V = 5.5 V.
DD
4
[1]
Optical Characteristics at 25°C
= 5.0 V at Full Brightness
V
DD
HDLS/HDLU-2416
Part Number
HDLS-2416
HDLU-2416
All
Parameter
Symbol
Min.
4.0
Typ.
12.7
3.1
Units Test Conditions
Average Luminous Intensity per
Digit, Character Average
IV
mcd
mcd
nm
‘’*’’Illuminated in All Four
Digits, 19 Dots ON per Digit
1.2
Peak Wavelength
lPEAK
ld
645
637
Dominant Wavelength[2]
nm
HDLO-2416
Parameter
Symbol
Min.
Typ.
Units
Test Conditions
Average Luminous Intensity per
Digit, Character Average
IV
1.2
3.5
mcd
‘’*’’Illuminated in All Four Digits.
19 Dots ON
Peak Wavelength
lPEAK
ld
635
626
nm
nm
Dominant Wavelength[2]
HDLA-2416
Parameter
Symbol
Min.
Typ.
Units
Test Conditions
Average Luminous Intensity per
Digit, Character Average
IV
1.2
3.5
mcd
‘’*’’Illuminated in All Four Digits.
19 Dots ON
Peak Wavelength
lPEAK
ld
600
602
nm
nm
Dominant Wavelength[2]
HDLY-2416
Parameter
Symbol
Min.
Typ.
Units
Test Conditions
Average Luminous Intensity per
Digit, Character Average
IV
1.2
3.7
mcd
‘’*’’Illuminated in All Four Digits.
19 Dots ON
Peak Wavelength
lPEAK
ld
583
585
nm
nm
Dominant Wavelength[2]
HDLG-2416
Parameter
Symbol
Min.
Typ.
Units
Test Conditions
Average Luminous Intensity per
Digit, Character Average
IV
1.2
5.6
mcd
‘’*’’Illuminated in All Four Digits.
19 Dots ON
Peak Wavelength
lPEAK
ld
568
574
nm
nm
Dominant Wavelength[2]
Notes:
1. Refers to the initial case temperature of the device immediately prior to the light measurement.
2. Dominant wavelength, l , is derived from the CIE chromaticity diagram, and represents the single wavelength which defines the color of the
d
device.
5
AC Timing Characteristics over Operating Temperature Range at V = 4.5 V
DD
Parameter
Symbol
tAS
Min
10
40
50
40
0
Units
ns
Address Setup
Address Hold
Data Setup
tAH
ns
tDS
ns
Data Hold
tDH
ns
Chip Enable Setup
Chip Enable Hold
Write Time
tCES
tCEH
tW
ns
0
ns
75
10
1
ns
Clear
tCLR
tCLRD
µs
Clear Disable
µs
Timing Diagram
Enlarged Character Font
2.0 V
0.8 V
3.43 (0.135)
CE
CE
1
0.80 (0.031)
2
TYP.
t
t
CEH
CES
2.0 V
0.8 V
A
– A , CU
1
0
t
t
AH
AS
5.08
(0.200)
2.0 V
0.8 V
WR
t
W
2.0 V
0.8 V
D
– D
6
0
0.25 (0.010)
TYP.
t
t
DH
DS
0.80 (0.031)
TYP.
t
t
CLRD
CLR
Notes:
2.0 V
0.8 V
1. Unless otherwise specified, the tolerance on all
dimensions is ± 0.254 mm (0.010 inch).
2. Dimensions are in mm (inches).
CLR
6
Electrical Description
Pin Function
Description
Chip Enable (CE and CE and CE must be a logic 0 to write to the display.
1
1
2
CE , pins 1 and 2)
2
Clear (CLR, pin 3)
When CLR is a logic 0 the ASCII RAM is reset to 20hex (space) and the Control
Register/Attribute RAM is reset to 00hex.
Cursor Enable
(CUE pin 4)
CUE determines whether the IC displays the ASCII or
the Cursor memory. (1 = Cursor, 0 = ASCII).
Cursor Select
(CU, pin 5)
CU determines whether data is stored in the ASCII RAM
or the Attribute RAM/Control Register. (1 = ASCII, 0 = Attribute RAM/Control Register).
Write (WR, pin 6)
Address Inputs
WR must be a logic 0 to store data in the display.
A -A selects a specific location in the display memory.
0
1
(A and A ,
Address 00 accesses the far right display location.
Address 11 accesses the far left location.
1
0
Pins 8 and 7)
Data Inputs
D -D are used to specify the input data for the
display.
0
6
(D -D , Pins 11-17)
0
6
V
(pin 9)
V
DD
is the positive power supply input.
DD
GND (pin 10)
GND is the display ground.
Blanking Input
(BL, pin 18)
BL is used to flash the display, blank the
display or to dim the display.
Display Internal Block Diagram
Figure 1 shows the HDLX-2416 display internal block
diagram. The CMOS IC consists of a 4 x 7 Character
RAM, a 2 x 4 Attribute RAM, a 5 bit Control Register, a
128 character ASCII decoder and the refresh circuitry
necessary to synchronize the decoding and driving of
four 5 x 7 dot matrix displays.
For each display digit location, two bits are stored in
the Attribute RAM. One bit is used to enable a cursor
character at each digit location. A second bit is used to
individually disable the blanking features at each digit
location.
The display is blanked and dimmed through an internal
blanking input on the row drivers. Logic within the IC
allows the user to dim the display either through the BL
input or through the brightness control in the control
register. Similarly the display can be blanked through the
BL input, the Master Blank in the Control Register, or the
Digit Blank Disable in the Attribute RAM.
Four 7 bit ASCII words are stored in the Character RAM.
The IC reads the ASCII data and decodes it via the 128
character ASCII decoder. The ASCII decoder includes the
64 character set of the HPDL-2416, 32 lower case ASCII
symbols, and 32 foreign language symbols.
A 5 bit word is stored in the Control Register. Three fields
within the Control Register provide an 8 level brightness
control, master blank, and extended functions disable.
7
CHARACTER/CURSOR
MULTIPLEXER
CHARACTER RAM
ASCII DECODER
2
7
7
WRITE
DATA
OUT
CHARACTER
A – A
0
1
ADDRESS
SELECT
5
COLUMN
DATA
0
1
DATA IN
D – D
0
6
CE
CE
1
CHARACTER/
CURSOR
MULTIPLEXER
2
WRITE
WR
CU
(4 x 7)
CLR
2
READ
ADDRESS
3
ROW
SELECT
5
CURSOR
CHARACTER
SELECT
CLR
ATTRIBUTE RAM
DIGIT CURSOR
CUE
DC
n
D
D
0
1
1
DIGIT BLANK
DISABLE
A – A
WRITE ADDRESS
WRITE
0
(2 x 4)
2
READ ADDRESS
CLR
CLR
COLUMN
DRIVERS
BL
CONTROL REGISTER
ROW
DRIVERS
MB
EFD
MASTER
BLANK
D
2
ROW
SELECT
DISPLAY
DBD
n
BLANK
3
BRIGHTNESS
LEVELS
EFD
D – D
3
5
6
EFD
EXTENDED
FUNCTIONS
DISPLAY
D
CE
CE
1
2
1 x 5
3
WRITE
WR
CU
CLR
CLR
3
DIGITAL
DUTY
CONTROL
4 (LSBs)
OSC
+ 32
+ 7
2 (MSBs)
Figure 1. Internal block diagram.
8
Display Clear
Cursor
Data stored in the Character RAM, Control Register, and When cursor enable (CUE) is a logic 1, a cursor will be
Attribute RAM will be cleared if the clear (CLR) is held displayed in all digit locations where a logic 1 has been
low for a minimum of 10 µs. Note that the display will be stored in the Digit Cursor memory in the Attribute RAM.
cleared regardless of the state of the chip enables (CE , The cursor consists of all 35 dots ON at half brightness.
1
CE ). After the display is cleared, the ASCII code for a space A flashing cursor can be displayed by pulsing CUE. When
2
(20hex) is loaded into all character RAM locations and CUE is a logic 0, the ASCII data stored in the Character
00hex is loaded into all Attribute RAM/Control Register RAM will be displayed regardless of the Digit Cursor bits.
memory locations.
Blanking
Data Entry
Blanking of the display is controlled through the BL input,
Figure 2 shows a truth table for the HDLX-2416 display. the Control Register and Attribute RAM. The user can
Setting the chip enables (CE , CE ) to logic 0 and the achieve a variety of functions by using these controls
1
2
cursor select (CU) to logic 1 will enable ASCII data in different combinations, such as full hardware display
loading. When cursor select (CU) is set to logic 0, data blank, software blank, blanking of individual characters,
will be loaded into the Control Register and Attribute and synchronized flashing of individual characters or
RAM. Address inputs A -A are used to select the digit entire display (by strobing the blank input). All of these
0
1
location in the display. Data inputs D -D are used to load blanking modes affect only the output drivers, main-
0
6
information into the display. Data will be latched into taining the contents and write capability of the internal
the display on the rising edge of the WR signal. D -D , RAMs and Control Register, so that normal loading of
0
6
A -A , CE , CE , and CU must be held stable during the RAMs and Control Register can take place even with the
0
1
1
2
write cycle to ensure that correct data is stored into the display blanked.
display. Data can be loaded into the display in any order.
Note that when A and A are logic 0, data is stored in the
0
1
right most display location.
CUE
0
BL
1
CLR
1
CE
CE
WR
X
CU
X
A
A
D
D
D
D
D
D
D
0
Function
1
2
1
0
6
5
4
3
2
1
Display ASCII
Display Stored Cursor
Reset RAMs
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
X
0
Blank Display but do not reset
RAMS and Control Register
X
0
1
Extended
Functions
Disable
Intensity
Control
Master
Blank
Digit
Blank
Disable 0
Digit
Cursor
0
Write to Attribute RAM
and Control Register
0
0
0
0
0
1
0 =
Enable
000 = 100%*
001 = 60%
010 = 40%
011 = 27%
100 = 17%
101 = 10%
110 = 7%
0 =
Display
ON
Digit
Blank
Disable 1
Digit
Cursor
1
DBD = 0, Allows Digit n to be
n
blanked
D -D
1
5
DBD = 1 Prevents Digit n from
n
being blanked.
X
X
1
0
0
0
1 =
1 =
Display
Blanked
Digit
Blank
Disable 2
Digit
Cursor
2
0
0
1
1
0
1
Disable
D -D
DC = 0 Removes cursor from
n
Digit n
1
5
111 = 3%
D
0
Digiit
Blank
Disable 3
Digit
Cursor
3
Always
Enabled
DC = 1 Stores cursor at Digit n
n
1
1
1
1
0
0
1
1
0
1
0
1
Digit 0 ASCII Data (Right Most Character)
Digit 1 ASCII Data
X
X
X
X
1
1
0
0
0
Write to Character RAM
Digit 2 ASCII Data
Digit 3 ASCII Data (Left Most Character)
1
X
X
X
1
X
X
X
1
X
X
X
X
X
X
X
X
X
X
No Change
0 = Logic 0; 1 = Logic 1; X = Do Not Care; * 000 = 27% for HDLU-2416
Figure 2. Display truth table.
9
Figure 3 shows how the Extended Function Disable
(bit D of the Control Register), Master Blank (bit D of
Dimming
6
2
Dimming of the display is controlled through either the
BL input or the Control Register. A pulse width modulated
signal can be applied to the BL input to dim the display.
A three bit word in the Control Register generates an
internal pulse width modulated signal to dim the display.
The internal dimming feature is enabled only if the
Extended Function Disable is a logic 0.
the Control Register), Digit Blank Disable (bit D of the
1
Attribute RAM), and BL input can be used to blank the
display.
When the Extended Function Disable is a logic 1, the
display can be blanked only with the BL input. When the
Extended Function Disable is a logic 0, the display can be
blanked through the BL input, the Master Blank, and the
Digit Blank Disable. The entire display will be blanked if
either the BL input is logic 0 or the Master Blank is logic
1, providing all Digit Blank Disable bits are logic 0. Those
digits with Digit Blank Disable bits a logic 1 will ignore
both blank signals and remain ON. The Digit Blank Disable
bits allow individual characters to be blanked or flashed
in synchronization with the BL input.
Bits 3-5 in the Control Register provide internal brightness
control. These bits are interpreted as a three bit binary
code, with code (000) corresponding to the maximum
brightness and code (111) to the minimum brightness.
In addition to varying the display brightness, bits 3-5 also
vary the average value of I . I can be specified at any
brightness level as shown in Table 1.
DD DD
EFD
0
MB
0
DBD
0
BL
0
n
Display Blanked by BL
Display ON
0
0
0
X
1
1
0
Display Blanked by BL. Individual characters
X
“ON”based on “1”being stored in DBD
n
0
0
1
1
0
1
X
1
Display Blanked by MB
Display Blanked by MB. Individual characters
“ON”based on “1”being stored in DBD
n
1
1
X
X
X
X
0
1
Display Blanked by BL
Display ON
Figure 3. Display blanking truth table.
Table 1. Current Requirements at Different Brightness Levels
Symbol
D
0
0
0
0
1
1
1
1
D
0
0
1
1
0
0
1
1
D
0
1
0
1
0
1
0
1
Brightness
100%
60%
25°C Typ.
25°C Max.
Max. over Temp.
Units
mA
mA
mA
mA
mA
mA
mA
mA
5
4
3
IDD(#)
110
66
45
30
20
12
9
130
79
53
37
24
15
11
6
160
98
66
46
31
20
15
9
40%
27%
17%
10%
7%
3%
4
10
The inputs to the CMOS IC are protected against static
discharge and input current latchup. However, for best
results standard CMOS handling precautions should be
used. Prior to use, the HDLX-2416 should be stored in
anti-static tubes or conductive material. During assembly
a grounded conductive work area should be used, and
assembly personnel should wear conductive wrist straps.
Lab coats made of synthetic material should be avoided
since they are prone to static charge build-up.
+ V
DD
1 k
8
4
7
6
3
BL
(PIN 18)
10 kHz
OUTPUT
1 k
1N914
555
Input current latchup is caused when the CMOS inputs
are subjected either to a voltage below ground (V
<
in
250 k
LOG
ground) or to a voltage higher than V (V > V ) and
when a high current is forced into the input. To prevent
input current latchup and ESD damage, unused inputs
DD in
DD
2
1
400 pF
should be connected either to ground or to V . Voltages
DD
should not be applied to the inputs until V has been
DD
applied to the display. Transient input voltages should
be eliminated.
Figure 4. Intensity modulation control using an astable multivibrator
(reprinted with permission from Electronics magazine, Sept. 19, 1974,
VNU Business pub. Inc.)
Soldering and Post Solder Cleaning Instructions for the
HDLX-2416
Figure 4 shows a circuit designed to dim the display from
98% to 2% by pulse width modulating the BL input. A
logarithmic or a linear potentiometer may be used to
adjust the display intensity. However, a logarithmic po-
tentiometer matches the response of the human eye and
therefore provides better resolution at low intensities. The
circuit frequency should be designed to operate at 10
kHz or higher. Lower frequencies may cause the display
to flicker.
The HDLX-2416 may be hand soldered or wave soldered
with SN63 solder. When hand soldering it is recom-
mended that an electronically temperature controlled
and securely grounded soldering iron be used. For best
°
results, the iron tip temperature should be set at 315 C
°
(600 F). For wave soldering, a rosin-based RMA flux can be
°
used. The solder wave temperature should be set at 245 C
°
°
°
5 C (473 F 9 F), and dwell in the wave should be set
between 1 1/2 to 3 seconds for optimum soldering. The
preheat temperature should not exceed 110°C (230°F) as
measured on the solder side of the PC board.
Extended Function Disable
Extended Function Disable (bit D of the Control Register)
6
disables the extended blanking and dimming functions
in the HDLX-2416. If the Extended Function Disable is a
logic 1, the internal brightness control, Master Blank, and
Digit Blank Disable bits are ignored. However the BL input
and Cursor control are still active. This allows downward
compatibility to the HPDL-2416.
For further information on soldering and post solder
cleaning, see Application Note 1027, Soldering LED Com-
ponents.
Contrast Enhancement
The objective of contrast enhancement is to provide good
readability in the end user’s ambient lighting conditions.
The concept is to employ both luminance and chromi-
nance contrast techniques. These enhance readability by
having the OFF-dots blend into the display background
and the ON-dots vividly stand out against the same back-
ground. For additional information on contrast enhance-
ment, see Application Note 1015.
Mechanical and Electrical Considerations
The HDLX-2416 is an 18 pin DIP package that can be
stacked horizontally and vertically to create arrays of any
size. The HDLX-2416 is designed to operate continuously
°
°
from -40 C to +85 C for all possible input conditions.
The HDLX-2416 is assembled by die attaching and wire
bonding 140 LEDs and a CMOS IC to a high temperature
printed circuit board. A polycarbonate lens is placed over
the PC board creating an air gap environment for the
LED wire bonds. Backfill epoxy environmentally seals the
display package. This package construction makes the
display highly tolerant to temperature cycling and allows
wave soldering.
Intensity Bin Limits for HDLS-2416
Intensity Range (mcd)
Intensity Bin Limits for HDLX-2416
Intensity Range (mcd)
Color Bin Limits
Color Range (nm)
Bin
E
Min.
3.97
Max.
6.79
Bin
A
B
Min.
1.20
1.25
2.02
2.83
3.97
5.55
7.78
Max.
1.77
2.47
3.46
4.85
6.79
9.50
13.30
Color
Yellow
Bin
3
Min.
Max.
581.5
584.0
586.5
589.0
576.0
573.0
570.0
567.0
585.0
587.5
590.0
592.5
580.0
577.0
574.0
571.5
F
5.55
9.50
4
G
H
I
7.78
13.30
18.62
26.07
36.49
C
5
10.88
15.24
21.33
D
E
6
Green
1
J
F
2
G
3
Note:
4
Test conditions as specified in Optical Charac-
teristic table.
Note:
Test conditions as specified in Optical Charac-
teristic table.
Note:
Test conditions as specified in Optical Charac-
teristic table.
For product information and a complete list of distributors, please go to our website: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved. Obsoletes 5989-3190EN
AV02-0662EN - February 26, 2013
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