ACPL-3130-000E [AVAGO]
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.300 INCH, ROHS COMPLIANT, DIP-8;
| 型号： | ACPL-3130-000E |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.300 INCH, ROHS COMPLIANT, DIP-8 输出元件 光电 |
| 文件： | 总20页 (文件大小：422K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
•ꢀ 0.5
Vꢀmaximumꢀlowꢀlevelꢀoutputꢀvoltageꢀ(V )ꢀeliminatesꢀ
ACPL-3130/J313, ACNW3130
Very High CMR 2.5 Amp Output Current IGBT Gate Driver Optocoupler
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
•ꢀ Highꢀspeedꢀresponse.
•ꢀ VeryꢀhighꢀCMR.
Theꢀ ACPL-3130ꢀ containsꢀ aꢀ GaAsPꢀ LEDꢀ whileꢀ theꢀ ACPL-
J313ꢀandꢀtheꢀANCW3130ꢀcontainꢀanꢀAlGaAsꢀLED.ꢀTheꢀLEDꢀ
isꢀopticallyꢀcoupledꢀtoꢀanꢀintegratedꢀcircuitꢀwithꢀaꢀpowerꢀ
outputꢀ stage.ꢀ Theseꢀ optocouplersꢀ areꢀ ideallyꢀ suitedꢀ forꢀ
drivingꢀpowerꢀIGBTsꢀandꢀMOSFETsꢀusedꢀinꢀmotorꢀcontrolꢀ
inverterꢀ applications.ꢀTheꢀ highꢀ operatingꢀ voltageꢀ rangeꢀ
ofꢀtheꢀoutputꢀstageꢀprovidesꢀtheꢀdriveꢀvoltagesꢀrequiredꢀ
byꢀ gateꢀ controlledꢀ devices.ꢀ Theꢀ voltageꢀ andꢀ currentꢀ
suppliedꢀbyꢀtheseꢀoptocouplersꢀmakeꢀthemꢀideallyꢀsuitedꢀ
forꢀdirectlyꢀdrivingꢀIGBTsꢀwithꢀratingsꢀupꢀtoꢀ1200ꢀV/100ꢀA.ꢀ
ForꢀIGBTsꢀwithꢀhigherꢀratings,ꢀtheꢀACPL-3130ꢀseriesꢀcanꢀbeꢀ
usedꢀtoꢀdriveꢀaꢀdiscreteꢀpowerꢀstageꢀwhichꢀdrivesꢀtheꢀIGBTꢀ
gate.ꢀTheꢀANCW3130ꢀhasꢀtheꢀhighestꢀinsulationꢀvoltageꢀofꢀ
•ꢀ Bootstrappableꢀsupplyꢀcurrent.
•ꢀ SafetyꢀApprovalꢀ(pending):
ULꢀRecognizedꢀ
-ꢀ3750ꢀV ꢀforꢀ1ꢀmin.ꢀforꢀACPL-3130/J313.ꢀ
rms
-ꢀ5000ꢀV ꢀforꢀ1ꢀmin.ꢀForꢀACNW3130
rms
CSAꢀApproval
IEC/EN/DINꢀENꢀ60747-5-2ꢀApprovedꢀ
-ꢀV
-ꢀV
-ꢀV
ꢀ=ꢀ630ꢀV
ꢀ=ꢀ891ꢀV
ꢀforꢀACPL-3130ꢀ(Optionꢀ060)ꢀ
ꢀforꢀACPL-J313ꢀ
IORM
IORM
IORM
peak
peak
ꢀ=ꢀ1414ꢀV
ꢀforꢀACNW3130
peak
V
ꢀ=ꢀ1414ꢀV
ꢀinꢀtheꢀIEC/EN/DINꢀENꢀ60747-5-2.ꢀTheꢀ
IORM
peak
ACPL-J313ꢀhasꢀanꢀinsulationꢀvoltageꢀofꢀV
andꢀtheꢀV
ꢀ=ꢀ891ꢀV
ꢀ
IORM
peak
Specifications
•ꢀ 2.5ꢀAꢀmaximumꢀpeakꢀoutputꢀcurrent.
ꢀ=ꢀ630ꢀV
ꢀisꢀalsoꢀavailableꢀwithꢀtheꢀACPL-
IORM
peak
3130ꢀ(Optionꢀ060).
•ꢀ 2.0ꢀAꢀminimumꢀpeakꢀoutputꢀcurrent.
Functional Diagram
•ꢀ 40ꢀkV/µsꢀminimumꢀCommonꢀModeꢀRejectionꢀ(CMR)ꢀatꢀ
V
ꢀ=ꢀ1500ꢀV
CM
N/C
ANODE
CATHODE
N/C
1
8
V
V
V
V
CC
O
OL
needꢀforꢀnegativeꢀgateꢀdrive
2
3
4
7
6
5
•ꢀ I ꢀ=ꢀ5ꢀmAꢀmaximumꢀsupplyꢀcurrent
CC
•ꢀ Underꢀ Voltageꢀ Lock-Outꢀ protectionꢀ (UVLO)ꢀ withꢀ
O
hysteresis
•ꢀ WideꢀoperatingꢀV ꢀrange:ꢀ15ꢀtoꢀ30ꢀVolts
•ꢀ 500ꢀnsꢀmaximumꢀswitchingꢀspeeds
CC
EE
SHIELD
•ꢀ Industrialꢀtemperatureꢀrange:ꢀ-40°Cꢀtoꢀ100°C
ACPL-3130 and ACPL-J313
Applications
N/C
1
8
V
V
CC
O
•ꢀ IGBT/MOSFETꢀgateꢀdrive
•ꢀ AC/BrushlessꢀDCꢀmotorꢀdrives
•ꢀ Industrialꢀinverters
2
3
4
7
6
5
ANODE
CATHODE
N/C
N/C
•ꢀ SwitchingꢀPowerꢀSuppliesꢀ(SPS)
V
EE
SHIELD
ACNW3130
Note:ꢀAꢀ0.1ꢀµFꢀbypassꢀcapacitorꢀmustꢀbeꢀconnectedꢀbetweenꢀpinsꢀV ꢀandꢀV
.
EE
CC
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
ꢀ
Truth Table
VCC – VEE
“POSITIVE GOING”
(i.e., TURN-ON)
VCC – VEE
“NEGATIVE GOING”
(i.e., TURN-OFF)
LED
OFF
ON
ON
ON
VO
LOW
0ꢀ-ꢀ30ꢀV
0ꢀ-ꢀ11ꢀV
0ꢀ-ꢀ30ꢀV
0ꢀ-ꢀ9.5ꢀV
9.5ꢀ-ꢀ12ꢀV
12ꢀ-ꢀ30ꢀV
LOW
11ꢀ-ꢀ13.5ꢀV
13.5ꢀ-ꢀ30ꢀV
TRANSITION
HIGH
Ordering Information
ACPL-3130ꢀandꢀACPL-J313ꢀareꢀULꢀRecognizedꢀwithꢀ3750ꢀVrmsꢀforꢀ1ꢀminuteꢀperꢀUL1577.ꢀACNW3130ꢀisꢀULꢀRecognizedꢀ
withꢀ5000Vrmsꢀforꢀ1ꢀminuteꢀperꢀUL1577.
Option
Surface
Mount
Gull
Wing
Tape
& Reel
IEC/EN/DIN EN
60747-5-2
Part number
RoHS Compliant
-000E
Package
Quantity
50ꢀperꢀtube
50ꢀperꢀtube
1000ꢀperꢀreel
50ꢀperꢀtube
50ꢀperꢀtube
1000ꢀperꢀreel
50ꢀperꢀtube
50ꢀperꢀtube
1000ꢀperꢀreel
42ꢀperꢀtube
42ꢀperꢀtube
750ꢀperꢀreel
-300E
X
X
X
X
-500E
X
X
X
X
300mil
DIP-8
ACPL-3130
-060E
X
X
X
X
X
X
X
X
X
-360E
X
X
X
X
-560E
-000E
300mil
DIP-8
ACPL-J313
ACNW3130
-300E
X
X
X
X
-500E
-000E
400mil
DIP-8
-300E
X
X
X
X
-500E
Toꢀorder,ꢀchooseꢀaꢀpartꢀnumberꢀfromꢀtheꢀpartꢀnumberꢀcolumnꢀandꢀcombineꢀwithꢀtheꢀdesiredꢀoptionꢀfromꢀtheꢀoptionꢀ
columnꢀtoꢀformꢀanꢀorderꢀentry.ꢀ
Exampleꢀ1:ꢀ
ꢀ
ACPL-3130-560Eꢀtoꢀorderꢀproductꢀofꢀ300milꢀDIPꢀGullꢀWingꢀSurfaceꢀMountꢀpackageꢀinꢀTapeꢀandꢀReelꢀpackagingꢀwithꢀ
IEC/EN/DINꢀENꢀ60747-5-2ꢀSafetyꢀApprovalꢀinꢀRoHSꢀcompliant.
Exampleꢀ2:ꢀ
ꢀ
ACPL-3130-000Eꢀtoꢀorderꢀproductꢀofꢀ300milꢀDIPꢀpackageꢀinꢀtubeꢀpackagingꢀandꢀRoHSꢀcompliant.
Optionꢀdatasheetsꢀareꢀavailable.ꢀContactꢀyourꢀAvagoꢀsalesꢀrepresentativeꢀorꢀauthorizedꢀdistributorꢀforꢀinformation.
Remarks:ꢀTheꢀnotationꢀ‘#XXX’ꢀisꢀusedꢀforꢀexistingꢀproducts,ꢀwhileꢀ(new)ꢀproductsꢀlaunchedꢀsinceꢀ15thꢀJulyꢀ2001ꢀandꢀRoHSꢀ
compliantꢀoptionꢀwillꢀuseꢀ‘-XXXE‘.
2
Package Outline Drawings
ACPL-3130 Outline Drawing (Standard DIP Package / 300mil DIP)
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
2
3
4
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5 TYP.
+ 0.003)
- 0.002)
3.56 ± 0.13
(0.140 ± 0.005)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
* MARKING CODE LETTER FOR OPTION NUMBERS.
"V" = OPTION 060
1.080 ± 0.320
(0.043 ± 0.013)
0.65 (0.025) MAX.
OPTION NUMBERS 300 AND 500 NOT MARKED.
2.54 ± 0.25
(0.100 ± 0.010)
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
ACPL-3130 Gull Wing Surface Mount Option 300 Outline Drawing
LAND PATTERN RECOMMENDATION
9.65 0.ꢀ5
(0.380 0.0ꢁ0ꢂ
ꢁ.0ꢁ6 (0.040ꢂ
6
5
8
ꢁ
7
6.350 0.ꢀ5
(0.ꢀ50 0.0ꢁ0ꢂ
ꢁ0.9 (0.430ꢂ
ꢀ
3
4
ꢀ.0 (0.080ꢂ
ꢁ.ꢀ7 (0.050ꢂ
9.65 0.ꢀ5
(0.380 0.0ꢁ0ꢂ
ꢁ.780
(0.070ꢂ
MAX.
ꢁ.ꢁ9
(0.047ꢂ
MAX.
7.6ꢀ 0.ꢀ5
(0.300 0.0ꢁ0ꢂ
+ 0.076
- 0.05ꢁ
0.ꢀ54
3.56 0.ꢁ3
(0.ꢁ40 0.005ꢂ
+ 0.003ꢂ
- 0.00ꢀꢂ
(0.0ꢁ0
ꢁ.080 0.3ꢀ0
(0.043 0.0ꢁ3ꢂ
0.635 0.ꢀ5
(0.0ꢀ5 0.0ꢁ0ꢂ
ꢁꢀ ˚ NOM.
0.635 0.ꢁ30
(0.0ꢀ5 0.005ꢂ
ꢀ.54
(0.ꢁ00ꢂ
BSC
DIMENSIONS IN MILLIMETERS (INCHESꢂ.
LEAD COPLANARITY = 0.ꢁ0 mm (0.004 INCHESꢂ.
NOTE: FLOATING LEAD PROTRUSION IS 0.ꢀ5 mm (ꢁ0 milsꢂ MAX.
ꢁ
ACPL-J313 Outline Drawing (300mil DIP)
7.62 ± 0.25
(0.300 ± 0.010)
9.80 ± 0.25
(0.386 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
DATE CODE
A XXXX
YYWW
2
3
4
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5 TYP.
+ 0.003)
- 0.002)
3.56 ± 0.13
(0.140 ± 0.005)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
OPTION NUMBERS 300 AND 500 NOT MARKED.
1.080 ± 0.320
0.65 (0.025) MAX.
(0.043 ± 0.013)
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
ACPL-J313 Gull Wing Surface Mount Option 300 Outline Drawing
LAND PATTERN RECOMMENDATION
9.80 0.ꢀ5
(0.386 0.0ꢁ0ꢂ
ꢁ.0ꢁ6 (0.040ꢂ
6
5
8
ꢁ
7
6.350 0.ꢀ5
(0.ꢀ50 0.0ꢁ0ꢂ
ꢁ0.9 (0.430ꢂ
ꢀ
3
4
ꢀ.0 (0.080ꢂ
ꢁ.ꢀ7 (0.050ꢂ
9.65 0.ꢀ5
(0.380 0.0ꢁ0ꢂ
ꢁ.780
(0.070ꢂ
MAX.
ꢁ.ꢁ9
(0.047ꢂ
MAX.
7.6ꢀ 0.ꢀ5
(0.300 0.0ꢁ0ꢂ
+ 0.076
- 0.05ꢁ
0.ꢀ54
3.56 0.ꢁ3
(0.ꢁ40 0.005ꢂ
+ 0.003ꢂ
- 0.00ꢀꢂ
(0.0ꢁ0
ꢁ.080 0.3ꢀ0
(0.043 0.0ꢁ3ꢂ
0.635 0.ꢀ5
(0.0ꢀ5 0.0ꢁ0ꢂ
ꢁꢀ ˚ NOM.
0.635 0.ꢁ30
(0.0ꢀ5 0.005ꢂ
ꢀ.54
(0.ꢁ00ꢂ
BSC
DIMENSIONS IN MILLIMETERS (INCHESꢂ.
LEAD COPLANARITY = 0.ꢁ0 mm (0.004 INCHESꢂ.
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (ꢀ0 milsꢂ MAX.
ꢂ
ACNW3130 Outline Drawing (8-Pin Wide Body Package / 400mil DIP)
11.00
(0.433)
11.15 ± 0.15
(0.442 ± 0.006)
MAX.
9.00 ± 0.15
(0.354 ± 0.006)
7
6
5
8
TYPE NUMBER
DATE CODE
A
ACNWXXXX
YYWW
1
3
2
4
10.16 (0.400)
TYP.
1.55
(0.061)
MAX.
7 TYP.
+ 0.076
- 0.0051
0.254
+ 0.003)
- 0.002)
(0.010
5.10
(0.201)
MAX.
3.10 (0.122)
3.90 (0.154)
0.51 (0.021) MIN.
2.54 (0.100)
TYP.
DIMENSIONS IN MILLIMETERS (INCHES).
1.78 ± 0.15
(0.070 ± 0.006)
0.40 (0.016)
0.56 (0.022)
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
ACNW3130 Gull Wing Surface Mount Option 300 Outline Drawing
11.15 ± 0.15
(0.442 ± 0.006)
LAND PATTERN RECOMMENDATION
6
7
5
8
9.00 ± 0.15
(0.354 ± 0.006)
13.56
(0.534)
1
3
2
4
2.29
(0.09)
1.3
(0.051)
12.30 ± 0.30
1.55
(0.061)
MAX.
(0.484 ± 0.012)
11.00
MAX.
(0.433)
4.00
(0.158)
MAX.
1.78 ± 0.15
(0.070 ± 0.006)
1.00 ± 0.15
(0.039 ± 0.006)
0.75 ± 0.25
(0.030 ± 0.010)
+ 0.076
- 0.0051
2.54
(0.100)
BSC
0.254
+ 0.003)
- 0.002)
(0.010
DIMENSIONS IN MILLIMETERS (INCHES).
7 NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
5
Recommended Solder Reflow Temperature Profile
300
PREHEATING RATE 3 °C + 1 °C/–0.5 °C/SEC.
REFLOW HEATING RATE 2.5 °C 0.5 °C/SEC.
PEAK
TEMP.
245 °C
PEAK
TEMP.
240 °C
PEAK
TEMP.
230 °C
200
2.5 C 0.5 °C/SEC.
SOLDERING
30
SEC.
TIME
160 °C
150 °C
140 °C
200 °C
30
SEC.
3 °C + 1 °C/–0.5 °C
100
PREHEATING TIME
150 °C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
0
50
100
150
200
250
TIME (SECONDS)
NOTE: NON-HALIDE FLUX SHOULD BE USED.
Recommended Pb-Free IR Profile
TIMEWITHIN 5 °C of ACTUAL
PEAKTEMPERATURE
tp
15 SEC.
* 260 +0/-5 °C
RAMP-UP
Tp
217 °C
TL
RAMP-DOWN
6 °C/SEC. MAX.
3 °C/SEC. MAX.
150 - 200 °C
Tsmax
Tsmin
ts
tL
PREHEAT
60 to 150 SEC.
60 to 180 SEC.
25
t 25 °C to PEAK
TIME
NOTES:
THETIME FROM 25 °C to PEAKTEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 °C, Tsmin = 150 °C
NOTE: NON-HALIDE FLUX SHOULD BE USED.
* RECOMMENDED PEAKTEMPERATURE FORWIDEBODY 400mils PACKAGETO BE 245 °C
Regulatory Information
TheꢀACPL-3130/J313ꢀandꢀACNW3130ꢀareꢀpendingꢀapprovalꢀbyꢀtheꢀfollowingꢀorganizations:
ULꢀ
IEC/EN/DIN EN 60747-5-2 (ACPL-3130 Option 060
only, ACPL-J313 and ACNW3130)ꢀ
Approvalꢀunder:ꢀ
ApprovalꢀunderꢀULꢀ1577,ꢀcomponentꢀrecognitionꢀ
program,ꢀFileꢀE55361.
IECꢀ60747-5-2ꢀ:1997ꢀ+ꢀA1:2002ꢀ
CSAꢀ
ENꢀ60747-5-2:2001ꢀ+ꢀA1:2002ꢀ
DINꢀENꢀ60747-5-2ꢀ(VDEꢀ0884ꢀTeilꢀ2):2003-01
ApprovalꢀunderꢀCSAꢀComponentꢀAcceptanceꢀNoticeꢀ#5,ꢀ
FileꢀCAꢀ88324.
ꢃ
Table 1. IEC/EN/DIN EN 60747-5-2 Insulation Characteristics*
ACPL-3130
Option 060
Description
Symbol
ACPL-J313 ACNW3130 Unit
InstallationꢀclassificationꢀperꢀDINꢀVDEꢀ0110/1.89,ꢀTableꢀ1
ꢀꢀꢀꢀꢀꢀforꢀratedꢀmainsꢀvoltageꢀꢀ150ꢀVrms
ꢀꢀꢀꢀꢀꢀforꢀratedꢀmainsꢀvoltageꢀꢀ300ꢀVrms
ꢀꢀꢀꢀꢀꢀforꢀratedꢀmainsꢀvoltageꢀꢀ450ꢀVrms
ꢀꢀꢀꢀꢀꢀforꢀratedꢀmainsꢀvoltageꢀꢀ600ꢀVrms
ꢀꢀꢀꢀꢀꢀforꢀratedꢀmainsꢀvoltageꢀꢀ1000ꢀVrms
Iꢀ–ꢀIV
Iꢀ–ꢀIV
Iꢀ–ꢀIII
Iꢀ–ꢀIV
Iꢀ–ꢀIV
Iꢀ–ꢀIII
Iꢀ–ꢀIII
Iꢀ–ꢀIV
Iꢀ–ꢀIV
Iꢀ–ꢀIV
Iꢀ–ꢀIV
Iꢀ–ꢀIII
ClimaticꢀClassification
55/100/21 55/100/21 55/100/21
PollutionꢀDegreeꢀ(DINꢀVDEꢀ0110/1.89)
MaximumꢀWorkingꢀInsulationꢀVoltage
2
2
2
VIORM
VPR
630
1181
891
1670
1414
2652
Vpeak
Vpeak
InputꢀtoꢀOutputꢀTestꢀVoltage,ꢀMethodꢀb*ꢀꢀVIORMꢀxꢀ1.875=VPR,ꢀ
100%ꢀProductionꢀTestꢀwithꢀtm=1ꢀsec,ꢀPartialꢀdischargeꢀ<ꢀ5ꢀpC
InputꢀtoꢀOutputꢀTestꢀVoltage,ꢀMethodꢀa*ꢀꢀVIORMꢀxꢀ1.5=VPR,ꢀ
TypeꢀandꢀSampleꢀTest,ꢀtm=60ꢀsec,ꢀPartialꢀdischargeꢀ<ꢀ5ꢀpC
VPR
945
1336
6000
2121
8000
Vpeak
Vpeak
HighestꢀAllowableꢀOvervoltageꢀꢀ
VIOTM
6000
(TransientꢀOvervoltageꢀtiniꢀ=ꢀ10ꢀsec)
Safety-limitingꢀvaluesꢀ–ꢀmaximumꢀvaluesꢀallowedꢀinꢀtheꢀeventꢀofꢀaꢀ
failure,ꢀalsoꢀseeꢀFigureꢀ41ꢀandꢀ42.
ꢀꢀꢀꢀꢀꢀꢀCaseꢀTemperature
ꢀꢀꢀꢀꢀꢀꢀInputꢀCurrent
ꢀꢀꢀꢀꢀꢀꢀOutputꢀPower
TS
175
230
600
175
400
600
150
400
700
°C
mA
mW
IS,ꢀINPUT
PS,ꢀOUTPUT
InsulationꢀResistanceꢀatꢀTS,ꢀVIOꢀ=ꢀ500ꢀV
RS
>109
>109
>109
W
*ꢀReferꢀtoꢀtheꢀoptocouplerꢀsectionꢀofꢀtheꢀIsolationꢀandꢀControlꢀComponentsꢀDesigner’sꢀCatalog,ꢀunderꢀProductꢀSafetyꢀRegulationsꢀsection,ꢀ(IEC/EN/DINꢀ
ENꢀ60747-5-2)ꢀforꢀaꢀdetailedꢀdescriptionꢀofꢀMethodꢀaꢀandꢀMethodꢀbꢀpartialꢀdischargeꢀtestꢀprofiles.
Note:ꢀTheseꢀoptocouplersꢀareꢀsuitableꢀforꢀ“safeꢀelectricalꢀisolation”ꢀonlyꢀwithinꢀtheꢀsafetyꢀlimitꢀdata.ꢀMaintenanceꢀofꢀtheꢀsafetyꢀdataꢀshallꢀbeꢀensuredꢀbyꢀ
meansꢀofꢀprotectiveꢀcircuits.ꢀSurfaceꢀmountꢀclassificationꢀisꢀClassꢀAꢀinꢀaccordanceꢀwithꢀCECCꢀ00802.
Table 2. Insulation and Safety Related Specifications
Parameter
Symbol ACPL-3130 ACPL-J313 ACNW3130 Units
Conditions
MinimumꢀExternalꢀAirꢀ L(101) 7.1
Gapꢀ(Clearance)
7.4
8.0
0.5
9.6
mm
mm
mm
Measuredꢀfromꢀinputꢀterminalsꢀtoꢀoutputꢀ
terminals,ꢀshortestꢀdistanceꢀthroughꢀair.
MinimumꢀExternalꢀꢀ
Trackingꢀ(Creepage)
L(102) 7.4
10.0
1.0
Measuredꢀfromꢀinputꢀterminalsꢀtoꢀoutputꢀ
terminals,ꢀshortestꢀdistanceꢀpathꢀalongꢀbody.
MinimumꢀInternalꢀ
PlasticꢀGapꢀ(Internalꢀ
Clearance)
0.08
Throughꢀinsulationꢀdistanceꢀconductorꢀtoꢀ
conductor,ꢀusuallyꢀtheꢀstraightꢀlineꢀdistanceꢀ
thicknessꢀbetweenꢀtheꢀemitterꢀandꢀdetector.
TrackingꢀResistanceꢀꢀ
(ComparativeꢀTrackingꢀ
Index)
CTI
>ꢀ175
IIIa
>ꢀ175
IIIa
>ꢀ200
IIIa
V
DINꢀIECꢀ112/VDEꢀ0303ꢀPartꢀ1
IsolationꢀGroup
MaterialꢀGroupꢀ(DINꢀVDEꢀ0110,ꢀ1/89,ꢀTableꢀ1)
AllꢀAvagoꢀdataꢀsheetsꢀreportꢀtheꢀcreepageꢀandꢀclearanceꢀinherentꢀtoꢀtheꢀoptocouplerꢀcomponentꢀitself.ꢀTheseꢀdimensionsꢀareꢀneededꢀasꢀaꢀstartingꢀ
pointꢀforꢀtheꢀequipmentꢀdesignerꢀwhenꢀdeterminingꢀtheꢀcircuitꢀinsulationꢀrequirements.ꢀHowever,ꢀonceꢀmountedꢀonꢀaꢀprintedꢀcircuitꢀboard,ꢀminimumꢀ
creepageꢀandꢀclearanceꢀrequirementsꢀmustꢀbeꢀmetꢀasꢀspecifiedꢀforꢀindividualꢀequipmentꢀstandards.ꢀForꢀcreepage,ꢀtheꢀshortestꢀdistanceꢀpathꢀalongꢀ
theꢀsurfaceꢀofꢀaꢀprintedꢀcircuitꢀboardꢀbetweenꢀtheꢀsolderꢀfilletsꢀofꢀtheꢀinputꢀandꢀoutputꢀleadsꢀmustꢀbeꢀconsidered.ꢀThereꢀareꢀrecommendedꢀtechniquesꢀ
suchꢀasꢀgroovesꢀandꢀribsꢀwhichꢀmayꢀbeꢀusedꢀonꢀaꢀprintedꢀcircuitꢀboardꢀtoꢀachieveꢀdesiredꢀcreepageꢀandꢀclearances.ꢀCreepageꢀandꢀclearanceꢀdistancesꢀ
willꢀalsoꢀchangeꢀdependingꢀonꢀfactorsꢀsuchꢀasꢀpollutionꢀdegreeꢀandꢀinsulationꢀlevel.
ꢄ
Table 3. Absolute Maximum Ratings
Parameter
Symbol
TS
Min.
-55
-40
Max.
125
100
25
Units
°C
Note
StorageꢀTemperature
OperatingꢀTemperature
AverageꢀInputꢀCurrent
TA
°C
IF(AVG)
IF(TRAN)
mA
A
1
PeakꢀTransientꢀInputꢀCurrent
(<1ꢀµsꢀpulseꢀwidth,ꢀ300pps)
1.0
ReverseꢀInputꢀVoltage
ACPL-3130
VR
5
V
ACPL-J313
ACNW3130
5
V
5
V
“High”ꢀPeakꢀOutputꢀCurrent
“Low”ꢀPeakꢀOutputꢀCurrent
SupplyꢀVoltage
IOH(PEAK)
IOL(PEAK)
VCCꢀ–ꢀVEE
tr(IN)ꢀ/tf(IN)
VO(PEAK)
PO
2.5
2.5
35
500
VCC
250
295
A
2
2
A
0
0
V
InputꢀCurrentꢀ(Rise/FallꢀTime)
OutputꢀVoltage
ns
V
OutputꢀPowerꢀDissipation
TotalꢀPowerꢀDissipation
LeadꢀSolderꢀTemperature
mW
mW
3
4
PT
ACPL-3130
ACPL-J313
ACNW3130
260°Cꢀforꢀ10ꢀsec.,ꢀ1.6ꢀmmꢀbelowꢀseatingꢀplane
260°Cꢀforꢀ10ꢀsec.,ꢀupꢀtoꢀseatingꢀplane
SeeꢀPackageꢀOutlineꢀDrawingsꢀsection
SolderꢀReflowꢀTemperatureꢀ
Profile
Table 4. Recommended Operating Conditions
Parameter
Symbol
VCCꢀ-ꢀVEE
IF(ON)
Min.
15
7
Max.
30
Units
V
Note
PowerꢀSupply
InputꢀCurrentꢀ(ON)
ACPL-3130
ACPL-J313
ACNW3130
16
mA
10
16
mA
V
InputꢀVoltageꢀ(OFF)
VF(OFF)
TA
-ꢀ3.6
-ꢀ40
0.8
100
OperatingꢀTemperature
°C
ꢅ
Table 5. Electrical Specifications (DC)
Overꢀrecommendedꢀoperatingꢀconditionsꢀ(T ꢀ=ꢀ-40ꢀtoꢀ100°C,ꢀforꢀACPL-3130,ACPL-J313ꢀI
ꢀ=ꢀ7ꢀtoꢀ16mA,ꢀforꢀACNW3130ꢀ
F(ON)
A
I
ꢀ=ꢀ10ꢀtoꢀ16mA,ꢀV
ꢀ=ꢀ-3.6ꢀtoꢀ0.8ꢀV,ꢀV ꢀ=ꢀ15ꢀtoꢀ30ꢀV,ꢀV ꢀ=ꢀGround)ꢀunlessꢀotherwiseꢀspecified.ꢀAllꢀtypicalꢀvaluesꢀatꢀ
F(ON)
F(OFF) CC EE
T ꢀ=ꢀ25°CꢀandꢀV ꢀ-ꢀV ꢀ=ꢀ30ꢀV,ꢀunlessꢀotherwiseꢀnoted.
A
CC
EE
Parameter
Symbol
Device
Min.
0.5
Typ.
Max.
Units
A
Test Conditions
VOꢀ=ꢀVCCꢀ–ꢀ4
VOꢀ=ꢀVCCꢀ–ꢀ15
VOꢀ=ꢀVEEꢀ+ꢀ2.5
VOꢀ=ꢀVEEꢀ+ꢀ15
IOꢀ=ꢀ-100ꢀmA
Fig.
Note
5
HighꢀLevel
OutputꢀCurrent
IOH
1.5
2,ꢀ3,ꢀ21
2.0
A
2
LowꢀLevel
OutputꢀCurrent
IOL
0.5
2.0
A
5,ꢀ6,ꢀ22
5
2.0
A
2
HighꢀLevel
OutputꢀVoltage
VOH
VOL
ICCH
ICCL
IFLH
VCC-4
VCC-3
0.1
V
1,ꢀ3,ꢀ23
4,ꢀ6,ꢀ24
7,ꢀ8
6,ꢀ7
LowꢀLevel
OutputꢀVoltage
0.5
5.0
5.0
V
IOꢀ=ꢀ100ꢀmA
HighꢀLevel
SupplyꢀCurrent
2.5
mA
mA
Outputꢀopen,
IFꢀ=ꢀ7ꢀtoꢀ16ꢀmA
LowꢀLevel
SupplyꢀCurrent
2.5
Outputꢀopen,
VFꢀ=ꢀ-3.0ꢀtoꢀ+0.8ꢀV
ThresholdꢀInput
Current
LowꢀtoꢀHigh
ACPL-3130
ACPL-J313
ACNW3130
2.3
1.0
2.3
5.0
5.0
8.0
mA
mA
mA
V
IOꢀ=ꢀ0ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
IOꢀ=ꢀ0ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
IOꢀ=ꢀ0ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
IOꢀ=ꢀ0ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
9,ꢀ17,ꢀ25
10,ꢀ18,ꢀ25
11,ꢀ17,ꢀ25
ThresholdꢀInput
Voltageꢀ
VFHL
0.8
HighꢀtoꢀLow
InputꢀForward
Voltage
VF
ACPL-3130
ACPL-J313
1.2
1.2
1.5
1.8
V
V
V
IFꢀ=ꢀ10ꢀmA
IFꢀ=ꢀ10ꢀmA
IFꢀ=ꢀ10ꢀmA
19
20
20
1.6
1.95
1.95
ACNW3130 1.2
1.6
Temperature
Coefficientꢀofꢀ
InputꢀForward
Voltage
DVF/DTA ACPL-3130
ACPL-J313
-1.6
-1.3
-1.3
mV/°C IFꢀ=ꢀ10ꢀmA
mV/°C IFꢀ=ꢀ10ꢀmA
mV/°C IFꢀ=ꢀ10ꢀmA
ACNW3130
InputꢀReverseꢀ
BreakdownꢀVoltage
BVR
CIN
ACPL-3130
ACPL-J313
ACNW3130
ACPL-3130
ACPL-J313
ACNW3130
5
3
3
V
IRꢀ=ꢀ10ꢀµA
V
IRꢀ=ꢀ100ꢀµA
V
IRꢀ=ꢀ100ꢀµA
InputꢀCapacitance
60
pF
pF
pF
V
fꢀ=ꢀ1ꢀMHz,ꢀVFꢀ=ꢀ0ꢀV
fꢀ=ꢀ1ꢀMHz,ꢀVFꢀ=ꢀ0ꢀV
fꢀ=ꢀ1ꢀMHz,ꢀVFꢀ=ꢀ0ꢀV
IFꢀ=ꢀ10ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
IFꢀ=ꢀ10ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
IFꢀ=ꢀ10ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
70
70
UVLOꢀThreshold
UVLOꢀHysteresis
VUVLO+
VUVLO–
11.0
9.5
12.3
10.7
1.6
13.5
12.0
26,ꢀ38
26,ꢀ38
26,ꢀ38
V
UVLOHYS
V
ꢆ
Table 6. Switching Specifications (AC)
Overꢀrecommendedꢀoperatingꢀconditionsꢀ(T ꢀ=ꢀ-40ꢀtoꢀ100°C,ꢀforꢀACPL-3130,ACPL-J313ꢀI
ꢀ=ꢀ7ꢀtoꢀ16mA,ꢀforꢀACNW3130ꢀ
F(ON)
A
I
ꢀ=ꢀ10ꢀtoꢀ16mA,ꢀV
ꢀ=ꢀ-3.6ꢀtoꢀ0.8ꢀV,ꢀV ꢀ=ꢀ15ꢀtoꢀ30ꢀV,ꢀV ꢀ=ꢀGround)ꢀunlessꢀotherwiseꢀspecified.ꢀAllꢀtypicalꢀvaluesꢀatꢀ
F(ON)
F(OFF)
CC
EE
T ꢀ=ꢀ25°CꢀandꢀV ꢀ-ꢀV ꢀ=ꢀ30ꢀV,ꢀunlessꢀotherwiseꢀnoted.
A
CC
EE
Parameter
Symbol
Min.
Typ. Max. Units Test Conditions
Fig.
Note
PropagationꢀDelayꢀTime
toꢀHighꢀOutputꢀLevel
tPLH
0.10
0.30 0.50 µs
Rgꢀ=ꢀ10ꢀW,
12,13,ꢀ 16
14,ꢀ15,ꢀ
16,ꢀ27
Cgꢀ=ꢀ10ꢀnF,
fꢀ=ꢀ10ꢀkHz,
DutyꢀCycleꢀ=ꢀ50%
PropagationꢀDelayꢀTime
toꢀLowꢀOutputꢀLevel
tPHL
0.10
0.30 0.50 µs
PulseꢀWidthꢀDistortion
PWD
0.3
µs
17
PropagationꢀDelay
PDD
DifferenceꢀBetweenꢀAny
TwoꢀPartsꢀorꢀChannels
(tPHLꢀ–ꢀtPLH
)
-0.35
0.35 µs
39,ꢀ40
27
12
RiseꢀTime
tR
0.1
0.1
0.8
0.6
50
µs
µs
µs
µs
FallꢀTime
tF
UVLOꢀTurnꢀOnꢀDelay
UVLOꢀTurnꢀOffꢀDelay
tUVLOꢀON
tUVLOꢀOFF
|CMH|
IFꢀ=ꢀ10ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
IFꢀ=ꢀ10ꢀmA,ꢀVOꢀ>ꢀ5ꢀV
26
26
27
OutputꢀHighꢀLevel
CommonꢀMode
TransientꢀImmunity
40
40
kV/
µs
TAꢀ=ꢀ25°C,
IFꢀ=ꢀ10ꢀtoꢀ16ꢀmA,
VCMꢀ=ꢀ1500ꢀV,ꢀVCCꢀ=ꢀ30ꢀV
13,ꢀ14
13,ꢀ15
OutputꢀLowꢀLevel
CommonꢀMode
TransientꢀImmunity
|CML|
50
kV/
µs
TAꢀ=ꢀ25°C,ꢀVFꢀ=ꢀ0ꢀV,
VCMꢀ=ꢀ1500ꢀV
VCCꢀ=ꢀ30ꢀV
27
Table 7. Package Characteristics
Overꢀrecommendedꢀtemperatureꢀ(T ꢀ=ꢀ-40ꢀtoꢀ100°C)ꢀunlessꢀotherwiseꢀspecified.ꢀAllꢀtypicalsꢀatꢀT ꢀ=ꢀ25°C.
A
A
Parameter
Symbol Device
Min.
Typ.
Max. Units
Test Conditions
Fig. Note
8,ꢀ11
Input-Output
Momentary
WithstandꢀVoltage**
VISO
ACPL-3130
3750
3750
5000
Vrms
Vrms
Vrms
W
RHꢀ<ꢀ50%,
tꢀ=ꢀ1ꢀmin.,
TAꢀ=ꢀ25°C
ACPL-J313
ACNW3130
ACPL-3130
ACPL-J313
ACNW3130
9,ꢀ11
10,ꢀ11
11
Resistance
(Input-Output)
RI-O
1012
1012
1013
VI-Oꢀ=ꢀ500ꢀV
VI-Oꢀ=ꢀ500ꢀV
W
1012
1011
W
VI-Oꢀ=ꢀ500ꢀV,
TAꢀ=ꢀ25°C
W
VI-Oꢀ=ꢀ500ꢀV,
TAꢀ=ꢀ100°C
Capacitance
(Input-Output)
CI-O
ACPL-3130
ACPL-J313
ACNW3130
0.6
0.8
0.5
467
pF
pF
Freq=1ꢀMHz
Freq=1ꢀMHz
Freq=1ꢀMHz
0.6
pF
LED-to-Case
ThermalꢀResistance
qLC
qLD
qDC
°C/W
Thermocoupleꢀ
locatedꢀatꢀcenterꢀ
undersideꢀofꢀpackage
32
32
32
LED-to-Detector
ThermalꢀResistance
442
126
°C/W
°C/W
Detector-to-Case
ThermalꢀResistance
**ꢀTheꢀInput-OutputꢀMomentaryꢀWithstandꢀVoltageꢀisꢀaꢀdielectricꢀvoltageꢀratingꢀthatꢀshouldꢀnotꢀbeꢀinterpretedꢀasꢀanꢀinput-outputꢀ
continuousꢀvoltageꢀrating.ꢀForꢀtheꢀcontinuousꢀvoltageꢀratingꢀreferꢀtoꢀyourꢀequipmentꢀlevelꢀsafetyꢀspecificationꢀorꢀAvagoꢀApplicationꢀ
Noteꢀ1074ꢀentitledꢀ“OptocouplerꢀInput-OutputꢀEnduranceꢀVoltage.”
ꢀ0
Notes:
1.ꢀ Derateꢀlinearlyꢀaboveꢀ70°ꢀCꢀfree-airꢀtemperatureꢀatꢀaꢀrateꢀofꢀ0.3ꢀmA/°C.
2.ꢀ Maximumꢀpulseꢀwidthꢀ=ꢀ10ꢀµs,ꢀmaximumꢀdutyꢀcycleꢀ=ꢀ0.2%.ꢀThisꢀvalueꢀisꢀintendedꢀtoꢀallowꢀforꢀcomponentꢀtolerancesꢀforꢀdesignsꢀwithꢀI
Oꢀpeakꢀ
minimumꢀ=ꢀ2.0ꢀA.ꢀSeeꢀApplicationsꢀsectionꢀforꢀadditionalꢀdetailsꢀonꢀlimitingꢀI ꢀpeak.
OH
3.ꢀ Derateꢀlinearlyꢀaboveꢀ70°ꢀCꢀfree-airꢀtemperatureꢀatꢀaꢀrateꢀofꢀ4.8ꢀmW/°C.
4.ꢀ Derateꢀlinearlyꢀaboveꢀ70°ꢀCꢀfree-airꢀtemperatureꢀatꢀaꢀrateꢀofꢀ5.4ꢀmW/°C.ꢀTheꢀmaximumꢀLEDꢀjunctionꢀtemperatureꢀshouldꢀnotꢀexceedꢀ125°C.
5.ꢀ Maximumꢀpulseꢀwidthꢀ=ꢀ50ꢀµs,ꢀmaximumꢀdutyꢀcycleꢀ=ꢀ0.5%.
6.ꢀ InꢀthisꢀtestꢀV ꢀisꢀmeasuredꢀwithꢀaꢀdcꢀloadꢀcurrent.ꢀWhenꢀdrivingꢀcapacitiveꢀloadsꢀV ꢀwillꢀapproachꢀV ꢀasꢀI ꢀapproachesꢀzeroꢀamps.
OH
OH
CC
OH
7.ꢀ Maximumꢀpulseꢀwidthꢀ=ꢀ1ꢀms,ꢀmaximumꢀdutyꢀcycleꢀ=ꢀ20%.
8.ꢀ InꢀaccordanceꢀwithꢀUL1577,ꢀeachꢀoptocouplerꢀisꢀproofꢀtestedꢀbyꢀapplyingꢀanꢀinsulationꢀtestꢀvoltageꢀꢁꢀ4500ꢀV ꢀforꢀ1ꢀsecondꢀ(leakageꢀdetectionꢀ
rms
currentꢀlimit,ꢀI ꢀꢀ5ꢀµA).
I-O
9.ꢀ InꢀaccordanceꢀwithꢀUL1577,ꢀeachꢀoptocouplerꢀisꢀproofꢀtestedꢀbyꢀapplyingꢀanꢀinsulationꢀtestꢀvoltageꢀꢁꢀ4500ꢀV ꢀforꢀ1ꢀsecondꢀ(leakageꢀdetectionꢀ
rms
currentꢀlimit,ꢀI ꢀꢀ5ꢀµA).
I-O
10.ꢀInꢀaccordanceꢀwithꢀUL1577,ꢀeachꢀoptocouplerꢀisꢀproofꢀtestedꢀbyꢀapplyingꢀanꢀinsulationꢀtestꢀvoltageꢀꢁꢀ6000ꢀV ꢀforꢀ1ꢀsecondꢀ(leakageꢀdetectionꢀ
rms
currentꢀlimit,ꢀI ꢀꢀꢀ5ꢀµA).
I-O
11.ꢀDeviceꢀconsideredꢀaꢀtwo-terminalꢀdevice:ꢀpinsꢀ1,ꢀ2,ꢀ3,ꢀandꢀ4ꢀshortedꢀtogetherꢀandꢀpinsꢀ5,ꢀ6,ꢀ7,ꢀandꢀ8ꢀshortedꢀtogether.
12.ꢀTheꢀdifferenceꢀbetweenꢀt ꢀandꢀt ꢀbetweenꢀanyꢀtwoꢀACPL-3130,ꢀACPL-J313ꢀorꢀACNW3130ꢀpartsꢀunderꢀtheꢀsameꢀtestꢀcondition.
PHL
PLH
13.ꢀPinsꢀ1ꢀandꢀ4ꢀneedꢀtoꢀbeꢀconnectedꢀtoꢀLEDꢀcommon.
14.ꢀCommonꢀmodeꢀtransientꢀimmunityꢀinꢀtheꢀhighꢀstateꢀisꢀtheꢀmaximumꢀtolerableꢀdV /dtꢀofꢀtheꢀcommonꢀmodeꢀpulse,ꢀV ,ꢀtoꢀassureꢀthatꢀtheꢀoutputꢀ
CM
CM
willꢀremainꢀinꢀtheꢀhighꢀstateꢀ(i.e.,ꢀV ꢀ>ꢀ15.0ꢀV).
O
15.ꢀCommonꢀmodeꢀtransientꢀimmunityꢀinꢀaꢀlowꢀstateꢀisꢀtheꢀmaximumꢀtolerableꢀdV /dtꢀofꢀtheꢀcommonꢀmodeꢀpulse,ꢀV ,ꢀtoꢀassureꢀthatꢀtheꢀoutputꢀ
CM
CM
willꢀremainꢀinꢀaꢀlowꢀstateꢀ(i.e.,ꢀV ꢀ<ꢀ1.0ꢀV).
O
16.ꢀThisꢀloadꢀconditionꢀapproximatesꢀtheꢀgateꢀloadꢀofꢀaꢀ1200ꢀV/75AꢀIGBT.
17.ꢀPulseꢀWidthꢀDistortionꢀ(PWD)ꢀisꢀdefinedꢀasꢀ|t ꢀ-ꢀt |ꢀforꢀanyꢀgivenꢀdevice.
PHL PLH
-1
-2
-3
-4
0
-1
-2
2.0
1.8
1.6
1.4
I
I
V
V
= 7 to 16 mA
I = 7 to 16 mA
F
F
= -100 mA
= 15 to 30 V
= 0 V
V
V
V
= (V
- 4 V)
OUT
CC
EE
OUT
CC
100
25
-40 °C
°C
C
= 15 to 30 V
CC
°
= 0 V
EE
I
V
V
= 7 to 16 mA
= 15 to 30 V
F
CC
-3
-4
-5
-6
1.2
1.0
= 0 V
EE
0
0.5
1.0
1.5
2.0
2.5
-40 -20
0
2 0
40
60
80 100
-40 -20
0
2 0
40
60
80 100
I
- OUTPUT HIGH CURRENT - A
T
- TEMPERATURE - °C
T
- TEMPERATURE - °C
A
OH
A
Figure 1. V vs. Temperature.
Figure 2. I vs. Temperature.
Figure 3. V vs. I
.
OH
OH
OH
OH
0.25
4
4
V
V
V
= -3.0 to 0.8 V
= 15 to 30 V
= 0 V
F(OFF)
CC
EE
V
(OFF) = -3.0 TO 0.8 V
V
V
V
V
(OFF) = -3.0 TO 0.8 V
F
F
I
= 100 mA
= 15 TO 30 V
= 0 V
= 2.5 V
= 15 TO 30 V
OUT
OUT
CC
0.20
0.15
0.10
0.05
V
V
3
CC
EE
3
2
= 0 V
EE
2
1
0
1
0
100
25
°C
C
°
-40 °C
0
-40 -20
0
2 0
40
60
80 100
-40 -20
0
2 0
40
60
80 100
0
0.5
1.0
1.5
2.0
2.5
T
- TEMPERATURE - °C
T
- TEMPERATURE - °C
I
- OUTPUT LOW CURRENT - A
OL
A
A
Figure 4. V vs. Temperature.
Figure 5. I vs. Temperature.
Figure 6. V vs. I .
OL OL
OL
OL
ꢀꢀ
3.5
3.0
2.5
3.5
3.0
2.5
5
4
3
2
V
V
= 15 TO 30 V
= 0 V
I
I
I
I
CC
EE
CCH
CCL
CCH
CCL
OUTPUT = OPEN
V
V
= 30 V
= 0 V
= 10 mA for I
CC
EE
I
I
T
V
= 10 mA for I
CCH
F
F
2.0
1.5
2.0
1.5
= 0 mA for I
CCL
1
0
I
I
F
F
CCH
CCL
= 25 °C
A
EE
= 0 mA for I
= 0 V
-40 -20
0
2 0
40
60
80 100
15
20
25
30
-40 -20
0
2 0
40
60
80 100
T
- TEMPERATURE - °C
V
CC
- SUPPLY VOLTAGE - V
T
- TEMPERATURE - °C
A
A
Figure 7. I vs. Temperature.
Figure 8. I vs. V
.
Figure 9. I vs. Temperature. (ACPL-3130)
CC
CC
CC
FLH
5
5
500
I
T
= 10 mA
F
V
V
= 15 TO 30 V
= 0 V
T
T
V
V
= 15 TO 30 V
= 0 V
CC
EE
PLH
PHL
CC
= 25 °C
A
EE
OUTPUT = OPEN
4
3
Rg = 10 �
Cg = 10 nF
DUTY CYCLE = 50%
f = 10 kHz
4
3
OUTPUT = OPEN
400
300
2
1
0
2
1
0
200
100
-40 -20
0
2 0
40
60
80 100
-40 -20
0
2 0
40
60
80 100
15
20
25
30
T
- TEMPERATURE - °C
T
- TEMPERATURE - ° C
A
V
- SUPPLY VOLTAGE - V
CC
A
Figure 10. I vs. Temperature. (ACPL-J313)
Figure 11. I vs. Temperature. (ACNW3130)
Figure 12. Propagation Delay vs. V .
CC
FLH
FLH
500
500
500
I
= 10 mA
V
T
I
= 30 V, V
= 0 V
EE
V
= 30 V, V
= 0 V
EE
F
CC
= 25 °C
CC
Rg = 10 Ω, Cg = 10 nF
= 25 °C
VCC = 30 V, V EE = 0 V
Rg = 10Ω , Cg = 10 nF
DUTY CYCLE = 50%
f = 10 kHz
A
= 10 mA
T
F
A
400
300
400
300
400
300
Cg = 10 nF
DUTY CYCLE = 50%
f = 10 kHz
DUTY CYCLE = 50%
f = 10 kHz
200
100
200
100
200
100
T
T
T
T
TPLH
TPHL
PLH
PHL
PLH
PHL
6
8
10
12
14
16
0
10
20
30
40
50
-40 -20
0
2 0
40
60
80 100
I
- FORWARD LED CURRENT - mA
Rg - SERIES LOAD RESISTANCE - Ω
T
- TEMPERATURE - °C
F
A
Figure 13. Propagation Delay vs. I .
Figure 14. Propagation Delay vs. Temperature.
Figure 15. Propagation Delay vs. Rg.
F
ꢀ2
35
30
500
400
300
V
T
= 30 V, V
= 0 V
EE
CC
= 25 °C
A
30
25
20
15
10
5
25
20
15
10
I
= 10 mA
F
Rg = 10
�
DUTY CYCLE = 50%
f = 10 kHz
200
100
5
0
T
T
PLH
PHL
0
0
1
2
3
4
5
0
1
2
3
4
5
0
20
40
60
80
100
I
- FORWARD LED CURRENT - mA
F
I
- FORWARD LED CURRENT - mA
Cg - LOAD CAPACITANCE - nF
F
Figure 16. Propagation Delay vs. Cg.
Figure 17. Transfer Characteristics (ACPL-3130 / Figure 18. Transfer Characteristics (ACPL-J313)
ACNW3130)
1000
1000
T
= 25°C
A
T
= 25°C
A
100
10
100
10
I
F
I
F
+
+
V
V
F
F
-
-
1.0
1.0
0.1
0.1
0.01
0.01
0.001
0.001
1.10
1.20
1.30
1.40
1.50
1.60
1.2
1.3
1.4
1.5
1.6
1.7
V
- FORWARD VOLTAGE - VOLTS
V
- FORWARD VOLTAGE - VOLTS
F
F
Figure 19. I vs. V . (ACPL-3130)
Figure 20. I vs. V . (ACPL-J313 / ACNW3130)
F
F
F
F
1
2
3
4
8
0.1 µF
+
4 V
7
6
5
−
I
= 7 to
F
V
= 15
+
CC
to 30 V
16 mA
−
I
OH
Figure 21. I Test Circuit.
OH
1
2
3
4
8
0.1 µF
I
OL
7
6
5
V
= 15
+
CC
to 30 V
-
2.5 V
+
-
Figure 22. I Test Circuit.
OL
ꢀꢁ
1
2
3
4
8
1
2
3
4
8
0.1 µF
0.1 µF
100 mA
V
OH
7
6
5
7
6
5
I
= 7 to
F
V
= 15
V
= 15
+
+
-
CC
to 30 V
CC
to 30 V
16 mA
Ð
V
OL
100 mA
Figure 24. V Test Circuit.
Figure 23. V Test Circuit.
OL
OH
1
2
8
1
2
8
0.1 µF
0.1 µF
7
7
6
5
V
= 15
+
-
+
CC
I
I
= 10 mA
F
V
F
CC
-
V
> 5 V
to 30 V
V
> 5 V
O
O
3
4
6
5
3
4
Figure 26. UVLO Test Circuit.
Figure 25. I Test Circuit.
FLH
1
8
7
6
5
I
0.1 µF
F
I
= 7 to 16 mA
F
V
= 15
CC
+
-
to 30 V
2
3
4
t
t
f
r
500
Ω
+
-
V
O
90%
10 KHz
50% DUTY
CYCLE
10
Ω
50%
10%
V
10 nF
OUT
t
t
PHL
PLH
Figure 27. t , t , t , and t Test Circuit and Waveforms.
PLH PHL
r
f
V
CM
∆V
∆ t
V
CM
1
2
3
4
8
7
6
5
=
� t
I
F
0.1 µF
A
B
0 V
∆ t
+
+
-
V
5 V
O
-
V
= 30 V
CC
V
OH
OL
V
O
SWITCH AT A: I = 10 mA
F
V
O
V
SWITCH AT B: I = 0 mA
F
+
V
= 1500 V
CM
Figure 28. CMR Test Circuit and Waveforms.
ꢀꢂ
Applications Information
Selecting the Gate Resistor (R ) to Minimize IGBT Switching
g
Losses. (Discussion applies to ACPL-3130, ACPL-J313 and
ACNW3130)
Eliminating Negative IGBT Gate Drive (Discussion applies to
ACPL-3130, ACPL-J313, and ACNW3130)
Step 1: Calculate Rg minimum from the I peak specification. The
OL
Toꢀ keepꢀ theꢀ IGBTꢀ firmlyꢀ off,ꢀ theꢀ ACPL-3130ꢀ hasꢀ aꢀ veryꢀ
lowꢀmaximumꢀVOLꢀspecificationꢀofꢀ0.5ꢀV.ꢀTheꢀACPL-3130ꢀ
IGBT and R in Figure 30 can be analyzed as a simple RC circuit
g
with a voltage supplied by the ACPL-3130.
realizesꢀ thisꢀ veryꢀ lowꢀ V ꢀ byꢀ usingꢀ aꢀ DMOSꢀ transistorꢀ
OL
withꢀ 1ꢀ Wꢀ (typical)ꢀ onꢀ resistanceꢀ inꢀ itsꢀ pullꢀ downꢀ circuit.ꢀ
WhenꢀtheꢀACPL-3130ꢀisꢀinꢀtheꢀlowꢀstate,ꢀtheꢀIGBTꢀgateꢀisꢀ
shortedꢀ toꢀ theꢀ emitterꢀ byꢀ R ꢀ +ꢀ 1ꢀ W.ꢀ Minimizingꢀ R ꢀ andꢀ
VCC − VEE − VOL
Rg ≥
IOLPEAK
g
g
theꢀleadꢀinductanceꢀfromꢀtheꢀACPL-3130ꢀtoꢀtheꢀIGBTꢀgateꢀ
andꢀ emitterꢀ (possiblyꢀ byꢀ mountingꢀ theꢀ ACPL-3130ꢀ onꢀ aꢀ
smallꢀPCꢀboardꢀdirectlyꢀaboveꢀtheꢀIGBT)ꢀcanꢀeliminateꢀtheꢀ
needꢀforꢀnegativeꢀIGBTꢀgateꢀdriveꢀinꢀmanyꢀapplicationsꢀasꢀ
shownꢀinꢀFigureꢀ29.ꢀCareꢀshouldꢀbeꢀtakenꢀwithꢀsuchꢀaꢀPCꢀ
boardꢀdesignꢀtoꢀavoidꢀroutingꢀtheꢀIGBTꢀcollectorꢀorꢀemitterꢀ
tracesꢀcloseꢀtoꢀtheꢀACPL-3130ꢀinputꢀasꢀthisꢀcanꢀresultꢀinꢀ
unwantedꢀ couplingꢀ ofꢀ transientꢀ signalsꢀ intoꢀ theꢀ ACPL-
3130ꢀandꢀdegradeꢀperformance.ꢀ(IfꢀtheꢀIGBTꢀdrainꢀmustꢀ
beꢀroutedꢀnearꢀtheꢀACPL-3130ꢀinput,ꢀthenꢀtheꢀLEDꢀshouldꢀ
beꢀ reverse-biasedꢀ whenꢀ inꢀ theꢀ offꢀ state,ꢀ toꢀ preventꢀ theꢀ
transientꢀsignalsꢀcoupledꢀfromꢀtheꢀIGBTꢀdrainꢀfromꢀturningꢀ
onꢀtheꢀACPL-3130.)
15 + 5 − 2
=
2.5
∼
= 7.2Ω = 8Ω
Theꢀ V ꢀ valueꢀ ofꢀ 2ꢀ Vꢀ inꢀ theꢀ previousꢀ equationꢀ isꢀ aꢀ
OL
conservativeꢀvalueꢀofꢀV ꢀatꢀtheꢀpeakꢀcurrentꢀofꢀ2.5Aꢀ(seeꢀ
OL
Figureꢀ6).ꢀAtꢀlowerꢀR ꢀvaluesꢀtheꢀvoltageꢀsuppliedꢀbyꢀtheꢀ
g
ACPL-3130ꢀ isꢀ notꢀ anꢀ idealꢀ voltageꢀ step.ꢀ Thisꢀ resultsꢀ inꢀ
lowerꢀpeakꢀcurrentsꢀ(moreꢀmargin)ꢀthanꢀpredictedꢀbyꢀthisꢀ
analysis.ꢀWhenꢀnegativeꢀgateꢀdriveꢀisꢀnotꢀusedꢀV ꢀinꢀtheꢀ
EE
previousꢀequationꢀisꢀequalꢀtoꢀzeroꢀvolts.
+5 V
1
2
3
4
8
V
= 18 V
CC
+ HVDC
270 �
0.1 µF
+
-
7
6
5
Rg
Q1
Q2
3-PHASE
AC
CONTROL
INPUT
74XXX
OPEN
COLLECTOR
- HVDC
Figure 29. Recommended LED Drive and Application Circuit.
+5 V
1
8
V
= 15 V
CC
+ HVDC
270 Ω
0.1 µF
+
-
2
7
Rg
Q1
Q2
3-PHASE
AC
CONTROL
3
6
5
INPUT
V
= -5 V
EE
+
-
74XXX
4
OPEN
COLLECTOR
- HVDC
Figure 30. ACPL-3130 Typical Application Circuit with Negative IGBT Gate Drive.
ꢀ5
Step 2: Check the ACPL-3130 Power Dissipation and Increase R if
g
Necessary. The ACPL-3130 total power dissipation (P ) is equal to
T
the sum of the emitter power (P ) and the output power (P ):
E
O
P = P +PO
T
E
P = I V
•
DutyCycle
•
E
F
F
PO = PO(BIAS) +PO(SWITCHING) = ICC V +E
Rg ;Qg
•
f
•
CC
SW
PE Parameter
Description
IF
LEDꢀCurrent
LEDꢀOnꢀVoltage
VF
DutyꢀCycle
PO Parameter
ICC
MaximumꢀLEDꢀDutyꢀCycle
Description
SupplyꢀCurrent
VCC
PositiveꢀSupplyꢀVoltage
NegativeꢀSupplyꢀVoltage
VEE
ESW(Rg,Qg)
EnergyꢀDissipatedꢀinꢀtheꢀACPL-3130ꢀforꢀ
eachꢀIGBTꢀSwitchingꢀCycleꢀ(SeeꢀFigureꢀ31)
f
SwitchingꢀFrequency
ForꢀtheꢀcircuitꢀinꢀFigureꢀ30ꢀwithꢀI ꢀ(worstꢀcase)ꢀ=ꢀ16ꢀmA,ꢀR ꢀ
F
g
=ꢀ8ꢀW,ꢀMaxꢀDutyꢀCycleꢀ=ꢀ80%,ꢀQ ꢀ=ꢀ500ꢀnC,ꢀfꢀ=ꢀ20ꢀkHzꢀandꢀ
SinceꢀP ꢀforꢀthisꢀcaseꢀisꢀgreaterꢀthanꢀP
,ꢀR ꢀmustꢀbeꢀ
g
g
O
O(MAX)
T ꢀmaxꢀ=ꢀ85˚C:
A
increasedꢀtoꢀreduceꢀtheꢀACPL-3130ꢀpowerꢀdissipation.
ForꢀQ ꢀ=ꢀ500ꢀnC,ꢀfromꢀFigureꢀ31,ꢀaꢀvalueꢀofꢀE ꢀ=ꢀ4.65ꢀµWꢀ
g
SW
givesꢀaꢀR ꢀ=ꢀ10.3ꢀΩ.
P = 16mA �1.8V �0.8 = 23mW
•
g
•
E
P = 4.25mA �20V + 5.2µJ�•20kHz
•
14
12
10
O
Qg = 100 nC
Qg = 500 nC
Qg = 1000 nC
= 85mW + 104mW
= 189mW
V
V
= 19 V
= -9 V
> 178mW(PO( @85°C = 250mW -15°C � 4.8mW/°C
•
)
CC
EE
MAX
)
8
6
4
ꢀTheꢀvalueꢀofꢀ4.25ꢀmAꢀforꢀI ꢀinꢀtheꢀpreviousꢀequationꢀwasꢀ
CC
obtainedꢀbyꢀderatingꢀtheꢀI ꢀmaxꢀofꢀ5ꢀmAꢀ(whichꢀoccursꢀatꢀ
CC
-40°C)ꢀtoꢀI ꢀmaxꢀatꢀ85˚Cꢀ(seeꢀFigureꢀ7).
CC
2
0
PO
= PO
- PO
) (
(
SWITCHINGMAX
)
(
MAX
BIAS)
-
= 178mW 85mW
0
10
20
30
40
50
Rg - GATE RESISTANCE - Ω
= 93mW
PO
Figure 31. Energy Dissipated in the ACPL-3130 for Each IGBT Switching
Cycle.
(
SWITCHINGMAX
)
ESW
=
MAX
)
(
f
93mW
20kHz
=
= 4.65µW
ꢀꢃ
Insertingꢀtheꢀvaluesꢀforꢀq ꢀandꢀq ꢀshownꢀinꢀFigureꢀ32ꢀ
Thermal Model
(Discussion applies to ACPL-3130, ACPL-J313 and ACNW3130)
LC
DC
gives:
T = P
(
256°C/W +θ
)
+ P
(
57°C/W +θCA
)
)
+ TA
+ TA
•
•
•
θ
�
JE
E
CA
D
= 442 °C/W
LD
T
T
JD
JE
T = P
(
57°C/W +θ
)
+ P
(
111°C/W +θCA
•
JD
E
CA
D
θ
= 467 °C/W
θ
= 126 °C/W
LC
DC
Forꢀexample,ꢀgivenꢀP ꢀ=ꢀ45ꢀmW,ꢀP ꢀ=ꢀ250ꢀmW,ꢀT ꢀ=ꢀ70°Cꢀ
andꢀq ꢀ=ꢀ83°C/W:
E
O
A
T
C
CA
θ
= 83 °C/W*
CA
T = P 339°C/W + P 140°C/W + T
•
•
D
JE
E
A
•
= 45mW 339°C/W + 250mW 140°C/W + 70°C = 120°C
•
T
A
TJD = P 140°C/W + P 194°C/W + T
•
•
E
D
A
T ꢀ=ꢀLEDꢀjunctionꢀtemperature
JE
= 45mW•140°C/W + 250mW 194°C/W + 70°C
•
T ꢀ=ꢀdetectorꢀICꢀjunctionꢀtemperature
JD
T ꢀ andꢀ T ꢀ shouldꢀ beꢀ limitedꢀ toꢀ 125°Cꢀ basedꢀ onꢀ theꢀ
T ꢀ =ꢀ caseꢀ temperatureꢀ measuredꢀ atꢀ theꢀ centerꢀ ofꢀ theꢀ
JE
JD
C
boardꢀ layoutꢀ andꢀ partꢀ placementꢀ (q )ꢀ specificꢀ toꢀ theꢀ
packageꢀbottom
CA
application
q ꢀ=ꢀLED-to-caseꢀthermalꢀresistance
LC
q
q
q
ꢀ=ꢀLED-to-detectorꢀthermalꢀresistance
ꢀ=ꢀdetector-to-caseꢀthermalꢀresistance
LD
DC
CA
ꢀ=ꢀcase-to-ambientꢀthermalꢀresistance
*q ꢀwillꢀdependꢀonꢀtheꢀboardꢀdesignꢀandꢀtheꢀplacementꢀ
CA
ofꢀtheꢀpart.
Figure 32. Thermal Model.
Theꢀ steadyꢀ stateꢀ thermalꢀ modelꢀ forꢀ theꢀ ACPL-3130ꢀ isꢀ
shownꢀinꢀFigureꢀ32.ꢀTheꢀthermalꢀresistanceꢀvaluesꢀgivenꢀ
inꢀthisꢀmodelꢀcanꢀbeꢀusedꢀtoꢀcalculateꢀtheꢀtemperaturesꢀ
atꢀeachꢀnodeꢀforꢀaꢀgivenꢀoperatingꢀcondition.ꢀAsꢀshownꢀ
byꢀtheꢀmodel,ꢀallꢀheatꢀgeneratedꢀflowsꢀthroughꢀq ꢀwhichꢀ
CA
raisesꢀtheꢀcaseꢀtemperatureꢀT ꢀaccordingly.ꢀTheꢀvalueꢀofꢀ
C
q
ꢀdependsꢀonꢀtheꢀconditionsꢀofꢀtheꢀboardꢀdesignꢀandꢀis,ꢀ
therefore,ꢀdeterminedꢀbyꢀtheꢀdesigner.ꢀTheꢀvalueꢀofꢀq ꢀ=ꢀ
CA
CA
83°C/Wꢀwasꢀobtainedꢀfromꢀthermalꢀmeasurementsꢀusingꢀaꢀ
2.5ꢀxꢀ2.5ꢀinchꢀPCꢀboard,ꢀwithꢀsmallꢀtracesꢀ(noꢀgroundꢀplane),ꢀ
aꢀsingleꢀACPL-3130ꢀsolderedꢀintoꢀtheꢀcenterꢀofꢀtheꢀboardꢀ
andꢀ stillꢀ air.ꢀ Theꢀ absoluteꢀ maximumꢀ powerꢀ dissipationꢀ
deratingꢀspecificationsꢀassumeꢀaꢀq ꢀvalueꢀofꢀ83°C/W.
CA
FromꢀtheꢀthermalꢀmodeꢀinꢀFigureꢀ32ꢀtheꢀLEDꢀandꢀdetectorꢀ
ICꢀjunctionꢀtemperaturesꢀcanꢀbeꢀexpressedꢀas:
θLC
θ
•
DC
T = P
(
θ ||
(
θLD +θDC
)
+θCA
)
+ P
+ θCA + TA
•
•
•
JE
E
LC
D
(
)
θLC +θDC +θLD
θ
θ LC
θ +θ +θ
•
DC
T = P
+θCA + P θ || θ +θ +θCA + TA
(
) )
•
(
JD
E
D
DC
LD
LC
(
)
LC
DC
LD
ꢀꢄ
LED Drive Circuit Considerations for Ultra High CMR Per-
formance. (Discussion applies to ACPL-3130, ACPL-J313,
and ACNW3130)
CMR with the LED On (CMR )
H
AꢀhighꢀCMRꢀLEDꢀdriveꢀcircuitꢀmustꢀkeepꢀtheꢀLEDꢀonꢀduringꢀ
commonꢀmodeꢀtransients.ꢀThisꢀisꢀachievedꢀbyꢀoverdrivingꢀ
theꢀLEDꢀcurrentꢀbeyondꢀtheꢀinputꢀthresholdꢀsoꢀthatꢀitꢀisꢀnotꢀ
pulledꢀbelowꢀtheꢀthresholdꢀduringꢀaꢀtransient.ꢀAꢀminimumꢀ
LEDꢀcurrentꢀofꢀ10ꢀmAꢀprovidesꢀadequateꢀmarginꢀoverꢀtheꢀ
Withoutꢀ aꢀ detectorꢀ shield,ꢀ theꢀ dominantꢀ causeꢀ ofꢀ
optocouplerꢀCMRꢀfailureꢀisꢀcapacitiveꢀcouplingꢀfromꢀtheꢀ
inputꢀsideꢀofꢀtheꢀoptocoupler,ꢀthroughꢀtheꢀpackage,ꢀtoꢀtheꢀ
detectorꢀICꢀasꢀshownꢀinꢀFigureꢀ33.ꢀTheꢀACPL-3130ꢀimprovesꢀ
CMRꢀperformanceꢀbyꢀusingꢀaꢀdetectorꢀICꢀwithꢀanꢀopticallyꢀ
transparentꢀFaradayꢀshield,ꢀwhichꢀdivertsꢀtheꢀcapacitivelyꢀ
coupledꢀ currentꢀ awayꢀ fromꢀ theꢀ sensitiveꢀ ICꢀ circuitry.ꢀ
However,ꢀ thisꢀ shieldꢀ doesꢀ notꢀ eliminateꢀ theꢀ capacitiveꢀ
couplingꢀ betweenꢀ theꢀ LEDꢀ andꢀ optocouplerꢀ pinsꢀ 5-8ꢀ
asꢀ shownꢀ inꢀ Figureꢀ 34.ꢀ Thisꢀ capacitiveꢀ couplingꢀ causesꢀ
perturbationsꢀinꢀtheꢀLEDꢀcurrentꢀduringꢀcommonꢀmodeꢀ
transientsꢀandꢀbecomesꢀtheꢀmajorꢀsourceꢀofꢀCMRꢀfailuresꢀ
forꢀaꢀshieldedꢀoptocoupler.ꢀTheꢀmainꢀdesignꢀobjectiveꢀofꢀaꢀ
highꢀCMRꢀLEDꢀdriveꢀcircuitꢀbecomesꢀkeepingꢀtheꢀLEDꢀinꢀtheꢀ
properꢀstateꢀ(onꢀorꢀoff)ꢀduringꢀcommonꢀmodeꢀtransients.ꢀ
Forꢀ example,ꢀ theꢀ recommendedꢀ applicationꢀ circuitꢀ
(Figureꢀ29),ꢀcanꢀachieveꢀ40ꢀkV/µsꢀCMRꢀwhileꢀminimizingꢀ
componentꢀcomplexity.
maximumꢀI ꢀofꢀ5ꢀmAꢀtoꢀachieveꢀ40ꢀkV/μsꢀCMR.
FLH
CMR with the LED Off (CMR )
L
AꢀhighꢀCMRꢀLEDꢀdriveꢀcircuitꢀmustꢀkeepꢀtheꢀLEDꢀoffꢀ(V ꢀ
F
ꢀV
)ꢀduringꢀcommonꢀmodeꢀtransients.ꢀForꢀexample,ꢀ
F(OFF)
duringꢀ aꢀ -dV /dtꢀ transientꢀ inꢀ Figureꢀ 35,ꢀ theꢀ currentꢀ
cm
flowingꢀ throughꢀ C
ꢀ alsoꢀ flowsꢀ throughꢀ theꢀ R ꢀ andꢀ
SAT
LEDP
V
ꢀ ofꢀ theꢀ logicꢀ gate.ꢀ Asꢀ longꢀ asꢀ theꢀ lowꢀ stateꢀ voltageꢀ
SAT
developedꢀacrossꢀtheꢀlogicꢀgateꢀisꢀlessꢀthanꢀV
,ꢀtheꢀLEDꢀ
F(OFF)
willꢀremainꢀoffꢀandꢀnoꢀcommonꢀmodeꢀfailureꢀwillꢀoccur.
+5 V
1
2
3
4
8
7
6
5
0.1
µF
+
-
C
I
LEDP
V
= 18 V
CC
+
Techniques to keep the LED in the proper state are dis-
cussed in the next two sections.
LEDP
V
SAT
-
¥ ¥ ¥
¥ ¥ ¥
C
LEDN
Rg
1
2
3
4
8
7
6
5
SHIELD
C
C
LEDP
LEDN
* THE ARROWS INDICATE THE DIRECTION
OF CURRENT FLOW DURING - dV
/dt.
CM
+
-
V
CM
Figure 35. Equivalent Circuit for Figure 29 During Common Mode Tran-
sient.
Theꢀ openꢀ collectorꢀ driveꢀ circuit,ꢀ shownꢀ inꢀ Figureꢀ 36,ꢀ
cannotꢀkeepꢀtheꢀLEDꢀoffꢀduringꢀaꢀ+dV /dtꢀtransient,ꢀsinceꢀ
Figure 33. Optocoupler Input to Output Capacitance Model for Unshield-
ed Optocouplers.
cm
allꢀtheꢀcurrentꢀflowingꢀthroughꢀC
ꢀmustꢀbeꢀsuppliedꢀ
LEDN
byꢀtheꢀLED,ꢀandꢀitꢀisꢀnotꢀrecommendedꢀforꢀapplicationsꢀ
requiringꢀ ultraꢀ highꢀ CMR ꢀ performance.ꢀ Figureꢀ 37ꢀ isꢀ anꢀ
L
C
1
2
3
4
8
7
6
5
LEDO1
alternativeꢀ driveꢀ circuitꢀ which,ꢀ likeꢀ theꢀ recommendedꢀ
applicationꢀcircuitꢀ(Figureꢀ29),ꢀdoesꢀachieveꢀultraꢀhighꢀCMRꢀ
performanceꢀbyꢀshuntingꢀtheꢀLEDꢀinꢀtheꢀoffꢀstate.
C
C
LEDP
LEDN
C
LEDO2
1
2
3
4
8
7
6
5
+5 V
C
LEDP
SHIELD
C
I
Figure 34. Optocoupler Input to Output Capacitance Model for Shielded
Optocouplers.
LEDN
Q1
LEDN
SHIELD
Figure 36. Not Recommended Open Collector Drive Circuit.
ꢀꢅ
35.
isꢀequalꢀtoꢀtheꢀmaximumꢀvalueꢀofꢀtheꢀpropagationꢀdelayꢀ
differenceꢀspecification,ꢀPDD ,ꢀwhichꢀisꢀspecifiedꢀtoꢀbeꢀ
Theꢀamountꢀofꢀdelayꢀnecessaryꢀtoꢀachieveꢀthisꢀconditionꢀ
supplyꢀvoltageꢀrisesꢀaboveꢀtheꢀACPL-3130
V
Dead Time and Propagation Delay Specifications. (Discus-
sion applies to ACPL-3130, ACPL-J313, and ACNW3130)
1
2
3
4
8
7
6
5
+5 V
Theꢀ ACPL-3130ꢀ includesꢀ aꢀ Propagationꢀ Delayꢀ Differenceꢀ
(PDD)ꢀspecificationꢀintendedꢀtoꢀhelpꢀdesignersꢀminimizeꢀ
“deadꢀ time”ꢀ inꢀ theirꢀ powerꢀ inverterꢀ designs.ꢀ Deadꢀ timeꢀ
isꢀtheꢀtimeꢀperiodꢀduringꢀwhichꢀbothꢀtheꢀhighꢀandꢀlowꢀ
sideꢀ powerꢀ transistorsꢀ (Q1ꢀ andꢀ Q2ꢀ inꢀ Figureꢀ 29)ꢀ areꢀ off.ꢀ
AnyꢀoverlapꢀinꢀQ1ꢀandꢀQ2ꢀconductionꢀwillꢀresultꢀinꢀlargeꢀ
currentsꢀflowingꢀthroughꢀtheꢀpowerꢀdevicesꢀbetweenꢀtheꢀ
highꢀandꢀlowꢀvoltageꢀmotorꢀrails.ꢀ
C
C
LEDP
LEDN
SHIELD
I
Figure 37. Recommended LED Drive Circuit for Ultra-High CMR.
LED1
V
Under Voltage Lockout Feature. (Discussion applies to
ACPL-3130, ACPL-J313, and ACNW3130)
OUT1
Q1 ON
Q1 OFF
TheꢀACPL-3130ꢀcontainsꢀanꢀunderꢀvoltageꢀlockoutꢀ(UVLO)ꢀ
featureꢀthatꢀisꢀdesignedꢀtoꢀprotectꢀtheꢀIGBTꢀunderꢀfaultꢀ
conditionsꢀ whichꢀ causeꢀ theꢀ ACPL-3130ꢀ supplyꢀ voltageꢀ
(equivalentꢀ toꢀ theꢀ fully-chargedꢀ IGBTꢀ gateꢀ voltage)ꢀ toꢀ
dropꢀbelowꢀaꢀlevelꢀnecessaryꢀtoꢀkeepꢀtheꢀIGBTꢀinꢀaꢀlowꢀ
resistanceꢀstate.ꢀWhenꢀtheꢀACPL-3130ꢀoutputꢀisꢀinꢀtheꢀhighꢀ
stateꢀandꢀtheꢀsupplyꢀvoltageꢀdropsꢀbelowꢀtheꢀACPL-3130ꢀ
Q2 ON
Q2 OFF
V
OUT2
I
LED2
t
PHL MAX
t
PLH MIN
- t
PDD* MAX = (t
)
= t
- t
PHL MAX PLH MIN
PHL PLH MAX
V
–ꢀthresholdꢀ(9.5ꢀ<ꢀV
–ꢀ<ꢀ12.0)ꢀtheꢀoptocouplerꢀ
UVLO
UVLO
outputꢀwillꢀgoꢀintoꢀtheꢀlowꢀstateꢀwithꢀaꢀtypicalꢀdelay,ꢀUVLOꢀ
TurnꢀOffꢀDelay,ꢀofꢀ0.6ꢀµs.
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR PDD CALCULATIONS THE PROPAGATION DELAYS
ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
WhenꢀtheꢀACPL-3130ꢀoutputꢀisꢀinꢀtheꢀlowꢀstateꢀandꢀtheꢀ
Figure 39. Minimum LED Skew for Zero Dead Time.
+ꢀthresholdꢀ
UVLO
(11.0ꢀ<ꢀV
+ꢀ<ꢀ13.5)ꢀtheꢀoptocouplerꢀoutputꢀwillꢀgoꢀintoꢀ
UVLO
Toꢀminimizeꢀdeadꢀtimeꢀinꢀaꢀgivenꢀdesign,ꢀtheꢀturnꢀonꢀofꢀ
LED2ꢀshouldꢀbeꢀdelayedꢀ(relativeꢀtoꢀtheꢀturnꢀoffꢀofꢀLED1)ꢀ
soꢀthatꢀunderꢀworst-caseꢀconditions,ꢀtransistorꢀQ1ꢀhasꢀjustꢀ
turnedꢀoffꢀwhenꢀtransistorꢀQ2ꢀturnsꢀon,ꢀasꢀshownꢀinꢀFigureꢀ
theꢀhighꢀstateꢀ(assumesꢀLEDꢀisꢀ“ON”)ꢀwithꢀaꢀtypicalꢀdelay,ꢀ
UVLOꢀTurnꢀOnꢀDelayꢀofꢀ0.8ꢀµs.
14
12
(12.3, 10.8)
MAX
10
(10.7, 9.2)
350ꢀnsꢀoverꢀtheꢀoperatingꢀtemperatureꢀrangeꢀofꢀ-40°Cꢀtoꢀ
100°C.
8
6
4
2
Delayingꢀ theꢀ LEDꢀ signalꢀ byꢀ theꢀ maximumꢀ propagationꢀ
delayꢀdifferenceꢀensuresꢀthatꢀtheꢀminimumꢀdeadꢀtimeꢀisꢀ
zero,ꢀbutꢀitꢀdoesꢀnotꢀtellꢀaꢀdesignerꢀwhatꢀtheꢀmaximumꢀ
deadꢀtimeꢀwillꢀbe.ꢀTheꢀmaximumꢀdeadꢀtimeꢀisꢀequivalentꢀ
toꢀ theꢀ differenceꢀ betweenꢀ theꢀ maximumꢀ andꢀ minimumꢀ
propagationꢀ delayꢀ differenceꢀ specificationsꢀ asꢀ shownꢀ inꢀ
Figureꢀ40.ꢀTheꢀmaximumꢀdeadꢀtimeꢀforꢀtheꢀACPL-3130ꢀisꢀ
700ꢀnsꢀ(=ꢀ350ꢀnsꢀ-ꢀ(-350ꢀns))ꢀoverꢀanꢀoperatingꢀtemperatureꢀ
rangeꢀofꢀ-ꢀ40°Cꢀtoꢀ100°C.
(10.7, 0.1)
5
(12.3, 0.1)
15
0
0
10
20
(V
- V
) - SUPPLY VOLTAGE - V
EE
CC
Figure 38. Under Voltage Lock Out.
NoteꢀthatꢀtheꢀpropagationꢀdelaysꢀusedꢀtoꢀcalculateꢀPDDꢀ
andꢀdeadꢀtimeꢀareꢀtakenꢀatꢀequalꢀtemperaturesꢀandꢀtestꢀ
conditionsꢀ sinceꢀ theꢀ optocouplersꢀ underꢀ considerationꢀ
areꢀtypicallyꢀmountedꢀinꢀcloseꢀproximityꢀtoꢀeachꢀotherꢀandꢀ
areꢀswitchingꢀidenticalꢀIGBTs.
ꢀꢆ
800
700
600
500
400
300
I
LED1
P
(mW)
S
I
(mA) FOR ACPL-3130
S
OPTION 060
V
OUT1
Q1 ON
I
(mA) FOR ACPL-J313
S
Q1 OFF
Q2 ON
Q2 OFF
V
OUT2
200
100
I
LED2
t
PHL MIN
0
t
PHL MAX
0
25 50 75 100 125 150 175 200
- CASE TEMPERATURE - °C
t
PLH
MIN
T
S
t
PLH MAX
Figure 41. Thermal Derating Curve, Dependence of Safety Limiting Value
with Case Temperature per IEC/EN/DIN EN 60747-5-2 for ACPL-3130 (op-
tion 060) and ACPL-J313.
(t
t
)
PHL- PLH MAX
PDD* MAX
MAXIMUM DEAD TIME
(DUE TO OPTOCOUPLER)
1000
= (t
= (t
- t
) + (t
) - (t
- t
PLH MIN
)
)
PHL MAX PHL MIN
PLH MAX
P
I
(mW)
(mA)
- t
- t
S
S
PHL MAX PLH MIN
PHL MIN PLH MAX
900
800
700
600
500
400
300
200
100
= PDD* MAX - PDD* MIN
*PDD = PROPAGATION DELAY DIFFERENCE
NOTE: FOR DEAD TIME AND PDD CALCULATIONS ALL PROPAGATION
DELAYS ARE TAKEN AT THE SAME TEMPERATURE AND TEST CONDITIONS.
Figure 40. Waveforms for Dead Time.
0
0
25
50
75 100 125 150 175
T
- CASE TEMPERATURE - °C
S
Figure 42. Thermal Derating Curve, Dependence of Safety Limiting Value
with Case Temperature per IEC/EN/DIN EN 60747-5-2 for ACNW3130.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2005-200ꢅ Avago Technologies, Limited. All rights reserved. Obsoletes AV0ꢀ-0ꢃꢁ0EN
AV02-0ꢀ5ꢃEN - June ꢀꢅ, 200ꢅ
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