ATA6830-PKH [ATMEL]
INTELLIGENT STEPPER MOTOR DRIVER; 智能步进电机驱动器型号: | ATA6830-PKH |
厂家: | ATMEL |
描述: | INTELLIGENT STEPPER MOTOR DRIVER |
文件: | 总23页 (文件大小:472K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Features
• 2-Phase 1 A Stepping Motor Driver
• Compensated Half Step Operation
• Chopper Current Control
• Unidirectional Single Wire Bus Interface with Error Feedback
• Intelligent Travel Operation Control
• Referencing by Extending or Retracting
Application
• Dynamic Headlamp Adjustment
Intelligent
Stepper Motor
Driver
Benefits
• Error Recognition with Feedback
• Short Circuit Protected Outputs
• Overtemperature Warning and Shut Off
• Supply Voltage Supervision
ATA6830
Electrostatic sensitive device.
Observe precautions for handling.
Description
The circuit serves to control a stepping motor for dynamic headlamp beam adjustment
in automobiles. Two chopper-controlled H-bridges serve as the stepping motor driver.
The circuit receives the commands to control the stepping motor by means of a unidi-
rectional serial single-wire bus.
An integrated process control independently moves the stepping motor into the new
desired position. This allows it to be automatically accelerated and slowed down. The
stepping motor is operated in compensated half-step operation. The maximum clock
frequency at which the stepping motor is operated depends on the supply voltage, the
chip temperature, the operating mode, and position difference.
Rev. 4575C–BCD–05/03
Figure 1. Block Diagram
VDD
VSS
BUS
Voltage
Regulator
UART
VBAT1A
SM1A
VBAT1B
SM1B
Command Interpreter
SRA
SRB
SM2A
SM2B
VBAT2A
VBAT2B
Test Logic
ATA6830
Pin Configuration
Figure 2. Pinning QFN 28
28
27
26
25
24
23
22
1
2
3
4
5
6
7
21
20
19
18
17
16
15
VBAT1A
n.c.
VBAT1B
n.c.
SM1A
SRA
SM1B
SRB
ATA6830
SM2A
n.c.
SM2B
n.c.
VBAT2A
VBAT2B
8
9
10
11
12
13
14
2
ATA6830
4575C–BCD–05/03
ATA6830
Pin Description
Pin
Symbol
VBAT1A
n.c.
Function
1
Battery voltage
2
Not connected
3
SM1A
SRA
Connection for stepping motor winding A
Sense resistor A connection
4
5
SM2A
n.c.
Connection for stepping motor winding A
Not connected
6
7
VBAT2A
n.c.
Battery voltage
8
Not connected
9
SCI1
Test pin, please connect to ground for EMC reasons
Test pin, please connect to ground for EMC reasons
Test pin, please connect to ground for EMC reasons
Test pin, please connect to ground for EMC reasons
Test pin, please connect to ground for EMC reasons
Test pin, please connect to ground for EMC reasons
Battery voltage
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
SCO1
SCI2
SCO2
TA
TTEMP
VBAT2B
n.c.
Not connected
SM2B
SRB
Connection for stepping motor winding B
Sense resistor B connection
SM1B
n.c.
Connection for stepping motor winding B
Not connected
VBAT1B
BUS
Battery voltage
Receives the control instructions via the single wire bus from the controller
5 V supply voltage output
VDD
VSS
Digital signal ground
AGND
Analog signal ground
Reference current setting. Connected externally with a resistor to AGND. The value of the resistor
determines all internal current sources and sinks.
26
RSET
Oscillator pin, connected externally with a capacitor to AGND. The value of the capacitance determines
the chopper frequency and the baud rate for data reception.
27
28
COS
n.c.
Not connected
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4575C–BCD–05/03
Functional Description
Analog Part
Figure 3. Analog Blocks
VBAT
VDD
Supply
Bias
Bias
Oscillator
Voltage
Regulator
Voltage
Supervisor
Temperature
Supervisor
Voltage Levels
Temperature Levels
Bandgap
Generator
Clock
Reset
COS
RSET
AGND
VSS
The circuit contains an integrated 5 V regulator to supply the internal logic and analog
circuit blocks. The regulator uses an adjusted bandgap as voltage reference. Also all
other parts that require an excellent voltage reference, such as the voltage monitoring
block refer to the bandgap.
The bias generator derives its accurate currents from an external reference resistor. The
oscillator is used for clocking the digital system. All timings like the baud rate, the step
duration and the chopper frequency are determined from it. An external capacitor is
used for generating the frequency.
The voltage monitoring enables the circuit to drive the stepping motor at different battery
voltage levels. According to the battery voltage the stepping motor will be accelerated to
a maximum step velocity. In case of under or over voltage the motor will shut off. A tem-
perature monitoring is used for shut off at overtemperature conditions and current boost
in case of low temperature.
4
ATA6830
4575C–BCD–05/03
ATA6830
Digital Part
Figure 4. Digital Blocks
Clk
Step Time Memory
Temperature Signals
Maximum Step Time
New Step Time
Reset
Voltage Levels
Actual Step Time
Error Signals
UART
shiftclk
bitstream
rxd
reference run
new position
Data
Recognition
&
BUS
Clock
Recovery
Stepper Motor Control
Cruise Control
Parity-Check
VREF
Bitstream
Recovery
Desired Position
Instantaneous Position
Error Timer
Error Signals
Figure 4 shows all digital blocks of the circuit. The stepping motor will be controlled by
commands via the bus input pin. An analog comparator is used as a level shifter at the
input. There is also a possibility of clamping the bus pin to ground. This will be used after
detecting an error to feedback this to the microcontroller.
The next block is a UART. Its task is clock recovery and data recognition of the incoming
bit stream. For clock recovery a special bitstream is used after each power on. The gen-
erated bitstream will be analyzed and after a correct parity check interpreted for
execution.
A sophisticated cruise control generates all control signals for the two H-bridge drivers.
It uses an internal step-time table for accelerating and decelerating the stepping motor
depending on the actual and desired position and the temperature and voltage levels.
Exception handling is integrated to interpret and react on the temperature, supply volt-
age, and coil-current signals from the analog part.
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4575C–BCD–05/03
Stepping Motor Driver
Figure 5. H-bridge Driver Stage
Stepper Motor Control
Error Signals
Driver Logic
VBAT
Temperature
Shutdown
Temp. Shutdown
Temp. Warning
SM1x
SM2x
Temperature
Warning
Clk
SRx
Vref
Reset
Shunt
Figure 5 shows the diagram of one H-bridge driver stage. It consists of two NMOS and
two PMOS power transistors. An external shunt is used for measuring the current flow-
ing through the motor coil. Additional comparators and current sensing circuitry is
integrated for error detection.
Data Communication
The circuit receives all commands for the stepping motor via a single wire bus. In idle
mode the bus pin is pulled up by an internal current source near to VBAT voltage. Dur-
ing the transmission the external transmitter has to pull down the bus level to send
information about data and clock timing. The used baud rate has to be about 2400 baud.
Because of oscillator tolerances a synchronization sequence has to be sent at the
beginning of data transfer.
Figure 6 shows the pattern used for this sequence. The circuit uses the 1-0-1-0
sequences for adjusting the internal bit time. Later on during data transfer every 1-0-1-0
sequence coming up randomly is used for resynchronization. Thus all tolerances that
occur during operation will be eliminated.
To obtain a synchronization of up to 15% oscillator tolerance the pattern has to be sent
at least 4 times.
6
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ATA6830
Figure 6. Synchronization Sequence
SYNCHRONIZATION PATTERN
PARITY
BIT
START
BIT
PARITY
BIT
STOP
BIT
START
BIT
STOP
BIT
Between two commands a pause has to be included. This is necessary for a clear rec-
ogition of a new message frame (command). Figure 7 shows the timing diagram of two
commands.
Figure 7. Message Frame and Space
MESSAGE FRAME
SPACE
HIGH BYTE LOW BYTE
Every command consists of 16 bits. They will be sent with two bytes. Figure 8 shows the
message frame. The high byte is sent first, immediately followed by the low byte. Every
byte starts with a start bit and ends with a parity bit and a stop bit. The first start bit (level
0) after a pause (level 1) indicates the beginning of a new message frame. The value of
the parity bit has to be odd, i.e., the crossfooting of the byte including the parity bit is
odd. If a data packet is not recognized due to a transmission error (parity error), the
entire command is rejected.
Figure 8. Command Bits
MESSAGE FRAME
HIGH BYTE
LOW BYTE
PARITY
BIT
START
BIT
PARITY
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
STOP
BIT
START
BIT
STOP
BIT
8 DATA
BITS
8 DATA
BITS
7
4575C–BCD–05/03
Bus Commands
There are different commands for controlling the stepping motor. Table 1 shows a list of
all implemented commands and their meanings. The first command, the synchronization
sequence, is described above. The second group of commands are the reference com-
mands. A reference run command causes the stepping motor to make an initial run. It is
used to establish a defined start position for the following position commands. The way
the reference run is executed will be described later. There are two reference run com-
mands. The difference is the turn direction of the stepping motor. This makes the circuit
more flexible for different applications. The turn direction is coded in the 4 identifier bits.
Table 1. Bus Commands
High Byte
Mode
Low Byte
Data
Data
Identifier
Bus Command
7
1
0
0
6
0
0
0
5
4
0
0
0
0
0
3
1
1
0
1
0
2
0
0
1
0
1
1
1
0
1
0
1
0
0
1
0
1
0
7
1
0
0
6
0
0
0
5
1
0
0
4
0
0
0
3
1
0
0
2
0
0
0
1
1
0
0
0
0
0
0
Synchronization
1
0
0
0
0
Reference run (extend)
Reference run (retract)
New position (0 = full extension)
New position (0 = full retraction)
D8 D9
D8 D9
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
New position
(testmode, 0 = full extension)
D8 D9
D8 D9
1
1
1
1
1
0
0
1
0
1
1
0
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
New position
(testmode, 0 = full retraction)
The last class of commands are the position commands. Every new position will be sent
as an absolute value. This makes the transmission more safe in terms of losing a posi-
tion command. The next received command tells the stepping motor the right position
again. For the position data there are 10 bits available (D0 to D9).
The maximum possible step count to be coded with 10 bit is 1024. Though position com-
mands up to 1024 will be executed, it´s prohibited to use values higher than 698, as this
is the step count of the reference run. For details see chapter “Reference Run”.
There are 4 new position commands. They differ in the identifier and in the modus bits.
The identifier fixes the turn direction. For test purposes there are new position com-
mands with a different mode. In this mode the stepping motor works with a reduced coil
current. This may be used for end tests in the production of the application.
Any command with modus or identifier different to the first reference run will be ignored.
Thus it is also not possible to change modus or identifier by performing a second refer-
ence run.
8
ATA6830
4575C–BCD–05/03
ATA6830
Power-up Sequence
After power-up the circuit has to be synchronized and a reference run has to be exe-
cuted before a position command can be carried out. Figure 9 shows a timing diagram
on how the necessary sequences follow each other.
Figure 9. Necessary Commands after Power-up
POWER
UP
SYNCHRONIZATION
SEQUENCE
REFERENCE RUN
SEQUENCE
POSITION 1
POSITION 2
1
2
4
1
2
10
MESSAGE
FRAME
The first sequence is the synchronization sequence. Its pattern (Figure 6) should be
sent at least 4 times to be sure that the following commands will be recognized. If there
are distortions on the bus it is helpful to send this sequence more than 4 times. A RC
lowpass filter at the bus pin (Figure 16) helps to reduce distortsions.
After synchronization the stepping motor has to make the reference run to initialize its
zero position. The first reference run will only be executed if the circuit recognizes this
command three times in series. This function is implemented contributing to the impor-
tance of the reference run. After the reference run the circuit will switch to normal
operation. To perform a reference run during normal operation, the command has to be
sent only once. Figure 10 shows the state diagram for the implemented sequence
processor.
9
4575C–BCD–05/03
Figure 10. Flow Diagram for the Power-up Sequence
reset state
N
synchronization
Y
idle state
N
3 successive
reference run
commands
Y
reference run
new position?
Y
N
cruise control
idle state
10
ATA6830
4575C–BCD–05/03
ATA6830
Reference Run
In normal operation, new position commands are transmitted as absolute values. To
drive the stepping motor to these absolute positions, the circuit has to know the motor’s
zero position. Therefore, the stepping motor has to perform a reference run after each
power-up in which it is extended or retracted to its limit stop. Before the execution of the
reference run, the motor is supplied with hold current.
As the actual position is not known at the beginning of the reference run the whole posi-
tion range has to be passed. To optimize performance for smaller actuators, the
reference run has been reduced to 698 steps. Therefore, it is prohibited to access posi-
tions higher than 698, because in a following reference run the stepping motor would not
reach its zero position.
If it is necessary that the entire range up to position 1024 can be used, the reference run
has to be executed twice. Since any command during reference run is ignored, the sec-
ond reference command has to be sent about 2.4 s after the first command.
To avoid any possible mistake, e.g., the loss of a step during the reference run or the
bouncing at the limit stop, there is a special run to be executed.
This is shown in Table 2.
Table 2. Reference Run Course
Phase
Action
Int. Counter
Steptime
3300 µs
2895 µs
2540 µs
2240 µs
2240 µs
2240 µs
2549 µs
2895 µs
3300 µs
3300 µs
3300 µs
3300 µs
varied
Ramp up to 446 Hz step frequency
Drive
704
703
702
701
700 to 11
10
through
I
the
whole
Drive at constant speed
Ramp down to minimum step
frequency (303 Hz)
range
9
(698
steps)
II
III
IV
V
8
7 to 6
6
Wait for 6 Pꢀ3300 µs with the last coil current
Perform another 6 steps with 3300 µs
5 to 0
0
VI
VII
Wait for 5 Pꢀ3300 µs with the last coil current
Set current to hold current; normal operation
varied
Cruise Control
The travel operation control independently moves the stepping motor into its new posi-
tion. To reach the new position as fast as possible but without abrupt velocity changes,
the stepping motor is accelerated or slowed down depending on the difference between
actual and nominal position. If this difference is huge the stepping frequency will
increase (acceleration). When the new position is nearly reached, the frequency will
decrease again (deceleration). In the case of a new nominal position opposite to the
direction of the motion being from the microcontroller, the stepping frequency will
decrease to its starting value (300 Hz) before the direction can turn. The cruise control is
shown in Figure 11.
The possible stepping frequencies for velocity control are shown in Table 3.
11
4575C–BCD–05/03
Figure 11. Dynamic Frequency Adaption
frequency
present
frequency
minimum
frequency
position
(300 Hz)
nominal
position
time t+1
nominal
positon
time t
present position
Table 3. Frequency Ramp
Number
1
Step Frequency (Hz)
Step Time (µs)
3300
2895
2540
2240
2030
1860
1740
1630
1540
1470
1400
1350
1300
1250
1210
1170
1140
1110
1080
1050
1020
1000
303
345
394
446
493
538
575
613
649
680
714
741
769
800
826
855
877
901
926
952
980
1000
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
In addition to the actual step frequency there is a maximum step frequency up to which
the actual step frequency can rise. To secure a correct operation at low supply voltages
the maximum value for the stepping frequency is smaller at low voltages. If the supply
voltage falls below the 9 V threshold, travel operation will suspend. To restart operation,
the supply voltage has to rise above 10.5 V. The relation of the maximum step fre-
quency and the supply voltage during operation is shown in Table 4.
12
ATA6830
4575C–BCD–05/03
ATA6830
If the chip temperature exceeds the overtemperature warning threshold, the step speed
is reduced to 300 Hz. If the chip temperature rises further the output driver is shut off.
Table 4. Maximum Step Frequency
Maximum Step Frequency
at Rising Voltage
Maximum Step Frequency
(VBAT once > 10.5 V)
VBAT
< 9 V
No operation
No operation
No operation
No operation
850 Hz (1.17 ms)
1000 Hz (1 ms)
No operation
No operation
9 V to 9.5 V
9.5 V to 10 V
10 V to 10.5 V
10.5 V to 11 V
> 11 V
300 Hz (3.33 ms)
500 Hz (2.03 ms)
680 Hz (1,47 ms)
850 Hz (1.17 ms)
1000 Hz (1 ms)
No operation
> 20 V
Step Operation
The stepping motor is operated in halfstep-compensation mode. The current for both
coils is shown in Figure 12. The current levels are increased when the temperature is
below 0LC to secure operation. For final tests at the end of the application production
line the currents are reduced.
Figure 12. Compensated Halfstep Operation
coil A
700mA
500mA
half steps
-500mA
-700mA
1
2
3
4
5
6
7
8
coil B
700mA
500mA
half steps
-500mA
-700mA
Bridge Current Control
The bridge current is controlled by a chopper current control, shown in Figure 13. The
current is turned on every 40 µs (25 kHz chopper frequency). The current flow in the H-
bridge is shown in Figure 14a. After a blanking time of 2.5 µs to suppress turn-on peaks
the current is measured via the shunt voltage. As soon as the current has reached its
nominal value it is turned off again. The current flow in this state is shown in Figure 14b.
13
4575C–BCD–05/03
Figure 13. Chopper Current Control
turn on signal
Imax
coil current
flyback
comparator
shunt resistor
voltage
blanking time
Figure 14. Current Flow in Halfbridge
ON
OFF
ON
ON
ON
OFF
OFF
OFF
a)
b)
Exception Handling
During operation, different exceptional states or errors can arise to which the circuit
must correspondingly react. These are described below:
•
Supply voltage below 9 V
Travel operation is suspended for the duration of the undervoltage. The output current
will be set to zero. When the supply voltage rises above 10.5 V, travel operation
restarts.
•
Supply voltage above 20 V
Travel operation is suspended for the duration of the undervoltage. The output current
will be set to zero. When the supply voltage falls below 20 V, travel operation restarts.
•
Overtemperature warning
The maximum stepping speed is reduced to 300 Hz. This ensures a safe shut-off proce-
dure if the temperature increases to shut-off temperature.
•
Overtemperature shut-off
14
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4575C–BCD–05/03
ATA6830
Travel operation is suspended when overtemperature is detected. An error signal is sent
to the bus master via the bus. Operation can only restart after the supply voltage is shut
off.
•
Interruption of a stepping motor winding
The motor windings are only checked for interruption when supplied with hold current,
not during drive operation. The corresponding output is shut off. The other coil winding
is supplied with hold current. An error signal is sent. Operation can only restart after the
supply voltage is shut off.
•
Short circuit of a stepping motor winding
The corresponding output is shut off. The other coil winding is supplied with hold cur-
rent. An error signal is sent. Operation can only restart after the supply voltage is shut
off.
•
Short circuit of an output to ground or VBAT
The corresponding output is shut off. The other coil winding is supplied with hold cur-
rent. An error signal is sent. Operation can only restart after the supply voltage is shut
off.
An error signal is sent to the microcontroller by clamping the bus to ground for 3 sec-
onds. If the error should occur during a data transmission, the above described
reactions will happen immediately except for the clamping. This will take place about
200 µs after the end of the stopbit of the lowbyte to guarantee a correct command rec-
ognintion in the second headlamp. The error signal timing is shown in Figure 15.
Figure 15. Error Signal Timing
MESSAGE FRAME
ca. 9.2 ms
ERROR RESPONSE
3 s
1
Buslevel
0
Absolute Maximum Ratings
Parameters
Symbol
VBAT
VBAT
IOUT
Value
Unit
V
Power supply (t < 400 ms)
DC power supply
-0.3 to +45
-0.3 to +28
±1.1
V
DC output current
A
BUS input voltage
VBUS
ESD
ESD
TStg
-0.3 to VBAT +0.3
2
V
Human body model
Charged device model
Storage temperature
Operating temperature
Maximum junction temperature
kV
V
500
-55 to +150
-40 to +105
+150
LC
LC
LC
Top
Tjmax
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4575C–BCD–05/03
Thermal Resistance
Parameters
Symbol
RthJC
Value
5
Unit
K/W
K/W
Thermal resistance junction-case
Thermal resistance junction-ambient
RthJA
35
Operating Range
Parameters
Symbol
VBAT
Value
7 to 20
Unit
V
Power supply range
Operating temperature range
Top
-40 to +105
LC
Electrical Characteristics
No.
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Type*
Pin
1
Supply
Supply current
VBAT = 14 V
(no motor current)
1, 7,
15, 21
1.1
1.2
I_total
4
7
mA
V
A
C
Supply voltage
Normal operation
1, 7,
15, 21
VBATsup
7.0
20
1.3
1.4
2
VDD voltage
VDD voltage
Bus Port
23
23
VVDD_13V
VVDD_7V
4.9
4.8
5.0
5.0
5.1
5.1
V
V
A
A
VBAT = 7.0 V
Threshold voltage
VBAT = 12.0 V, rising
edge
2.1
2.2
22
22
VLH_BUS_12
VHL_BUS_12
5.5
4.5
6.5
5.5
7.5
6.5
V
V
A
A
Threshold voltage
VBAT = 12 V, falling
edge
2.3
2.4
Hysteresis
22
22
VHYS_BUS12
IOUT_BUS_8
1
V
A
A
Input current
Saturation voltage
VBUS = 0 V
-400
-300
-220
0.5
µA
IBUS = 2 mA, bus
clamping
2.5
22
22
VSAT_BUS_7
IPulldwn_7
V
A
A
2.6
Pulldown current
Oscillator
At error condition
2
mA
3
Frequency
COS = 100 pF ±5%
3.1
27
FOSC_13
340
400
460
kHz
A
RSET = 20 kꢁꢀ±1%
4
Reference
4.1
4.2
5
Reference voltage
Reference voltage
Full Bridges
RDSON
RSET = 20 kꢁꢀ±1%
26
26
VRSET_13V
VRSET_7V
2.4
2.3
2.5
2.5
2.6
2.6
V
V
A
A
VBAT = 7 V
RDSON of half-bridge
3, 5,
17, 20
5.1
RDSon
1.2
1.7
ꢁ
B
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1. cmd = command
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ATA6830
Electrical Characteristics (Continued)
No.
Parameters
Test Conditions
Output stage off
Hold mode
Symbol
Min.
Typ.
Max.
Unit
Type*
Pin
3, 5,
17, 20
5.2
Output current
ILEAK
10
µA
A
3, 5,
17, 20
5.3
5.4
5.5
Output current
Output current
Output current
VSHUNT18
VSHUNT99
VSHUNT182
40
55
200
360
600
mA
mA
mA
B
B
B
RSHUNT = 240 mꢁ
Test mode
RSHUNT = 240 mꢁ
3, 5,
17, 20
240
500
300
550
Normal mode
RSHUNT = 240 mꢁ
3, 5,
17, 20
Normal mode
(T <0LC)
RSHUNT = 240 mꢁ
3, 5,
17, 20
5.6
5.7
5.8
Output current
Output current
Output current
VSHUNT218
VSHUNT257
VSHUNT309
600
700
840
660
780
720
860
mA
mA
B
B
Halfstep
compensation
3, 5,
17, 20
RSHUNT = 240 mꢁ
Halfstep comp-
ensation (T < 0LC)
3, 5,
17, 20
936
1.6
1040
mA
A
B
A
RSHUNT = 240 mꢁ
3, 5,
17, 20
5.9
Overcurrent threshold Highside switch
Overcurrent threshold Lowside switch
IOC_H
IOC_L
3, 5,
17, 20
5.10
1.6
A
B
D
5.11
6
Chopper frequency
1/16
fcos
Voltage Comparators
6.1
Threshold voltage
Threshold voltage
Hysteresis
9.0 V comparator,
rising edge
1, 7,
15, 21
V9_UP
V9_DOWN
V9_HYS
8.8
8.6
9.1
8.9
9.4
9.2
V
V
A
A
A
A
A
A
A
A
A
A
A
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
6.10
6.11
9.0 V comparator,
falling edge
1, 7,
15, 21
9.0 V comparator
1, 7,
15, 21
60
200
9.6
340
9.9
mV
V
Threshold voltage
Threshold voltage
Hysteresis
9.5 V comparator,
rising edge
1, 7,
15, 21
V9_5_UP
9.3
9.5 V comparator,
falling edge
1, 7,
15, 21
V9_5_DOWN
V9_5_HYS
V10_UP
9.1
9.4
9.7
V
9.5 V comparator
1, 7,
15, 21
60
200
10.1
9.9
340
10.4
10.2
340
10.95
10.75
mV
V
Threshold voltage
Threshold voltage
Hysteresis
10.0 V comparator,
rising edge
1, 7,
15, 21
9.8
10.0 V comparator,
falling edge
1, 7,
15, 21
V10_DOWN
V10_HYS
V10_5_UP
V10_5_DOWN
9.6
V
10.0 V comparator
1, 7,
15, 21
60
200
10.65
10.45
mV
V
Threshold voltage
Threshold voltage
10.5 V comparator,
rising edge
1, 7,
15, 21
10.35
10.15
10.5 V comparator,
falling edge
1, 7,
15, 21
V
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note: 1. cmd = command
17
4575C–BCD–05/03
Electrical Characteristics (Continued)
No.
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Type*
Pin
6.12
Hysteresis
10.5 V comparator
1, 7,
V10_5_HYS
60
200
340
mV
A
15, 21
6.13
6.14
6.15
6.16
6.17
6.18
6.19
6.20
6.21
6.22
Threshold voltage
Threshold voltage
Hysteresis
11.0 V comparator,
rising edge
1, 7,
15, 21
V11_UP
V11_DOWN
V11_HYS
V20_UP
10.8
10.6
60
11.1
10.9
200
11.4
11.2
340
V
V
A
A
A
A
A
A
A
A
A
A
11.0 V comparator,
falling edge
1, 7,
15, 21
11.0 V comparator
1, 7,
15, 21
mV
V
Threshold voltage
Threshold voltage
Hysteresis
20.0 V comparator,
rising edge
1, 7,
15, 21
19.7
19.25
200
20.2
19.75
450
20.7
20.25
750
20.0 V comparator,
falling edge
1, 7,
15, 21
V20_DOWN
V20_HYS
V9_DOWN
V10_5_UP
MDIS_HYS
D9.5-9_R
V
20.0 V comparator
1, 7,
15, 21
mV
V
Threshold voltage
Threshold voltage
Hyteresis
Motor disable
(falling voltage)
1, 7,
15, 21
8.6
8.9
9.2
Motor enable
(rising voltage)
1, 7,
15, 21
10.35
1.3
10.65
1.7
10.95
2.1
V
Undervoltage turn off
1, 7,
15, 21
V
Distance
9.5 V to 9 V
comparator rising
edges
1, 7,
15, 21
300
500
700
mV
6.23
6.24
6.25
6.26
6.27
6.28
6.29
Distance
Distance
Distance
Distance
Distance
Distance
Distance
9.5 V to 9 V
comparator falling
edges
1, 7,
15, 21
D9.5-9F
D10-9.5R
D10-9.5F
D10.5-10R
D10.5-10F
D11-10.5R
D11-10.5F
300
300
300
300
300
300
300
500
500
500
500
500
500
500
700
700
700
700
700
700
700
mV
mV
mV
mV
mV
mV
mV
A
A
A
A
A
A
A
10 V to 9.5 V
comparator rising
edges
1, 7,
15, 21
10 V to 9.5 V
comparator falling
edges
1, 7,
15, 21
10.5 V to 10 V
comparator rising
edges
1, 7,
15, 21
10.5 V to 10 V
comparator falling
edges
1, 7,
15, 21
11 V to 10.5 V
comparator rising
edges
1, 7,
15, 21
11 V to 10.5 V
comparator falling
edges
1, 7,
15, 21
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note:
1. cmd = command
18
ATA6830
4575C–BCD–05/03
ATA6830
Electrical Characteristics (Continued)
No.
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Type*
Pin
7
Timing
Baud rate
fcos = 340 to 460 kHz,
full synchronization
7.1
7.2
7.3
22
22
Baud
TD
2350
5
2400
2450
Baud
ms
C, D
C, D
Delay time
Pause time
2 following
commands
Between high and low
byte
22
22
TP
0
3
µs
s
C, D
C, D
7.4
Clamping time
Bus error clamping
Tcl
3
3
8
Logic
Reference run
detection
Commands in series
to execute first
reference run
8.1
Ref3
Sync
3
4
cmd (1)
cmd (1)
D
D
Synchronization
15% oscillator
tolerance
8.2
9
Thermal Values
Thermal prewarning
Hysteresis
9.1
9.2
9.3
T_150
T_150HYS
T_160
150
10
LC
LC
LC
B
B
B
Thermal prewarning
Thermal shut down
160
Thermal current
boost
9.5
9.6
T_0
0
LC
LC
B
B
Hysteresis
Thermal currrent
boost
T_0_HYS
10
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Note: 1. cmd = command
Soldering Recommendations
Parameters
Symbol
TD
Value
1 to 3
Unit
Maximum heating rate
LC/s
LC
s
Peak temperature in preheat zone
Duration of time above melting point of solder
TPH
100 to 140
tMP
minimum 10
maximum 75
Peak reflow temperature
Maximum cooling rate
TPeak
TPeak
220 to 225
2 to 4
LC
LC/s
19
4575C–BCD–05/03
Figure 16. Application Circuit
GND
IGN
BUS
D1
C6
C5
C4
R2
C3
C1
C2
R3
R4
R1
28
27
26
25
24
23
22
1
21
20
19
18
17
16
15
2
3
4
5
6
7
ATA6830
8
9
10
11
12
13
14
SM
20
ATA6830
4575C–BCD–05/03
ATA6830
Table 5. Bill of Material
Reference
C1
Component
Value
Oscillator capacitor
Bus input capacitor
Ceramic capacitor
Capacitor
100 pF, 5%
1 nF
C2
C3
100 nF
C4
10 µF
C5
Capacitor
100 µF
C6
Capacitor
100 nF
D1
Rectifier
–
R1
Reference resistor
Bus input resistor
Shunt resistor side A
Shunt resistor side A
20 kꢁ, 1%
1 kꢁ, 5%
0.24 ꢁ, 5%
0.24 ꢁ, 5%
R2
R3
R4
21
4575C–BCD–05/03
Ordering Information
Extended Type Number
Package
Remarks
ATA6830-PKH
QFN 28
7 mm Pꢀ7 mm
Package Information
The package is a thermal power package MLF 7 Pꢀ7 with a soldered leadframe and 28 pins. The overall size is 7 Pꢀ7 mm2.
22
ATA6830
4575C–BCD–05/03
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© Atmel Corporation 2003.
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4575C–BCD–05/03
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