AOZ1341 [AOS]
Dual Channel USB Switch; 双通道USB开关
| 型号： | AOZ1341 |
| 厂家： | 
ALPHA & OMEGA SEMICONDUCTORS |
| 描述： | Dual Channel USB Switch |
| 文件： | 总16页 (文件大小：836K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AOZ1341
Dual Channel USB Switch
General Description
Features
The AOZ1341 is a member of Alpha and Omega
Semiconductor’s dual channel power distribution switch
family intended for applications where heavy capacitive
loads and short-circuits are likely to be encountered. This
device incorporates 70 mΩ N-channel MOSFET power
switches for power-distribution systems that require
multiple power switches in a single package. Each switch
is controlled by a logic enable input. Gate drive is
provided by an internal charge pump designed to control
the power-switch rise times and fall times to minimize
current surges during switching. The charge pump
requires no external components and allows operation
from supplies as low as 2.7 V.
z Typical 70 mΩ (NFET)
z 1 A maximum continuous current
z V Range: 2.7 V to 5.5 V
IN
z Open Drain Fault Flag
z Fault Flag deglitched (blanking time)
z Discharge switch for shutdown
z Thermal shutdown
z Reverse current blocking
z Packages: Exposed Pad MSOP-8 and SO-8
Applications
z Notebook Computers
z Desktop Computers
The AOZ1341 is available in an Exposed Pad MSOP-8
or an SO8 8-pin package and is rated over the
-40 °C to +85 °C ambient temperature range.
Typical Application
VIN
OUT1
IN
LOAD
LOAD
C3
C1
0.1μF
22μF
R2
10kΩ
R1
10kΩ
AOZ1341
Cx
OC1
EN1/EN1
OC2
OUT2
C4
0.1μF
C2
22μF
EN2/EN2
GND
Rev. 1.1 June 2011
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Page 1 of 16
AOZ1341
Ordering Information
Maximum
Typical
Continuous
Current
Short-circuit
Current Limit
Part Number
Enable Setting
Package
Environmental
AOZ1341AI
AOZ1341AI-1
AOZ1341EI
Active Low
Active High
Active Low
Active High
SO-8
Green Product
RoHS Compliant
1 A
1.5 A
Exposed Pad
MSOP-8
AOZ1341EI-1
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
GND
OC1
GND
IN
OC1
IN
EN1/EN1
EN2/EN2
OUT1
OUT2
OC2
OUT1
OUT2
OC2
PAD
EN1/EN1
EN2/EN2
Exposed Pad MSOP-8
SO-8
(Top View)
(Top View)
Pin Description
Pin Name
Pin Number
Pin Function
GND
IN
1
2
3
4
5
6
7
8
Ground
Input voltage
EN1/EN1
EN2/EN2
OC2
Enable input, logic high/logic low turns on power switch IN-OUT1
Enable input, logic high/logic low turns on power switch IN-OUT2
Overcurrent, open-drain output, active low, IN-OUT2
Power-switch output, IN-OUT2
OUT2
OUT1
OC1
Power-switch output, IN-OUT1
Overcurrent, open-drain output, active low, IN-OUT1
Rev. 1.1 June 2011
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Page 2 of 16
AOZ1341
Absolute Maximum Ratings
Exceeding the Absolute Maximum Ratings may damage the
Recommended Operating Conditions
The device is not guaranteed to operate beyond the
device.
Recommended Operating Conditions.
Parameter
Input Voltage (VIN)
Enable Voltage (VEN
Rating
Parameter
Input Voltage (VIN)
Rating
6 V
6 V
+2.7 V to +5.5 V
-40 °C to +125 °C
)
Junction Temperature (TJ)
Package Thermal Resistance
Exposed Pad MSOP-8 (ΘJA
Storage Temperature (TS)
Maximum Continuous Current
ESD Rating(1)
-55 °C to +150 °C
1 A
)
60 °C/W
2 kV
SO-8 (ΘJA
)
115 °C/W
Note:
1. Devices are inherently ESD sensitive, handling precautions are
required. Human body model is a 100 pF capacitor discharging
through a 1.5 kΩ resistor.
Electrical Characteristics
T = 25 °C, V = 5.5 V, V = 0 V, unless otherwise specified.
A
IN
EN
(3)
Symbol
Parameter
Conditions
Min. Typ. Max. Units
POWER SWITCH
RDS(ON) Switch On-Resistance
VIN = 5.5 V, IO = 1 A
VIN = 5.5 V
70
0.6
0.4
135
1.5
1
mΩ
tr
Rise Time, Output
CL = 1 μF, RL = 5 Ω
ms
VIN = 2.7 V
tf
Fall time, output
VIN = 5.5 V
0.05
0.05
0.5
0.5
ms
VIN = 2.7 V
FET Leakage Current
Out connect to ground,
2.7 V ≤ VIN ≤ 5.5 V,
-40 °C ≤ TJ ≤ 125 °C(2)
1
μA
V(ENx) = VIN or V(ENx) = 0 V
ENABLE INPUT EN
VIH
VIL
II
High-level Input Voltage
2.7 V ≤ VIN ≤ 5.5 V
2.7 V ≤ VIN ≤ 5.5 V
2.0
V
V
Low-level Input Voltage
Input Current
0.8
0.5
3
-0.5
μA
ms
ton
toff
Turn-on Time
CL = 100 μF, RL = 5 Ω
CL = 100 μF, RL = 5 Ω
Turn-off Time
10
CURRENT LIMIT
IOS Short-circuit Output
Current (per Channel)
IOC_TRIP Overcurrent Trip
Threshold (per Channel)
V(IN) = 2.7 V to 5.5 V, OUT connected to GND,
device enable into short-circuit
1.1
1.0
1.5
1.6
1.9
2.0
A
A
V(IN) = 5 V, current ramp (≤ 100 A/s) on OUT
SUPPLY CURRENT
Supply Current, Low-level No load on OUT,
TJ = 25°C
-40 °C ≤ TJ ≤ 125 °C(2)
0.5
0.5
1
5
μA
Output
2.7 V ≤ VIN ≤ 5.5 V,
V(ENx) = VIN or V(ENx) = 0 V
Supply current, High-level No load on OUT,
TJ = 25 °C
-40 °C ≤ TJ ≤ 125 °C(2)
65
65
81
90
μA
μA
Output
V(ENx) = 0 V or V(ENx) = VIN
Reverse Leakage Current V(OUTx) = 5.5 V, IN = ground
0.2
Rev. 1.1 June 2011
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Page 3 of 16
AOZ1341
Electrical Characteristics (Continued)
T = 25 °C, V = 5.5 V, V = 0 V, unless otherwise specified.
A
IN
EN
(3)
Symbol
Parameter
Conditions
Min. Typ. Max. Units
UNDERVOLTAGE LOCKOUT
Low-level voltage, IN
2.0
2.5
0.4
V
Hysteresis, IN
200
mV
OVERCURRENT OC1 AND OC2
Output Low Voltage
VOL(OCx)
IO(OCx) = 5 mA
V
Off-state Current
OC_L Deglitch
VO(OCx) = 5 V or 3.3 V
1
μA
OCx assertion or deassertion
4
8
15
ms
THERMAL SHUTDOWN
Thermal Shutdown
Threshold
135
105
°C
°C
°C
Recovery from Thermal
Shutdown
Hysteresis
30
Note:
2. Parameters are guaranteed by design only and not production tested.
3. Pulse testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately.
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Page 4 of 16
AOZ1341
Functional Block Diagram
OC1
Deglitch
Thermal
Shutdown
EN1/EN1
Enable 1
Current
Limit
Gate Driver
OUT1
OUT2
IN
Gate Driver
Current
Limit
Thermal
Enable 2
Shutdown
EN2/EN2
OC2
Deglitch
AOZ1341
Rev. 1.1 June 2011
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Page 5 of 16
AOZ1341
Functional Characteristics
Figure 2. Turn-On Delay and Rise Time
with 1μF Load (Active Low)
Figure 1. Turn-Off Delay and Fall Time
with 1μF Load (Active Low)
EN
5V/div
EN
5V/div
VOUT
2V/div
VOUT
2V/div
200μs/div
200μs/div
Figure 4. Turn-On Delay and Rise Time
Figure 3. Turn-Off Delay and Fall Time
with 100μF Load (Active Low)
with 100μF Load (Active Low)
EN
5V/div
EN
5V/div
VOUT
2V/div
VOUT
2V/div
500μs/div
500μs/div
Figure 5. Short-circuit Current, Device Enable
to Short
Figure 6. 0.6Ω Load Connected to Vout
OC
2V/div
EN
5V/div
IOUT
500mA/div
IOUT
1A/div
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Page 6 of 16
AOZ1341
Functional Characteristics (Continued)
Figure 8. Short Circuit Current Limit
Figure 7. Inrush Current with Different Load Capacitance
EN
2V/div
EN
2V/div
220μF
470μF
IOUT
500mA/div
IOUT
500mA/div
100μF
1ms/div
20ms/div
Typical Characteristics
Figure 9. Supply Current, Output Enabled
vs. Junction Temperature
Figure 10. Supply Current, Output Disabled
vs. Junction Temperature
80
70
60
50
40
30
20
10
0
0.5
0.45
0.4
Vin=5.5V
Vin=5V
Vin=3.3V
Vin=2.7V
0.35
0.3
0.25
0.2
Vin=5.5V
0.15
0.1
Vin=5V
Vin=3.3V
Vin=2.7V
0.05
0
-50
0
50
100
150
-50
0
50
100
C)
150
Junction Temperature (°C)
Junction Temperature (
°
Figure 12. UVLO Threshold vs. Junction Temperature
Figure 11. Rds(on) vs. Ambient Temperature
2.30
2.28
2.26
2.24
2.22
2.2
160
140
120
100
80
Rising
Falling
2.18
2.16
2.14
2.12
2.10
60
Vin=2.7V
40
Vin=3.3V
Vin=5V
20
Vin=5.5V
0
-40
-20
0
20
40
60
80
-50
0
50
100
150
Ambient Temperature (°C)
Junction Temperature (°C)
Rev. 1.1 June 2011
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Page 7 of 16
AOZ1341
Typical Characteristics (Continued)
Figure 14. Turn On Time vs Input Voltage
Figure 13. OCP Trip Current vs. Input Voltage
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
C
R
T
= 100μF
= 5Ω
= 25°C
L
L
A
2
3
4
5
6
2
3
4
5
6
Input Voltage (V)
Vin (V)
Figure 16. Rise Time vs Input Voltage
Figure 15. Turn Off Time vs Input Voltage
0.6
0.5
0.4
0.3
0.2
0.1
0
2.0
1.9
1.8
1.7
1.6
1.5
C
R
T
= 100μF
= 5Ω
= 25°C
L
L
A
C
R
A
= 100μF
L
L
= 5Ω
T
= 25°C
2
3
4
5
6
2
3
4
5
6
Input Voltage (V)
Input Voltage (V)
Figure 17. Fall Time vs Input Voltage
0.6
0.5
0.4
0.3
0.2
0.1
C
R
A
= 100μF
= 5Ω
= 25°C
L
L
T
0
2
3
4
5
6
Input Voltage (V)
Rev. 1.1 June 2011
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Page 8 of 16
AOZ1341
Detailed Description
The AOZ1341 is a member of Alpha and Omega
Semiconductor’s dual channel power distribution switch
family intended for applications where heavy capacitive
loads and short-circuits are likely to be encountered. This
device incorporates 70 mΩ N-channel MOSFET power
switches for power-distribution systems that require
multiple power switches in a single package. Each switch
is controlled by a logic enable input. Gate drive is
provided by an internal charge pump designed to control
the power-switch rise and fall times to minimize current
surges during switching. The charge pump requires no
external components and allows operation from supplies
as low as 2.7 V.
Enable
The logic enable disables the power switch, charge
pump, gate driver, logic device, and other circuitry to
reduce the supply current. When the enable receives a
logic high the supply current is reduced to approximately
1 μA. The enable input is compatible with both TTL and
CMOS logic levels.
Over-current
The over-current open drain output is asserted
(active low) when an over-current condition occurs.
The output will remain asserted until the over-current
condition is removed. A 15 ms deglitch circuit prevents
the over-current from false triggering.
Power Switch
The power switch is a N-channel MOSFET with a low
on-state resistance capable of delivering 1 A of
continuous current. Configured as a high-side switch,
the MOSFET will go into high impedance when disabled.
Thus, preventing current flow from OUT to IN and IN to
OUT.
Thermal Shut-down Protection
When the output load exceeds the current-limit threshold
the device limits the output current to a safe level by
switching into a constant-current mode, pulling the
overcurrent (OC) logic output low.
During current limit conditions the increasing power
dissipation in the chip causing the die temperature to
rise. When the die temperature reaches a specified level
the thermal shutdown circuitry will shutdown the device.
The thermal shutdown will cycle repeatedly until the short
circuit condition is resolved.
Charge Pump
An internal charge pump supplies power to the circuits
and provides the necessary voltage to drive the gate of
the MOSFET beyond the source. The charge pump is
capable of operating down to a low voltage of 2.7 Volts.
Driver
The driver controls the voltage on the gate to the power
MOSFET switch. This is used to limit the large current
surges when the switch is being turned On and Off.
Proprietary circuitry controls the rise and fall time of the
output voltages.
Rev. 1.1 June 2011
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Page 9 of 16
AOZ1341
Applications Information
Input Capacitor Selection
Power Dissipation Calculation
The input capacitor prevents large voltage transients
from appearing at the input, and provides the
Calculate the power dissipation for normal load condition
using the following equation:
instantaneous current needed each time the switch turns
on and also to limit input voltage drop. The input
capacitor t also prevents high-frequency noise on the
power line from passing through the output of the power
side. The choice of the input capacitor is based on its
ripple current and voltage ratings rather than its capacitor
value. The input capacitor should be located as close to
the VIN pin as possible. A 0.1 μF ceramic cap is
recommended but higher capacitor values will further
reduce the voltage drop at the input.
2
P = R x (I )
OUT
D
ON
The worst case power dissipation occurs when the load
current hits the current limit due to over-current or short
circuit faults. The power dissipation under these
conditions can be calculated using the following
equation:
P = (V – V
) x I
LIMIT
D
IN
OUT
Layout Guidelines
Output Capacitor Selection
Proper PCB layout is important for improving the thermal
and overall performance of the AOZ1341. To optimize the
switch response time to output short-circuit conditions
keep all traces as short as possible to reduce the effect of
unwanted parasitic inductance.
The output capacitor acts in a similar way. A small 0.1 μF
capacitor prevents high-frequency noise from going into
the system. Also, the output capacitor has to supply
enough current for a large load that it may encounter
during system transients. This bulk capacitor must be
large enough to supply fast transient load in order to
prevent the output voltage from dropping.
Place the input and output bypass capacitors as close as
possible to the IN and OUT pins. The input and output
PCB traces should be as wide as possible for the given
PCB space.
Use a ground plane to enhance the power dissipation
capability of the device.
Rev. 1.1 June 2011
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Page 10 of 16
AOZ1341
USB Power Distribution Application
D+
D-
VBUS
Cx
0.1μF
Cx
22μF
GND
D+
D-
VBUS
Power Supply
OUT1
IN
Cx
0.1μF
Cx
22μF
GND
AOZ1341
10kΩ
10kΩ
0.1μF
OC1
EN1/EN1
OC2
D+
D-
USB
Controller
VBUS
OUT2
EN2/EN2
Cx
0.1μF
Cx
22μF
GND
GND
D+
D-
VBUS
Cx
0.1μF
Cx
22μF
GND
Figure 18. Typical Four-Port USB Host/Self-Powered Hub Applications Circuitry
Rev. 1.1 June 2011
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Page 11 of 16
AOZ1341
Package Dimensions, SO-8
D
e
Gauge Plane
Seating Plane
0.25
8
L
E1
E
h x 45
1
C
θ
7 (4x)
A2
A
0.1
A1
b
RECOMMENDED LAND PATTERN
Dimensions in millimeters
Dimensions in inches
Symbols Min.
Nom. Max.
Symbols Min.
Nom. Max.
0.053 0.065 0.069
0.004 0.010
0.049 0.059 0.065
A
A1
A2
b
c
D
E
1.35
0.10
1.25
0.31
0.17
4.80
3.80
1.65
—
1.50
—
1.75
0.25
1.65
0.51
0.25
5.00
4.00
A
A1
A2
b
2.20
—
0.012
0.007
—
—
0.020
0.010
—
c
4.90
3.90
1.27 BSC
6.00
—
D
E
e
0.189 0.193 0.197
0.150 0.154 0.157
0.050 BSC
5.74
e
2.87
1.27
E1
h
L
5.80
0.25
0.40
0°
6.20
0.50
1.27
8°
E1
h
L
0.228 0.236 0.244
0.010
0.016
0°
—
—
—
0.020
0.050
8°
—
—
θ
θ
0.80
UNIT: mm
0.635
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 1.1 June 2011
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Page 12 of 16
AOZ1341
Tape and Reel Dimensions, SO-8
Carrier Tape
P1
P2
D1
T
E1
E2
E
B0
K0
D0
P0
A0
Feeding Direction
UNIT: mm
Package
A0
B0
K0
D0
D1
E
E1
E2
P0
P1
P2
T
SO-8
(12mm)
6.40
0.10
5.20
0.10
2.10
0.10
1.60
0.10
1.50
0.10
12.00 1.75
0.10 0.10
5.50
0.10
8.00
0.10
4.00
0.10
2.00
0.10
0.25
0.10
Reel
W1
S
G
V
N
K
M
R
H
W
UNIT: mm
Tape Size Reel Size
12mm ø330
M
N
W
W1
ø330.00 ø97.00 13.00 17.40
0.50 0.10 0.30 1.00 +0.50/-0.20
H
K
S
G
R
V
ø13.00
10.60
2.00
0.50
—
—
—
Leader/Trailer and Orientation
Trailer Tape
300mm min. or
75 empty pockets
Components Tape
Orientation in Pocket
Leader Tape
500mm min. or
125 empty pockets
Rev. 1.1 June 2011
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Page 13 of 16
AOZ1341
Package Dimensions, Exposed Pad MSOP-8
Gauge Plane
L2
Seating Plane
D
L
2
L1
E2
E1
E
D1
c
1
A1
A2
A
0.10mm
b
e
Dimensions in millimeters
Dimensions in inches
Symbols Min.
Nom. Max.
Symbols Min.
Nom. Max.
0.032 0.040 0.044
0.002 0.006
RECOMMENDED LAND PATTERN
A
A1
A2
b
c
D
0.81
0.05
0.76
0.25
0.13
2.90
1.55
1.02
—
1.12
0.15
0.97
0.40
0.23
3.10
1.8
A
A1
A2
b
c
D
0.75
—
0.86
0.30
0.15
3.00
—
0.030 0.034 0.038
0.010 0.012 0.016
0.005 0.006 0.010
0.116 0.118 0.120
1.9
4.35
1.9
D1
e
D1
e
0.06
—
0.07
0.65 TYP.
3.00
4.90
—
0.026 TYP.
E
2.90
4.70
1.3
0.40
0.90
3.10
5.10
1.8
E
0.116 0.118 0.120
E1
E2
L
L1
L2
θ1
θ2
E1
E2
L
L1
L2
θ1
θ2
0.185 0.192
0.05
0.016 0.022 0.028
0.035 0.037 0.039
0.010 BSC
0.20
0.07
—
0.35
0.65
0.55
0.95
0.25 BSC
—
0.70
1.00
0°
—
6°
—
0°
—
—
12°
6°
—
12°
Notes:
1. All dimensions are in millimeters.
2. Dimensions are inclusive of plating.
3. Package body sizes exclude mold flash and gate burrs. Mold flash at the non-lead sides should be less than 6 mils each.
4. Dimension L is measured in gauge plane.
5. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact.
Rev. 1.1 June 2011
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Page 14 of 16
AOZ1341
Tape and Reel Dimensions, Exposed Pad MSO8-P
Carrier Tape
P2
P1
D1
D0
Section B-B'
K1
E1
E2
R0.3
Max
E
B0
K1
A0
P0
R0.3 Typ.
T
4.2
3.4
K0
Feeding Direction
Section B-B'
UNIT: mm
Package
MSOP-8
T
0.30
0.05
B0
3.30
0.10
A0
5.20
0.10
K1
1.20
0.10
K0
1.60
D0
ø1.50
D1
E
E1
1.75
0.10
E2
5.50
0.05
P0
8.00
0.10
P1
4.00
0.05
P2
2.00
0.05
ø1.50 12.0
0.3
0.10 +0.1/-0.0 Min.
Reel
W1
S
G
N
K
M
V
R
H
W
UNIT: mm
Tape Size Reel Size
12mm ø330
M
N
W
W1
H
K
S
G
R
V
ø330.00 ø97.00 13.00 17.40
0.50 0.10 0.30
ø13.00
1.00 +0.50/-0.20
10.60
2.00
0.50
—
—
—
Leader/Trailer and Orientation
Trailer Tape
300mm min.
Components Tape
Orientation in Pocket
Leader Tape
500mm min.
Notes:
1. 10 sprocket hole pich cumulative tolerance 0.2.
2. Camber not to exceed 1mm in 100mm.
3. A0 and B0 measured on a plane 0.3mm above the bottom of the pocket.
4. K0 measured from a plane on the inside bottom of the pocket to the top surface of the carrier.
5. Pocket position relative to sprocket hole measured as tue position of pocket, not pocket hole.
6. All dimensions in mm.
Rev. 1.1 June 2011
www.aosmd.com
Page 15 of 16
AOZ1341
Part Marking
AOZ1341AI
(SO-8)
AOZ1341AI-1
(SO-8)
Z1341AI
FAYWLT
Z1341AI1
FAYWLT
Part Number Code
Part Number Code
Assembly Lot Code
Assembly Lot Code
Fab Code & Assembly
Location Code
Year & Week Code
Fab Code & Assembly
Location Code
Year & Week Code
AOZ1341EI
(Exposed Pad MSOP-8)
AOZ1341EI-1
(Exposed Pad MSOP-8)
1341EI
FAYW
LT
1341EI
1FAYW
LT
Part Number Code
Year & Week Code
Assembly Lot Code
Part Number Code
Year & Week Code
Assembly Lot Code
Fab Code & Assembly
Location Code
Fab Code & Assembly
Location Code
This datasheet contains preliminary data; supplementary data may be published at a later date.
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
Rev. 1.1 June 2011
www.aosmd.com
Page 16 of 16
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