AOZ1360 [AOS]

28V Programmable Current-Limited Load Switch; 28V的可编程限流负载开关
AOZ1360
型号: AOZ1360
厂家: ALPHA & OMEGA SEMICONDUCTORS    ALPHA & OMEGA SEMICONDUCTORS
描述:

28V Programmable Current-Limited Load Switch
28V的可编程限流负载开关

开关
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中文:  中文翻译
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AOZ1360  
28V Programmable Current-Limited Load Switch  
Preliminary DATASHEET  
(Specifications subject to change)  
General Description  
Features  
The AOZ1360 is a member of Alpha and Omega  
Semiconductor’s high-side load switch family  
intended for applications that require circuit  
protection. The device operates from voltages  
between 5.5V and 28V, and can handle a  
continuous current up to 3A. The internal current  
limiting circuit protects the input supply voltage from  
large load current. The current limit can be set with  
an external resistor. The AOZ1360 provides thermal  
protection function that limits excessive power  
dissipation. The device employs internal soft-start  
circuitry to control inrush current due to highly  
capacitive loads associated with hot-plug events. It  
features low quiescent current of 220µA and the  
supply current reduces to less than 1µA in  
shutdown.  
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35mΩ maximum on resistance  
2A minimum continuous current.  
Programmable current limit  
5.5V to 28V operating input voltage  
Low quiescent current  
Under-voltage lockout  
Thermal shutdown protection  
2.5kV ESD rating  
Available in SO-8 and 4mm x4mm DFN-10  
package  
Applications  
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Notebook PCs  
Hot swap supplies  
The AOZ1360 is available in the SO-8 & 4x4DFN-  
10 package which can operate over -40°C to +85°C  
temperature range.  
Typical Application Circuit  
AOZ1360 Preliminary Data Sheet Rev0  
1
Alpha and Omega Semiconductor Confidential  
Alpha & Omega Semiconductor  
AOZ1360  
Ordering Information  
Part Number  
AOZ1360AI  
AOZ1360DI  
Package  
SO-8  
Temperature Range  
-40°C to +85°C  
Environmental  
RoHS  
DFN4x4 10L  
RoHS  
-40°C to +85°C  
Pin Configuration  
TOP VIEW  
TOP VIEW  
1
8
7
6
5
OUT  
OUT  
SET  
EN  
IN  
10  
9
1
2
3
4
5
OUT  
OUT  
NC  
IN  
OUT  
GND  
2
IN  
IN  
8
NC  
GND  
SS  
3
GND  
7
SET  
EN  
4
SS  
6
SO-8  
DFN4X4 10L  
Note: Connect all IN pins externally.  
Pin Description  
SO-8  
DFN4x4 10L Pin  
Pin Function  
Pin Number Name  
Pin Number  
1,2  
1,2  
IN  
P-channel MOSFET source. Connect a 1uF capacitor from IN to  
GND.  
3
4
4
5
GND  
SS  
Ground.  
Soft-Start Pin. Connect a capacitor from SS to GND to set the soft-start  
time. Connect SS to IN to set to the default soft-start time of 100us.  
5
6
6
7
EN  
Enable Input. Two options are available: active high and active low. See  
Ordering Information for details.  
SET  
Current Limit Set Pin. Connect a resistor from SET to GND to set the  
switch current limit.  
3,8  
NC  
No Connect  
7,8  
9,10  
OUT  
P-channel MOSFET Drain. Connect a 0.1uF capacitor from OUT to GND.  
AOZ1360 Preliminary Data Sheet Rev0  
2
Alpha and Omega Semiconductor Confidential  
Alpha & Omega Semiconductor  
AOZ1360  
Absolute Maximum Ratings(1)  
Operating Ratings  
IN to GND..........................................-0.3V to +30V  
EN, SET, OUT to GND..............-0.3V to VIN + 0.3V  
SS, SET…………………………….…..-0.3V to +6V  
Maximum Continuous Current............................ 3A  
Maximum Junction Temperature (TJ)..........+150°C  
ESD Rating (HBM) ........................................2.5kV  
Thermal Resistance (SO-8)........................82°C/W  
Thermal Resistance (DFN4X4)...................63°C/W  
Electrical Characteristics  
VIN = 12V, TA = -40°C to +85°C unless otherwise stated. Typical values are at 25°C  
Parameter  
Symbol  
VIN  
Conditions  
MIN  
TYP  
MAX  
28  
UNITS  
Input Supply Voltage  
5.5  
V
V
Undervoltage Lockout  
Threshold  
VUVLO  
IN rising  
4.9  
400  
220  
5.4  
Undervoltage Lockout  
Hysteresis  
VUVHYS  
mV  
Input Quiescent Current  
Input Shutdown Current  
Output Leakage Current  
Switch On Resistance  
Switch On Resistance  
Current Limit  
IIN_ON  
IIN_OFF  
ILEAK  
EN = IN for -00, EN = GND for -01, no load  
EN = GND for -00, EN = IN for -01, no load  
EN = GND for -00, EN = IN for -01, no load  
AOZ1360AI VIN = 12V  
400  
1
μA  
μA  
μA  
mΩ  
mΩ  
A
1
RDS(ON)  
RDS(ON)  
ILIM  
22  
33  
35  
43  
3.4  
AOZ1360AI VIN = 5.5V  
2
2.7  
RSET = 84.5kΩ (SO8)  
RSET = XXX kΩ (DFN)  
Enable Input Low Voltage  
VEN_H  
0.8  
1
V
V
Enable Input High Voltage VEN_L  
2.0  
Enable Input Hysteresis  
Enable Input Bias Current  
VEN_HYS  
100  
mV  
μA  
μs  
IEN_BIAS  
(2)  
Turn-On Delay Time  
EN_50% to OUT_10%  
Td_on  
RL=120Ω, CL = 1μF, SS = Floated  
RL=120Ω, CL = 1μF, SS = Floated  
220  
Turn-On Rise Time  
tON  
280  
μs  
OUT_10% to 90%  
360  
280  
130  
RL=120Ω, CL = 1μF, CSS = 1nF  
μs  
μs  
°C  
Turn-Off Fall Time  
tOFF  
TSD  
RL=120Ω, CL = 1μF, SS = Floated  
Thermal Shutdown  
Threshold  
Thermal Shutdown  
Hysteresis  
TSD_HYS  
30  
°C  
(1) Stresses beyond the Absolute Maximum Ratings may cause permanent damage to the device.  
(2) Depends on the gate loading of the discrete PMOS, to be confirmed by silicon data.  
AOZ1360 Preliminary Data Sheet Rev0  
3
Alpha and Omega Semiconductor Confidential  
Alpha & Omega Semiconductor  
AOZ1360  
Typical Operating Characteristics  
Functional Characteristics  
Turn-On  
(Vin = 12V, R = 5.6)  
Turn-Off  
(Vin = 12V, R = 5.6)  
Vin  
Vin  
2V/div  
2V/div  
Vout  
Vout  
2V/div  
2V/div  
EN  
EN  
1V/div  
1V/div  
Iout  
Iout  
0.5A/div  
0.5A/div  
1ms/div  
20us/div  
Current Limit  
(Vin = 12V, R = 3.6)  
Over Temperature  
(Vin = 12V, R = 3.6)  
Vin  
Vin  
5V/div  
2V/div  
Vout  
Vout  
2V/div  
2V/div  
EN  
1V/div  
EN  
1V/div  
Iout  
Iout  
0.5A/div  
0.5A/div  
5ms/div  
100ms/div  
AOZ1360 Preliminary Data Sheet Rev0  
4
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Alpha & Omega Semiconductor  
AOZ1360  
Timing Diagram  
VIH  
VIL  
EN  
90%  
90%  
10%  
TD(ON)  
OUT  
TD(OFF)  
TR  
Figure 1 AOZ1360 Timing Diagram  
Functional Block Diagram  
Figure 2 Functional Block Diagram  
AOZ1360 Preliminary Data Sheet Rev0  
5
Alpha and Omega Semiconductor Confidential  
Alpha & Omega Semiconductor  
AOZ1360  
Detailed Description  
Introduction  
The AOZ1360 is a 35mP-channel high-side load switch with adjustable soft-start slew-rate control,  
programmable current limit and thermal shutdown. It operates with an input voltage range from 5.5V to 28V and  
can handle a continuous current of 2A.  
Enable  
The Enable pin is the ON/OFF control for the output switch. It’s an active-high input. The EN pin is active after  
VIN is above the UVLO threshold of 4.9 V. Conversely, the Enable will be de-activated if the VIN falls below the  
UVLO of 2.0V. The EN pin must be driven to a logic high or logic low state to guarantee operation. While  
disabled, the AOZ1360 only draws about 1uA supply current. The EN is a high impedance input with an ESD  
protection diode to ground and should not be forced below ground. This input level is compatible with most  
microcontroller outputs and other logic families.  
Under-Voltage Lockout (UVLO)  
The under-voltage lockout (UVLO) circuit of AOZ1300 monitors the input voltage and prevents the output  
MOSFET from turning on until VIN exceeds 4.9V.  
Adjustable Soft-Start Slew-Rate Control  
When the EN pin is asserted high, the slew rate control circuitry applies voltage on the gate of the PMOS switch  
in a manner such that the output voltage and current is ramped up linearly until it reaches the steady-state load  
current level. The slew rate can be adjusted by an external capacitor connected to the SS pin to ground. The  
slew rate rise time, Ton, can be set using the following equation:  
C
SS *VIN  
Ton =  
30μA  
AOZ1360 Preliminary Data Sheet Rev0  
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AOZ1360  
Programmable current Limit  
The current limit is programmed by an external resistor connected to the SET pin to ground. This sets a  
reference voltage to the current limit error amplifier that compares it to a sensed voltage that is generated by  
passing a small portion of the load current through an internal amplifier. When the sensed load current exceeds  
the set current limit, the load current is then clamped at the set limit and the Vout drops to whatever voltage  
necessary to clamp the load current. The AOZ1360 will stay in this condition until the load current no longer  
exceeds the current limit or if the thermal shutdown protection is engaged. To set the current limit use the below  
graph  
AOZ1360 Rset vs Ilimit  
4
3.5  
3
2.5  
2
1.5  
1
0.5  
0
1.00E+04  
1.00E+05  
1.00E+06  
1.00E+07  
Rset (ohms)  
Thermal-Shutdown Protection  
During current limit or short circuit conditions the PMOS resistance is increased to clamp the load current. This  
increases the power dissipation in the chip causing the die temperature to rise. When the die temperature  
reaches 130°C the thermal shutdown circuitry will shutdown the device. There is a 30°C hysterisys after which  
the device will turn back on and go thru soft start. The thermal shutdown will cycle repeatedly until the short  
circuit condition disappears or the enable pin is pulled LOW by an external monitor.  
AOZ1360 Preliminary Data Sheet Rev0  
7
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AOZ1360  
Applications Information  
Input Capacitor Selection  
Use a 1uF or larger capacitor for input bypassing. This will limit the input voltage drop during output transient  
conditions. 1uF capacitor should be adequate for most applications; however, higher capacitor values will  
further reduce the voltage drop. Place the bypass capacitor as close to the IN pins as feasibly possible.  
Output Capacitor Selection  
Use a 0.1uF or larger capacitor between the OUT and GND pins. The capacitance does not affect the turn on  
slew rate; however, a larger capacitor will make the initial turn on transient smoother.  
Power Dissipation Calculation  
Calculate the power dissipation for normal load condition using the following equation:  
2
PD = RON x (IOUT  
)
The worst case power dissipation occurs when the load current hits the current limit due to over-current or short  
circuit faults. The power dissipation under these conditions can be calculated using the following equation:  
PD = (VIN – VOUT) x ILIMIT  
Layout Guidelines  
Good PCB layout is important for improving the thermal and overall performance of AOZ1360. To optimize the  
switch response time to output short-circuit conditions keep all traces as short as possible to reduce the effect of  
unwanted parasitic inductance. Place the input and output bypass capacitors as close as possible to the IN and  
OUT pins. The input and output PCB traces should be as wide as possible for the given PCB space. Use a  
ground plane to enhance the power dissipation capability of the device.  
AOZ1360AI (SO-8) Layout  
AOZ1360DI (4x4 DFN) Layout  
AOZ1360 Preliminary Data Sheet Rev0  
8
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Alpha & Omega Semiconductor  
AOZ1360  
AOZ1360 Package Marking  
SO-8  
DFN4x4 10L  
LOGO  
Z 1 3 6 0 D I  
Z A 8 R 1 B  
AOZ1360 Preliminary Data Sheet Rev0  
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Alpha & Omega Semiconductor  
AOZ1360  
AOZ1360 Preliminary Data Sheet Rev0  
10  
Alpha and Omega Semiconductor Confidential  
Alpha & Omega Semiconductor  
AOZ1360  
Package Dimensions, DFN4X4  
AOZ1360 Preliminary Data Sheet Rev0  
11  
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Alpha & Omega Semiconductor  
AOZ1360  
AOZ1360 Preliminary Data Sheet Rev0  
12  
Alpha and Omega Semiconductor Confidential  

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