AM7945JC [AMD]
Subscriber Line Interface Circuit; 用户线接口电路
| 型号： | AM7945JC |
| 厂家： | 
AMD |
| 描述： | Subscriber Line Interface Circuit |
| 文件： | 总18页 (文件大小：244K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Am7945
Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
■ Programmable constant-current feed
■ Current gain = 200
■ On-chip Thermal Management (TMG) feature
■ Two-wire impedance set by single external
impedance
■ Programmable loop-detect threshold
■ Low power Standby state
■ On-hook transmission
■ On-chip ring relay driver and relay snubber
■ Ground-key detector
circuit
■ Tip Open state for ground-start lines
■ –19 V to –56.5 V battery operation
■ Ideal for low cost PABX and key telephone
systems
BLOCK DIAGRAM
TMG
Ring Relay
RINGOUT
Driver
A(TIP)
HPA
C1
C2
Input Decoder
C3
and Control
Ground-Key
Detector
E0
Two-Wire
Interface
E1
DET
HPB
RSN
VTX
Signal
Transmission
Off-Hook
Detector
B(RING)
RD
Power-Feed
Controller
RDC
CAS
DA
Ring-Trip
Detector
DB
VBAT
BGND
VCC
VEE AGND/DGND
Publication# 18408 Rev: D Amendment: /0
Issue Date: October 1999
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed
by a combination of the elements below.
Am7945
J
C
TEMPERATURE RANGE
C = Commercial (0°C to 70°C)*
PACKAGE TYPE
J = 32-pin Plastic Leaded Chip Carrier (PL 032)
DEVICE NUMBER/DESCRIPTION
Am7945
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume for this device. Consult
the local AMD sales office to confirm availability
ofspecificvalidcombinationsandtocheckonnewly
released combinations, and to obtain additional
data on AMD’s standard military grade products.
Valid Combinations
Am7945
JC
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of production units.
2
Am7945 Data Sheet
CONNECTION DIAGRAM
Top View
32-Pin PLCC
4
3
2
1
32 31 30
TP
TP
5
6
29
RINGOUT
NC
DA
RD
28
27
7
TMG
8
26
25
24
HPB
NC
9
VBAT
C3
10
HPA
11
12
13
VTX
VEE
RSN
E1
C2
23
22
21
DET
14 15 16 17 18 19 20
Notes:
1. Pin 1 is marked for orientation.
2. TP is a thermal conduction pin tied to substrate.
3. NC = No Connect
SLIC Products
3
PIN DESCRIPTIONS
Pin Names
AGND/DGND
A(TIP)
Type
Description
Gnd
Analog and digital ground
Output
Gnd
Output of A(TIP) power amplifier
Battery (power) ground
BGND
B(RING)
C3–C1
Output
Input
Output of B(RING) power amplifier
Decoder. TTL compatible. C3 is MSB and C1 is LSB.
CAS
Capacitor
Anti-saturation pin for capacitor to filter reference voltage when operating in anti-saturation
region.
DA
Input
Ring-Trip Negative. Negative input to ring-trip comparator.
Ring-Trip Positive. Positive input to ring-trip comparator.
DB
Input
DET
Output
Switchhook Detector. When enabled, a logic Low indicates the selected detector is tripped.
The detect condition is selected by the logic inputs (C3–C1, E0, E1). The output is open-
collector with a built-in 15 kΩ pull-up resistor.
E0
E1
Input
Input
Ground-Key Enable. A logic High enables DET. A logic Low disables DET (PLCC only).
Ground-Key Enable. E1 = Low connects the ground-key or ring-trip detector to DET. E1 =
High connects the off-hook or ring-trip detector to DET (PLCC only).
HPA
HPB
RD
Capacitor
Capacitor
Resistor
Resistor
High-Pass Filter Capacitor. A(TIP) side of high-pass filter capacitor.
High-Pass Filter Capacitor. B(RING) side of high-pass filter capacitor.
Detect Resistor. Threshold modification and filter point for the off-hook detector.
RDC
DC Feed Resistor. Connection point for the DC feed current programming network. The
other end of the network connects to the receiver summing node (RSN). VRDC is negative
for normal polarity and positive for reverse polarity.
RINGOUT
RSN
Output
Input
Ring Relay Driver. Open-collector driver with emitter internally connected to BGND.
Receive Summing Node. The metallic current (both AC and DC) between A(TIP) and
B(RING) is equal to 200 times the current into this pin. Networks that program receive gain,
two-wire impedance, and feed resistance all connect to this node.
TMG
TP
—
Thermal Management. Connect an external resistor between this pin and the VBAT pin to
reduce on-chip power dissipation in the normal polarity, Active state only. See Table 2.
Thermal
Thermal pin. Connection for heat dissipation. Internally connected to substrate (QBAT).
Leave as open circuit or connected to QBAT. In both cases, the TP pins can connect to an
area of copper on the board to enhance heat dissipation.
VBAT
VCC
VEE
VTX
Battery
Power
Power
Output
Battery supply
+5 V power supply
–5 V power supply
Transmit Audio. This output is a unity gain version of the A(TIP) and B(RING) metallic
voltage. VTX also sources the two-wire input impedance programming network.
4
Am7945 Data Sheet
ABSOLUTE MAXIMUM RATINGS
Storage temperature . . . . . . . . . . . . –55°C to +150°C
With respect to AGND/DGND:
OPERATING RANGES
Commercial (C) Devices
Ambient temperature . . . . . . . . . . . . . . 0°C to +70°C*
VCC . . . . . . . . . . . . . . . . . . . . . . . . . . .4.75 V to 5.25 V
VCC. . . . . . . . . . . . . . . . . . . . . . . . . . .–0.4 V to +7.0 V
VEE . . . . . . . . . . . . . . . . . . . . . . . . .–4.75 V to –5.25 V
VBAT . . . . . . . . . . . . . . . . . . . . . . . . . –19 V to –56.5 V
AGND/DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V
VEE. . . . . . . . . . . . . . . . . . . . . . . . . . .+0.4 V to –7.0 V
VBAT
Continuous . . . . . . . . . . . . . . . . . . +0.4 V to –70 V
10 ms . . . . . . . . . . . . . . . . . . . . . . +0.4 V to –75 V
BGND with respect to
AGND/DGND . . . . . . . . . . . –100 mV to +100 mV
BGND. . . . . . . . . . . . . . . . . . . . . . . . . . . .+3 V to –3 V
Load resistance on VTX to GND . . . . . . . . 10 kΩ min
A(TIP) or B(RING) with respect to BGND:
Continuous . . . . . . . . . . . . . . . . . . . .–70 V to +1 V
10 ms (f = 0.1 Hz) . . . . . . . . . . . . . . .–70 V to +5 V
1 ms (f = 0.1 Hz) . . . . . . . . . . . . . . . .–80 V to +8 V
10 µs (f = 0.1 Hz) . . . . . . . . . . . . .–100 V to +12 V
The Operating Ranges define those limits over which the
functionality of the device is guaranteed by production testing.
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of pro-
duction units.
Current from A(TIP) or B(RING). . . . . . . . . . ±150 mA
Current from TMG . . . . . . . . . . . . . . . . . . . . . 100 mA
Voltage on RINGOUT:
During transient . . . . . . . . . . . . . . BGND to +10 V
During steady state. . . . . . . . . . . . . BGND to +7 V
Current through relay drivers . . . . . . . . . . . . . . 60 mA
DA and DB inputs
Voltage on ring-trip inputs. . . . . . . . . . .VBAT to 0 V
Current into ring-trip inputs . . . . . . . . . . . . ±10 mA
C3–C1, E0, E1
to AGND/DGND . . . . . . . . . –0.4 V to VCC + 0.4 V
Maximum power dissipation, TA = 85°C
No heat sink (See note):
In 32-pin PLCC package. . . . . . . . . . . . . . . . 1.4 W
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . θJA
In 32-pin PLCC package. . . . . . . . . . . .43°C/W typ
Note: Thermal limiting circuitry on chip will shut down the cir-
cuit at a junction temperature of about 165°C. The device
should never be exposed to this temperature. Operation above
145°C junction temperature may degrade device reliability.
See the SLIC Packaging Considerations for more information.
StressesabovethoselistedunderAbsoluteMaximumRatings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
The Am7945 device is tested under the following conditions unless otherwise noted: BAT = –48 V, VCC = +5 V,
VEE = –5 V, RL = 900 Ω. The device is not tested in Polarity Reversal state.
Description
Analog output (VTX) impedance
Analog output (VTX) offset
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
3
Ω
0°C to +70°C
–40°C to +85°C
–37
–40
+37
+40
mV
4
4
Analog (RSN) input impedance
Longitudinal impedance at A or B
Overload level
300 Hz to 3.4 kHz
1
20
35
Ω
Ω
4-wire and 2-wire, Active state
–2.5
+2.5
Vpk
Vrms
2a
2b
On hook, RLAC = 900 Ω,
0.95
Active or OHT state
Transmission Performance
2-wire return loss
200 to 3.4 kHz
26
dB
4, 8
(See Test Circuit D)
Longitudinal Balance (2-Wire and 4-Wire, See Test Circuit C); RL = 740 Ω at BAT = 48 V
Longitudinal to metallic L-T, L-4
normal polarity
200 Hz to 1 kHz
0°C to +70°C
–40°C to +85°C
52
50
4
4
1 kHz to 3.4 kHz
0°C to +70°C
–40°C to +85°C
52
50
dB
Longitudinal signal generation 4-L
Longitudinal current per pin
300 Hz to 800 Hz, normal polarity
Active state and OHT state
40
20
27
mArms
Insertion Loss (2- to 4-Wire and 4- to 2-Wire, See Test Circuits A and B) BAT = –48 V, RL = 900 Ω
Gain accuracy
0 dBm, 1 kHz
0°C to +70°C
–40°C to +85°C
–0.15
–0.20
+0.15
+0.20
4
4
Gain accuracy, OHT state
Variation with frequency
–10 dBm, On hook, RLAC = 900 Ω
–1.0
+1.0
300 to 3.4 kHz, relative to 1 kHz
0°C to +70°C
dB
–0.10
–0.15
+0.10
+0.15
–40°C to +85°C
4
Gain tracking
+7 dBm to –55 dBm, reference 0 dBm
0°C to +70°C
–0.10
–0.15
+0.10
+0.15
4
4
–40°C to +85°C
Balance Return Signal (4- to 4-Wire, See Test Circuit B) BAT = –48 V, RL = 900 Ω
Gain accuracy
0 dBm, 1 kHz
0°C to +70°C
–40°C to +85°C
–0.15
–0.20
+0.15
+0.20
3
4
Variation with frequency
300 to 3.4 kHz, relative to 1 kHz
0°C to +70°C
–0.10
–0.15
+0.10
+0.15
3
4
dB
µs
–40°C to +85°C
Gain tracking
Group delay
+3 dBm to –55 dBm, reference 0 dBm
0°C to +70°C
–0.10
–0.15
+0.10
+0.15
3, 4
4
–40°C to +85°C
f = 1 kHz
4
4, 8
Total Harmonic Distortion (2- to 4-Wire or 4- to 2-Wire, See Test Circuits A and B) BAT = –48 V, RL = 900 Ω
Harmonic distortion
300 Hz to 3.4 kHz
2-wire level = 0 dBm
2-wire level = +7 dBm
–64
–55
–50
–40
dB
6
Am7945 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Idle Channel Noise (2-Wire and 4-Wire)
C-message weighted
2-wire,
0°C to +70°C
–40°C to +85°C
+7
+7
+10
+12
dBrnc
4
4-wire,
2-wire,
4-wire,
0°C to +70°C
–40°C to +85°C
+7
+7
+10
+12
Psophometric weighted
0°C to +70°C
–40°C to +85°C
–83
–83
–78
–75
4
4
dBmp
0°C to +70°C
–40°C to +85°C
–83
–83
Line Characteristics, Active State (See Figure 1)
Short loops, Active state
Long loops, Active state
OHT state
BAT = –48 V, RLDC = 600 Ω
BAT = –48 V, RLDC = 1.9 kΩ
24.7
17.5
15.5
29.3
BAT = –48 V, RLDC = 600 Ω
20.5
1.3IL
mA
Standby state
VBAT – 3 V
0.7IL
15.0
IL
------------------------------
IL
=
TA = 25°C
RL + 1800
RL = 600 Ω, BAT = –48 V
TA = 70°C
17.4
Loop current
Tip Open state, RL = 0 Ω
100
100
44
µA
Disconnect state, RL = 0 Ω
Tip Open state, Bwire to GND
Tip Open state, Bwire = BAT + 6 V
Tip and ring shorted to GND
21
20
30
30
45
mA
ILLIM (ITIP + IRING
)
100
–5.0
130
Ground-start signaling (tip voltage)
Active state, RTIP to –48 V = 7.0 kΩ
RRING to GND = 100 kΩ
–7.5
V
Open circuit voltage
Active and OHT state, BAT = –48 V
40.5
42.0
Power Dissipation, BAT = –48 V
On hook, Open Circuit state
On hook, OHT state
25
100
210
120
On hook, Active state
R
TMG = Open
160
195
230
280
mW
RTMG = 1700 Ω
On hook, Standby state
Off hook, OHT state
Off hook, Active state
35
100
RL = 300 Ω, RTMG = ∞, BAT = –48 V
735
1100
RL = 300 Ω, RTMG = ∞, BAT = –48 V
RL = 300 Ω, RTMG = ∞
1.25
0.57
1.60
0.85
W
Off hook, Standby state
RL = 600 Ω, TA = 25°C
0.68
1.0
SLIC Products
7
ELECTRICAL CHARACTERISTICS (continued)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
Supply Currents, BAT = –48 V
VCC
,
Open Circuit state
OHT state
Standby state
Active state
1.7
4.9
2.2
6.3
2.5
7.5
3.0
8.5
On-hook supply current
VEE
,
Open Circuit state
OHT state
Standby state
Active state
0.7
2.0
0.77
2.1
2.0
3.5
2.0
5.0
On-hook supply current
mA
VBAT
,
Open Circuit state
OHT state
Standby state
Active state
0.18
1.9
0.45
4.2
1.0
4.7
1.5
5.7
On-hook supply current
Power-Supply Rejection Ratio (VRIPPLE = 50 mVrms), Active Normal State
VCC
50 Hz to 3.4 kHz
30
28
28
85
40
35
VEE
50 Hz to 3.4 kHz
dB
5
4
VBAT
50 Hz to 3.4 kHz
50
Effective internal resistance
RFI rejection
CAS pin to GND
170
255
1.0
kΩ
100 kHz to 30 MHz (See Figure E)
mVrms
Off-Hook Detector
Current threshold
–12
+12
%
375
--------
=
IDET
RD
Ground-Key Detector Thresholds, Active State, BAT = –48 V
Ground-key resistance threshold
Ground-key current threshold
Ring-Trip Detector Input
Bias current
B(RING) to GND
B(RING) to GND
2.0
5.0
9
10.0
kΩ
mA
–0.5
–50
–0.05
µA
Offset voltage
Source resistance = 2 MΩ
0
+50
mV
6
Logic Inputs (C3–C1, E0, E1)
Input High voltage
2.0
V
Input Low voltage
0.8
40
Input High current
All inputs except C3 and E1
Input C3
–75
–75
–75
–0.4
200
45
µA
Input E1
Input Low current
mA
Logic Output (DET)
Output Low voltage
Output High voltage
IOUT = 0.8 mA
0.4
V
IOUT = –0.1 mA
2.4
8
Am7945 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Description
Relay Driver Output (RINGOUT)
On voltage
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
35 mA sink
VOH = +5 V
100 µA
+0.25
+0.4
100
V
Off leakage
µA
Zener breakover
6
7.2
10
V
Zener On voltage
30 mA
RELAY DRIVER SCHEMATIC
RINGOUT
BGND
SWITCHING CHARACTERISTICS
(32-Pin PLCC only)
Temperature
Ranges
Symbol
Parameter
Test Conditions
Min Typ Max Unit Note
0°C to +70°C
–40°C to +85°C
3.8
4.0
E1 Low to DET High (E0 = 1)
E1 Low to DET Low (E0 = 1)
tgkde
0°C to +70°C
–40°C to +85°C
1.1
1.6
Ground-Key Detect state
RL open, RG connected
(See Figure H)
0°C to +70°C
–40°C to +85°C
1.1
1.6
tgkdd
tgkd0
E0 High to DET Low (E1 = 0)
E0 Low to DET High (E1 = 0)
0°C to +70°C
–40°C to +85°C
3.8
4.0
µs
4
0°C to +70°C
–40°C to +85°C
1.2
1.7
E1 High to DET Low (E0 = 1)
E1 High to DET High (E0 = 1)
tshde
0°C to +70°C
–40°C to +85°C
3.8
4.0
Switchhook Detect state
RL = 600 Ω, RG open
(See Figure G)
0°C to +70°C
–40°C to +85°C
1.1
1.6
tshdd
tshd0
E0 High to DET Low (E1 = 1)
E0 Low to DET High (E1 = 1)
0°C to +70°C
–40°C to +85°C
3.8
4.0
SLIC Products
9
SWITCHING WAVEFORMS
E1 to DET
E1
DET
tshde
tgkde
tshde
tgkde
E0 to DET
E1
E0
DET
tshdd
tshd0
tgkdd
tgkd0
Note:
All delays measured at 1.4 V level.
Notes:
1. Unless otherwise noted, test conditions are VCC = +5 V, VEE = –5 V, CHP = 0.33 µF, RDC1 = RDC2 = 9.26 kΩ, CDC = 0.33 µF,
D = 35.4 kΩ, CCAS = 0.33 µF, no fuse resistors, BAT = –48 V, RL = 900 Ω, and RTMG = 1700 Ω.
R
2. a. Overload level is defined when THD = 1%.
b. Overload level is defined when THD = 1.5%
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes the two-wire AC load impedance
matches the programmed impedance.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. This parameter is tested at 1 kHz with a termination impedance of 900 Ω and an RL of 600 Ω in production. Performance at
other frequencies is guaranteed by characterization.
6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only.
7. Assumes the following ZT networks:
(900 Ω):
(600 Ω):
RSN
RSN
VTX
VTX
90 kΩ
90 kΩ
60 kΩ
60 kΩ
150 pF
150 pF
8. Group delay can be considerably reduced by using a ZT network such as that shown in Note 7 above. The network reduces
the group delay to less than 2 µs. The effect of group delay on the linecard performance may be compensated for by using
the QSLAC™ or DSLAC™ device.
10
Am7945 Data Sheet
Table 1. SLIC Decoding
2-Wire Status
DET Output
E1 = 1
State
C3 C2 C1
E1 = 0
Ring trip
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Open Circuit
Ringing
Ring trip
Ring trip
Ring trip
Active
Loop detector
Loop detector
Loop detector
Loop detector
Ground key
Ground key
Ground key
Ground key
On-Hook TX (OHT)
Tip Open
Standby
Reserved
Reserved
Note:
E0 High enables DET.
Table 2. User-Programmable Components
ZT = 200(Z2WIN – 2RF)
ZT is connected between the VTX and RSN pins. The fuse
resistors are RF, and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and
RSN must be taken into account.
ZRX is connected from VRX to RSN. ZT is defined above, and
G42L is the desired receive gain.
ZL
200 • ZT
----------- ------------------------------------------------------
ZRX
=
•
G42L ZT + 200(ZL + 2 • RF)
RDC1, RDC2, and CDC form the network connected to the RDC
pin. RDC1 and RDC2 are approximately equal. ILOOP is the
desired loop current in the constant-current region.
500
ILOOP
-------------
=
RDC1 + RDC2
R
DC1 + RDC2
-------------------------------
RDC1 • RDC2
CDC = 1.5 ms •
RD and CD form the network connected from RD to –5 V and
IT is the threshold current between on hook and off hook.
375
IT
0.5 ms
RD
--------
----------------
CD =
RD
=
,
OHT loop current (constant-current region).
500 V • 0.66
RDC1 + RDC2
-------------------------------
=
IOHT
CCAS is the regulator filter capacitor and fc is the desired filter
cutoff frequency.
1
-----------------------------
CCAS
=
3.4 • 105πfc
Thermal Management Equations (Normal Active and Tip Open States)
RTMG is connected from TMG to VBAT and is used to limit power
dissipation within the SLIC in Normal Active and Tip Open
states only.
VBAT – 6 V
-------------------------------
ILOOP
RTMG
≥
VBAT – 6 V – (IL • RL)2
Power dissipated in the TMG resistor, RTMG, during Active and
Tip Open states.
-------------------------------------------------------------
=
PRTMG
RTMG
PSLIC = VBAT • IL – (PRTMG – RL(IL)2) + 0.12 W
Power dissipated in the SLIC while in Active and Tip Open
states.
SLIC Products
11
DC FEED CHARACTERISTICS
4
VBAT = –51.3 V
BAT = –47.3 V
3
2
V
1
Active state
OHT state
RDC1 + RDC2 = RDC = 18.52 kΩ
Notes:
1. Constant-current region:
500
RDC
---------
Active state:
IL
=
=
2
3
500
-- ---------
OHT state:
IL
•
RDC
2. Anti-sat (battery tracking) turn-on:
3. Open circuit voltage:
VAB = 1.017 VBAT – 10.7
VAB = 1.017 VBAT – 6.3
VAB = 1.017 VBAT – 6.3 – IL
RDC
---------
120
4. Anti-sat (battery tracking) region:
a. VA–VB (VAB) Voltage vs. Loop Current (Typical)
12
Am7945 Data Sheet
DC FEED CHARACTERISTICS (continued)
30
25
20
15
10
5
0
0
1000
2000
3000
4000
5000
6000
Load Resistance (Ω)
RDC1 + RDC2 = RDC = 18.52 kΩ
VBAT = –47.3 V
b. Loop Current vs. Load Resistance (Typical)
A
RSN
a
b
RDC1
RL
IL
SLIC
CDC
RDC2
RDC
B
Feed current programmed by RDC1 and RDC2
c. Feed Programming
Figure 1. DC Feed Characteristics
SLIC Products
13
TEST CIRCUITS
A(TIP)
(TIP)
A
VTX
VTX
RL
2
SLIC
SLIC
AGND
RT
VL
VAB
RT
RL
VAB
AGND
RSN
RL
2
RRX
RSN
RRX
B(RING)
IL2-4 = 20 log (VTX / VAB
B
(RING)
VRX
)
IL4-2 = 20 log (VAB / VRX
)
BRS = 20 log (VTX / VRX
)
A. Two- to Four-Wire Insertion Loss
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
ZD
1
A(TIP)
<< RL
A(TIP)
ωC
RL
2
VTX
VTX
R
SLIC
RT1
SLIC
S1
C
AGND
AGND
VS
VM
CT1
RT
S2
VL
VAB
VL
RT2
RRX
VRX
R
RL
2
ZIN
RSN
RSN
B(RING)
B(RING)
RRX
S2 Open, S1 Closed
Note:
L-T Long. Bal. = 20 log (VAB / VL)
L-4 Long. Bal. = 20 log (VTX / VL)
ZD is the desired impedance (e.g., the characteristic
impedance of the line).
RL = –20 log (2 VM / VS)
S2 Closed, S1 Open
4-L Long. Sig. Gen. = 20 log (VL / VRX
)
D. Two-Wire Return Loss Test Circuit
C. Longitudinal Balance
14
Am7945 Data Sheet
TEST CIRCUITS (continued)
C1
L1
RF1
A(TIP)
CAX
33 nF
200 Ω
200 Ω
50 Ω
HF
GEN
50 Ω
B(RING)
VTX
CBX
33 nF
RF2
L2
50 Ω
C2
SLIC
under test
1.5 Vrms
80% Amplitude
Modulated
100 kHz to 30 MHz
E. RFI Test Circuit
VCC
6.2 kΩ
A(TIP)
A(TIP)
DET
15 pF
B(RING)
RL = 600 Ω
RG
2 kΩ at VBAT = –48 V
E1
B(RING)
F. Loop-Detector Switching
G. Ground-Key Switching
SLIC Products
15
TEST CIRCUITS (continued)
+5 V
–5 V
VCC
VEE
DA
DB
RD
RD
VTX
VTX
2.2 nF
A(TIP)
A(TIP)
HPA
RT
RRX
CHP
RSN
RDC
VRX
HPB
B(RING)
B(RING)
2.2 nF
RDC2
RDC1
CDC
RINGOUT
BGND
AGND/
DGND
E1
C3
C2
C1
BATTERY
GROUND
BAT
VBAT
TMG
D6
DET
CAS
ANALOG
GROUND
RTMG
1700 Ω
DIGITAL
GROUND
CCAS
H. Am7945 Test Circuit
16
Am7945 Data Sheet
PHYSICAL DIMENSION
PL032
.485
.495
.447
.453
.009
.015
.042
.056
.125
.140
.585
.595
Pin 1 I.D.
.080
.095
.547
.553
SEATING
PLANE
.400
REF.
.490
.530
.013
.021
.050 REF.
16-038FPO-5
PL 032
DA79
.026
.032
TOP VIEW
SIDE VIEW
6-28-94 ae
REVISION SUMMARY
Revision A to B
•
Minor changes were made to the data sheet style and format to conform to AMD standards.
Revision B to Revision C
•
In the Pin Description table, inserted/changed TP pin description to: “Thermal pin. Connection for heat dissipa-
tion. Internally connected to substrate (QBAT). Leave as open circuit or connected to QBAT. In both cases, the
TP pins can connect to an area of copper on the board to enhance heat dissipation.”
Revision C to Revision D
•
•
•
Deleted information on the Ceramic DIP and Plastic DIP packages.
The PL032 package was added to the new Physical Dimension section.
Updated the Pin Description table to correct inconsistencies.
SLIC Products
17
The contents of this document are provided in connection with Advanced Micro Devices, Inc. ("AMD") products. AMD makes no representations
or warranties with respect to the accuracy or completeness of the contents of this publication and reserves the right to make changes to speci-
fications and product descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any in-
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changes to its products at any time without notice.
© 1999 Advanced Micro Devices, Inc.
All rights reserved.
Trademarks
AMD, the AMD logo, and combinations thereof, and DSLAC and QSLAC are trademarks of Advanced Micro Devices, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
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