AM7946-2JC [ETC]
Telecommunication IC ; 电信IC\n
| 型号： | AM7946-2JC |
| 厂家： | 
ETC |
| 描述： | Telecommunication IC
|
| 文件： | 总20页 (文件大小：266K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Am7946
Subscriber Line Interface Circuit
DISTINCTIVE CHARACTERISTICS
Ideal for long loop applications
On-hook transmission
Two-wire impedance set by scaled external
impedance
Programmable constant-current feed
Programmable loop-detect threshold
Current gain = 500
–40 V to –58 V battery operation
On-hook transmission
Internal VEE regulator
Ground-key detector
Low standby power
Tip Open state for ground-start lines
Polarity reversal option available
On-chip Thermal Management (TMG) feature
Scaled line voltage (VAB) output
Three on-chip relay drivers and snubber circuits
(32-PLCC only)
Logic selectable for 2.2 V metering or long
loop feed
BLOCK DIAGRAM
TMG
DA
DB
Relay
RINGOUT
Driver
Ring Relay
RYOUT2
Driver
A(TIP)
HPA
RYE
D1
D2
C1
Ring-Trip
Detector
Input Decoder
C2
and Control
Two-Wire
Interface
Ground-Key
Detector
C3
E1
HPB
Off-hook
Detector
DET
RD
B(RING)
VTX
RSN
Signal
Transmission
RSG
RDC
CAS
VDC
OVH
Power-Feed
Controller
VBAT
BGND
VCC VNEG AGND/DGND
Publication# 080154 Rev: D Amendment: /0
Issue Date: October 1999
ORDERING INFORMATION
Standard Products
Legerity standard products are available in several packages and operating ranges. The order number (Valid Combination) is
formed by a combination of the elements below.
Am7946
–1
J
C
TEMPERATURE RANGE
C = Commercial (0°C to 70°C)*
PACKAGE TYPE
J = 32-pin Plastic Leaded Chip Carrier (PL 032)
PERFORMANCE GRADE OPTION
–1 = 52 dB Longitudinal Balance, Polarity Reversal
–2 = 63 dB Longitudinal Balance, Polarity Reversal
–3 = 52 dB Longitudinal Balance, No Polarity Reversal
–4 = 63 dB Longitudinal Balance, No Polarity Reversal
DEVICE NUMBER/DESCRIPTION
Am7946
Subscriber Line Interface Circuit
Valid Combinations
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume for this device. Consult
the local Legerity sales office to confirm
availability of specific valid combinations, to check
on newly released combinations, and to obtain
additional data on Legerity’s standard military–
grade products.
–1
–2
–3
–4
JC
Am7946
Note:
* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of production units.
2
Am7946 Data Sheet
CONNECTION DIAGRAMS
Top View
32-Pin PLCC
4
3
2
1
32 31 30
RYOUT1
RYE
5
6
7
8
9
DA
29
28
27
26
25
RD
RYOUT2
TMG
HPB
HPA
VTX
VBAT
D1
VNEG
10
11
12
13
24
23
22
21
RSN
E1
C3
AGND/DGND
RDC
C2
14 15 16 17 18 19 20
Notes:
1. Pin 1 is marked for orientation.
2. NC = No Connect
SLIC Products
3
PIN DESCRIPTIONS
Pin Names
AGND/DGND
A(TIP)
Type
Gnd
Description
Analog and digital ground.
Output
Gnd
Output of A(TIP) power amplifier.
Battery (power) ground.
BGND
B(RING)
C3–C1
Output
Inputs
Output of B(RING) power amplifier.
Decoder. SLIC control pins. C3 is MSB and C1 is LSB. TTL compatible.
Anti-Saturation pin for capacitor to filter reference voltage when operating in anti-
saturation region.
CAS
Capacitor
Relay Driver Control. D2–D1 control the relay drivers RYOUT1 and RYOUT2. A logic Low
on D1 activates the RYOUT1 relay driver. A logic Low on D2 activates the RYOUT2 relay
driver. TTL compatible.
D2–D1
Input
DA
DB
Input
Input
Ring-Trip Negative. Negative input to ring-trip comparator.
Ring-Trip Positive. Positive input to ring-trip comparator.
Switchhook Detector. When enabled, a logic Low indicates that a selected condition is
detected. The detect condition is selected by the logic inputs (C3–C1 and E1). The output
is open collector with a built-in 15 kΩ pull-up resistor.
DET
Output
Ground-Key enable. A logic High selects the off-hook detector. A logic Low selects the
ground-key detector. TTL compatible.
E1
Input
HPA
HPB
Capacitor
Capacitor
High-pass filter capacitor. A(TIP) side of the high-pass filter capacitor.
High-pass filter capacitor. B(RING) side of the high-pass filter capacitor.
Overhead voltage control. A logic High enables nonmetering overhead. A logic Low
enables 2.2 V metering DC overhead. TTL compatible.
OVH
RD
Input
Resistor
Detect resistor. Detector threshold set and filter pin.
DC feed resistor. Connection point for the DC feed current programming network. The
other end of the network connects to the receiver summing node (RSN). The sign of VRDC
is negative for normal polarity and positive for reverse polarity.
RDC
Resistor
Ring relay driver. Open collector driver with emitter internally connected to BGND. This
is activated in the ringing state.
RINGOUT
RSG
Output
Input
Saturation guard. A resistor from this pin to ground allows the saturation cut in voltage to
be increased while maintaining AC transmission overhead voltage.
Receive summing node. The metallic current (both AC and DC) between A(TIP) and
B(RING) is equal to 500 times the current into this pin. The networks which program
receive gain, two-wire impedance, and feed resistance all connect to this node.
RSN
Input
Common emitter of RYOUT1/2. Emitter output of RYOUT1 and RYOUT2. Normally
connected to relay ground.
RYE
Output
Output
RYOUT1,
RYOUT2
(Option) Relay/Switch driver. Open collector driver with emitter internally connected to
RYE.
Thermal management. An external resistor connects between this pin and VBAT to
offload power dissipation from the Am7946 SLIC. Functions during Normal Polarity and
Reverse Polarity states.
TMG
—
VBAT
VCC
Battery
Power
Battery supply and connection to substrate.
+5 V power supply.
Scaled VAB output. VDC = |(VAB / 20)|. Range of 0 V to 2.5 V. This output is filtered by
VDC
VNEG
VTX
Output
Power
Output
CHP
.
–4.75 V to VBAT negative supply. This pin is the return for the internal VEE regulator.
Transmit audio. The voltage at this output is equal to the metallic voltage across A(TIP)
and B(RING). VTX also sources the two-wire input impedance programming network.
4
Am7946 Data Sheet
ABSOLUTE MAXIMUM RATINGS
OPERATING RANGES
Storage temperature ......................... –55°C to +150°C
Commercial (C) Device
VCC with respect to AGND/DGND ..... –0.4 V to +7.0 V
Ambient temperature .............................0°C to +70°C*
V
CC ................................................ +4.75 V to +5.25 V
VNEG with respect to AGND/DGND ...... +0.4 V to VBAT
VNEG ................................................... –4.75 V to VBAT
VBAT ......................................................–40 V to –58 V
AGND/DGND..........................................................0 V
VBAT with respect to AGND/DGND:
Continuous..................................... +0.4 V to –80 V
10 ms............................................. +0.4 V to –85 V
BGND with respect to AGND/DGND........ +3 V to –3 V
BGND with respect to
A(TIP) or B(RING) to BGND:
AGND/DGND....................... –100 mV to +100 mV
Continuous ....................................... –70 V to +1 V
10 ms (f = 0.1 Hz) ............................ –70 V to +5 V
1 µs (f = 0.1 Hz) ............................... –80 V to +8 V
250 ns (f = 0.1 Hz) ......................... –90 V to +12 V
Load resistance on VTX to ground ..............20 kΩ min
The Operating Ranges define those limits between which the
functionality of the device is guaranteed.
* Functionality of the device from 0°C to +70°C is guaranteed
by production testing. Performance from –40°C to +85°C is
guaranteed by characterization and periodic sampling of
production units.
Current from A(TIP) or B(RING)....................... 150 mA
RINGOUT or RYOUT1 or RYOUT2 current.......75 mA
RINGOUT voltage................................. BGND to +7 V
RINGOUT transient............................. BGND to +10 V
RYE voltage ..........................................BGND to VBAT
RYOUT1 or RYOUT2 voltage .................. RYE to +7 V
RYOUT1 or RYOUT2 transient.............. RYE to +10 V
DA and DB inputs
Voltage on ring-trip inputs..................... VBAT to 0 V
Current into ring-trip inputs............................ 10 mA
C3–C1, D2–D1, E1, OVH
Input voltage .........................–0.4 V to VCC + 0.4 V
Maximum power dissipation, continuous,
TA = 85°C, No heat sink (See note):
In 32-pin PLCC package..............................1.33 W
Thermal Data................................................................. θJA
In 32-pin PLCC package.......................45°C/W typ
Note: Thermal limiting circuitry on chip will shut down the
circuit at a junction temperature of about 165°C. The device
should never see this temperature and operation above
145°C junction temperature may degrade device reliability.
See the SLIC Packaging Considerations for more
information.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent device failure. Functionality at or above
these limits is not implied. Exposure to Absolute Maximum
Ratings for extended periods may affect device reliability.
SLIC Products
5
ELECTRICAL CHARACTERISTICS
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
VVTX, Analog output
offset voltage
0°C to +70°C
–40°C to +85°C
–35
–40
+35
+40
—
4
mV
Overload level, 2-wire
Overload level, 2-wire
Overload level
Active state, OVH = High
2.5
6.0
Vpk
2a
2b
Active state, OVH = Low
On hook, RLAC = 600 Ω,
1.06
Vrms
OVH = High
Total Harmonic Distortion (THD) 0 dBm
+7 dBm
–64
–55
–50
–40
dB
THD, On hook
0 dBm, RLAC = 600 Ω
–36
5
Longitudinal Performance (See Test Circuit C)
Longitudinal to metallic
L-T, L-4 balance
200 Hz to 1 kHz:
–1, –3*
52
Normal polarity
Reverse polarity
Normal polarity,
–40°C to +85°C
–2, –4
–2
–2, –4
63
58
58
4
4
1 kHz to 3.4 kHz:
–1, –3*
52
dB
Normal polarity
Reverse polarity
Normal polarity,
–40°C to +85°C
–2, –4
–2
–2, –4
58
54
54
Longitudinal signal
generation 4-L
200 Hz to 800 Hz normal polarity
40
27
Longitudinal current per pin
(A or B)
Active or OHT state
35
10
mArms
Longitudinal impedance at A or B 0 to 100 Hz
35
Ω/pin
Idle Channel Noise
C-message weighted noise
RLDC = 600 Ω
LDC = 600 Ω
RLDC = 600 Ω
LDC = 600 Ω
+25°C to +85°C
–40°C to +25°C
+7
+10
+12
—
4
dBrnC
dBmp
R
Psophometric weighted noise
+25°C to +85°C
–40°C to +25°C
–83
–80
–78
—
4
R
Insertion Loss and Balance Return Signal (See Test Circuits A and B)
Gain accuracy
2- to 4-wire, 4- to 4-wire
0 dBm, 1 kHz, nonmetering
0 dBm, 1 kHz, 2.2 V metering
On hook, OHT
–6.22
–6.12
–6.37
–6.02
–5.92
–6.02
–5.82
–5.72
–5.67
4
Gain accuracy
4- to 2-wire
0 dBm, 1 kHz, nonmetering
0 dBm, 1 kHz, 2.2 V metering
On hook, OHT
–0.20
–0.20
–0.35
0
0
0
+0.20
+0.20
+0.35
Gain accuracy over frequency
300 to 3400 Hz
relative to 1 kHz
0°C to +70°C
–40°C to +85°C
–0.10
–0.15
+0.10
+0.15
dB
4
4
Gain tracking
Relative to 0 dBm
+3 dBm to –55 dBm
0°C to +70°C
–40°C to +85°C
–0.10
–0.15
+0.10
+0.15
4
4
Gain tracking, on hook, OHT
Relative to 0 dBm
0 dBm to –37 dBm
0°C to +70°C
–40°C to +85°C
–0.10
–0.15
–0.35
+0.10
+0.15
+0.35
4
4
4
+3 dBm to 0 dBm
0 dBm, 1 kHz
Group delay
3
µs
4, 6
Note:
* Performance Grade
6
Am7946 Data Sheet
ELECTRICAL CHARACTERISTICS (continued)
Line Characteristics
IL, Loop-current accuracy
IL, Long loops, Active state
IL in constant-current region
0.915IL
20.5
IL
1.085IL
RLDC = 1840 Ω, VBAT = –50 V,
OVH = Low
RLDC = 2030 Ω, VBAT = –50 V,
OVH = High
20.5
0.8IL
mA
IL, Accuracy, Standby state
IL
1.2IL
VBAT – 3 V
IL = -------------------------------- TA = 25°C
RL + 400
Constant-current region
16
22
39
ILLIM
Active, A and B to ground
OHT, A and B to ground
100
50
130
4
IL, Open Circuit state
RL = 0 Ω
100
100
µA
IA, pin A leakage, Tip Open state RL = 0 Ω
IB, pin B current, Tip Open state B to ground
B to VBAT + 6 V
26
15
mA
VA, Standby state,
ground-start signaling
A to –48 V = 7 kΩ,
B to ground = 100 Ω
–7.5
–5
4
8
V
VAB, Open Circuit voltage
BAT = –50 V
42.75
44.5
Power Supply Rejection Ratio (VRIPPLE = 100 mVrms), Active Normal State
VCC
50 Hz to 3.4 kHz
50 Hz to 3.4 kHz
50 Hz to 3.4 kHz
CAS pin to ground
30
30
28
85
40
50
VNEG
dB
5
4
VBAT
55
Effective internal resistance
Power Dissipation
On hook, Open Circuit state
On hook, Standby state
On hook, OHT state
On hook, Active state
Off hook, Standby state
Off hook, Active state
Supply Currents, Battery = –58 V
170
255
kΩ
30
70
85
60
120
180
860
550
180
270
1300
800
mW
RTMG = 2.5 kΩ
RL = 300 Ω, RTMG = 2.5 kΩ
ICC
,
Open Circuit state
Standby state
OHT state
2.7
3.3
4.9
6.3
3.8
4.4
7.5
8.5
On-hook VCC supply current
Active normal state
INEG
,
Open Circuit state
Standby state
OHT state
0
0
0.70
0.70
0.1
0.1
1.1
1.1
On-hook VNEG supply current
mA
Active normal state
IBAT
,
Open Circuit state
Standby state
OHT state
0.35
1.0
1.9
3.0
1.0
1.5
4.7
5.7
On-hook VBAT supply current
Active normal state
RFI Rejection
RFI rejection
100 kHz to 30 MHz, (See Figure F)
1.0
mVrms
4
SLIC Products
7
ELECTRICAL CHARACTERISTICS (continued)
Logic Inputs (C3–C1, D2–D1, E1, OVH)
VIH, Input High voltage
VIL, Input Low voltage
2.0
V
0.8
40
IIH, Input High current
–75
µA
IIL, Input Low current
–400
Logic Output (DET)
VOL, Output Low voltage
VOL, Output Low voltage
VOH, Output High voltage
Ring-Trip Detector Input (DA, DB)
Bias current
IOUT = 10 mA
IOUT = 0.8 mA
IOUT = –0.1 mA
1.0
0.40
V
2.4
–500
–50
–50
nA
Offset voltage
Source resistance = 2 MΩ
0
+50
mV
6
Loop Detector
IT, Loop-detect threshold
RD = 35.4 kΩ, Active state
RD = 35.4 kΩ, Standby state
330/RD
380/RD
375/RD
430/RD
420/RD
480/RD
mA
Ground-Key Detector Thresholds
Ground-key resistive threshold
Ground-key current threshold
B to ground
B to ground
2
5
10
kΩ
mA
10
Relay Driver Output (RYOUT1, RYOUT2, and RINGOUT)
VOL, On voltage (each output)
VOL, On voltage (each output)
IOH, Off leakage (each output)
Zener breakover (each output)
Zener On voltage (each output)
IOL = 30 mA
IOL = 40 mA
VOH = +5 V
IZ = 100 µA
IZ = 30 mA
+0.25
+0.35
+0.4
+0.6
100
V
µA
V
4
6.6
7.9
11
RELAY DRIVER SCHEMATICS
RYOUT2
RYOUT1
RINGOUT
RYE
BGND
BGND
BGND
8
Am7946 Data Sheet
Notes:
1. Unless otherwise noted, test conditions are BAT = –52 V, VCC = +5 V, VNEG = –5 V, RL = 600 Ω, RDC1 = RDC2 = 28.4 kΩ,
R
D = 35.4 kΩ, RSG = 0 Ω to GND, RTMG = 2.5 kΩ, no fuse resistors, CHP = 0.22 µF, CDC = 0.1 µF, CCAS = 0.1 µF,
D1 = 1N400x, two-wire AC input impedance is a 600 Ω resistance synthesized by the programming network shown below.
VTX
RT1 = 75 kΩ
RT2 = 75 kΩ
CT1 = 125 pF
RSN
~
VRX
RRX = 150 kΩ
2. a. Overload level is defined when THD = 1%.
b. Overload level is defined when THD = 1.5%.
3. Balance return signal is the signal generated at VTX by VRX. This specification assumes that the two-wire AC load impedance
matches the programmed impedance.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only.
7. Group delay can be greatly reduced by using a ZT network such as that shown in Note 1 above. The network reduces the
group delay to less than 2 µs and increases 2WRL. The effect of group delay on linecard performance also may be compen-
sated for by synthesizing complex impedance with the QSLAC™ or DSLAC™ device.
8. If |BAT| drops below 50 V, the VAB voltage tracks the battery to preserve transmission capability. Open-circuit VAB can be
modified using RSG
.
Table 1. SLIC Decoding
Two-Wire Status
(DET) Output
E1 = 1 E1 = 0
Ring trip Ring trip
State
C3 C2 C1
0
1
2
3
4
5
6
7
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
Open Circuit
Ringing
Ring trip
Ring trip
Active
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
Loop detector
Ground key
Ground key
Ground key
Ground key
Ground key
Ground key
On-hook TX (OHT)
Tip Open
Standby
Active Polarity Reversal
OHT Polarity Reversal
Note:
Only –1 and –2 performance grade devices support polarity reversal.
SLIC Products
9
Table 2. User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse
ZT = (250(Z2WIN – 2RF))
resistors are RF and Z2WIN is the desired 2-wire AC input
impedance. When computing ZT, the internal current amplifier
pole and any external stray capacitance between VTX and RSN
must be taken into account.
ZRX is connected from VRX to RSN. ZT is defined above, and G42L is
the desired receive gain.
ZL
500ZT
----------- -------------------------------------------------
ZRX
=
•
G42L ZT + 250(ZL + 2RF)
RDC1, RDC2, and CDC form the network connected to the RDC pin.
RDC1 and RDC2 are approximately equal. IL is the desired loop
current in the constant-current region.
1250
RDC1 + RDC2 = -----------
IL
R
DC1 + RDC2
-------------------------------
CDC = 1.5 ms •
RDC1RDC2
RD and CD form the network connected from RD to GND and IT is the
threshold current between on hook and off hook.
375
0.5 ms
--------
IT
RD
=
, CD = ----------------
RD
CCAS is the filter regulator filter capacitor and fc is the desired filter
cutoff frequency.
1
CCAS = -----------------------------
3.4 • 105πfc
Thermal Management Equations (Normal Active, Polarity Reverse Active, and Tip Open States)
RTMG is connected from TMG to VBAT and is used to limit power
dissipation within the SLIC in Active and Tip Open states only.
VBAT – 6 V
-------------------------------
RTMG
≥
IL
Power dissipated in the resistor, RTMG, during Active and Tip Open
states.
( VBAT – 6 V – IL • RL )2
PRTMG = ----------------------------------------------------------------
RTMG
Power dissipated in the SLIC while in Active and Tip Open states.
PSLIC = VBAT • IL – PRTMG – RL(IL)2 + 0.12W
10
Am7946 Data Sheet
DC FEED CHARACTERISTICS
60
3
2
50
40
VAB
(volts)
30
1
20
10
0
10
20
30
IL (mA)
RDC = RDC1 + RDC2 = 56.8 kΩ
Notes:
1. VBAT < 48 V, OVH = 1
VBAT < 52 V, OVH = 0
1250
1250
-----------
RDC
VAB1 =
• RL
-----------
RDC
VAB1 =
• RL
RDC
----------
369
RDC
----------
369
VAB2 = 0.818 • VBAT + 5.356 – IL •
VAB3 = 0.818 • VBAT + 2.740 – IL •
VAB2 = 0.818 • VBAT + 5.356 – IL •
VAB3 = 0.818 • VBAT + 2.740 – IL •
RDC
----------
359
RDC
----------
359
2. VBAT ≥ 48 V, OVH = 1
1250
-----------
RDC
VAB1 =
• RL
æ
ö
35500
18587 + R + -----------------------------
ç
÷
SG
è
ø
VBAT – 48
RDC
----------
369
VAB2 = 0.818 • VBAT – 2.276 – IL •
+ -----------------------------------------------------------------------------------------
æ
ö
÷
ø
35500
1777 + 0.131 • R + ----------------------------
ç
SG
è
VBAT – 48
æ
ö
÷
ø
35466
18587 + R + -----------------------------
ç
SG
è
VBAT – 48
RDC
----------
359
VAB3 = 0.818 • VBAT – 4.894 – IL •
+ -----------------------------------------------------------------------------------------
æ
ö
÷
ø
35466
1777 + 0.131 • R + ----------------------------
ç
SG
è
VBAT – 48
a. Load Line (Typical)
SLIC Products
11
DC FEED CHARACTERISTICS (continued)
3. VBAT ≥ 52 V, OVH = 0
1250
-----------
RDC
VAB1 =
• RL where RL = RLOAD + RFUSE
æ
ö
÷
ø
174000
18587 + R + -----------------------------
ç
SG
è
VBAT – 48
RDC
VAB2 = 0.904 • VBAT – 11.031 – IL • ---------- + -----------------------------------------------------------------------------------------
369
æ
ö
÷
ø
174000
1777 + 0.131 • R + -----------------------------
ç
è
SG
VBAT – 48
æ
ö
÷
ø
174000
18587 + R + -----------------------------
ç
SG
è
VBAT – 48
RDC
----------
359
VAB3 = 0.904 • VBAT – 13.649 – IL •
+ -----------------------------------------------------------------------------------------
æ
ö
÷
ø
174000
1777 + 0.131 • R + -----------------------------
ç
SG
è
VBAT – 48
A
RSN
RDC
a
SLIC
RDC2
RL
IL
b
CDC
B
RDC1
Feed current programmed by RDC1 and RDC2
b. Feed Programming
Figure 1. DC Feed Characteristics
12
Am7946 Data Sheet
TEST CIRCUITS
A(TIP)
VTX
RL
2
SLIC
AGND
VAB
VL
RT
RRX
RL
2
RSN
B(RING)
IL2-4 = 20 log (VTX / VAB
)
A. Two- to Four-Wire Insertion Loss
A(TIP)
VTX
SLIC
VAB
RL
RT
RRX
AGND
RSN
B(RING)
VRX
IL4-2 = 20 log (VAB / VRX
)
BRS = 20 log (VTX / VRX
)
B. Four- to Two-Wire Insertion Loss and Balance Return Signal
1
VTX
A(TIP)
SLIC
AGND
<< RL
ωC
RL
2
S1
VL
C
VL
RT
VAB
RL
2
S2
RRX
B(RING) RSN
VRX
S2 Open, S1 Closed
S2 Closed, S1 Open
4-L Long. Sig. Gen. = 20 log (VL / VRX
)
L-T Long. Bal. = 20 log (VAB / VL)
L-4 Long. Bal. = 20 log (VTX / VL)
C. Longitudinal Balance
SLIC Products
13
TEST CIRCUITS (continued)
ZD
A(TIP)
VTX
RT1
R
SLIC
VS
VM
AGND
R
ZIN
CT1
RT2
B(RING)
RSN
ZD: The desired impedance;
RRX
e.g., the characteristic impedance of the line
Return loss = –20 log (2 VM / VS)
D. Two-Wire Return Loss Test Circuit
A(TIP)
B(RING)
RG
E. Ground-Key Switching
RF1
C1
L1
200 Ω
200 Ω
50 Ω
A
B
CAX
33 nF
RF2
50 Ω
HF
GEN
CBX
33 nF
VTX
C2
L2
50 Ω
SLIC
under test
1.5 Vrms
80% Amplitude
Modulated
100 kHz to 30 MHz
F. RFI Test Circuit
14
Am7946 Data Sheet
TEST CIRCUITS (continued)
+5 V
RD
VCC
DA
DB
CD
RD
2.2 nF
A(TIP)
VTX
VTX
A(TIP)
HPA
RT
RRX
CHP
RSN
VRX
HPB
B(RING)
B(RING)
2.2 nF
RDC2
RDC1
RDC
VDC
RINGOUT
RYOUT1
CDC
AGND/
DGND
D1
RYOUT2
RYE
D2
E1
C3
C2
C1
BATTERY
GROUND
BGND
VNEG
–5 V
BAT
VBAT
TMG
ANALOG
GROUND
DET
OVH
RSG
D1
RTMG
CAS
0.1 µF
DIGITAL
GROUND
CCAS
G. Am7946 Test Circuit
SLIC Products
15
PHYSICAL DIMENSION
PL032
.485
.495
.447
.453
.009
.015
.042
.056
.125
.140
.585
.595
Pin 1 I.D.
.080
.095
.547
.553
SEATING
PLANE
.400
REF.
.490
.530
.013
.021
.050 REF.
16-038FPO-5
PL 032
DA79
.026
.032
TOP VIEW
SIDE VIEW
6-28-94 ae
REVISION SUMMARY
Revision A to B
•
Minor changes were made to the data sheet style and format to conform to Legerity standards.
Revision B to Revision C
•
In Table 2, User-Programmable Components, added “Polarity Reverse Active” to the “Thermal Management...”
header.
•
Minor changes were made to the data sheet style and format to conform to Legerity standards.
Revision C to Revision D
•
•
The physical dimension (PL032) was added to the Physical Dimension section.
Updated the Pin Description table to correct inconsistencies.
16
Am7946 Data Sheet
Notes:
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The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with re-
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© 1999 Legerity, Inc.
All rights reserved.
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Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
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