A8732 [ALLEGRO]
Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver; 超小型移动电话氙气闪光灯电容充电器带IGBT驱动器
| 型号： | A8732 |
| 厂家： | 
ALLEGRO MICROSYSTEMS |
| 描述： | Ultra Small Mobile Phone Xenon Photoflash Capacitor Charger with IGBT Driver |
| 文件： | 总20页 (文件大小：544K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A8732
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
Features and Benefits
Description
▪ Ultra small 2 × 2 DFN/MLP-8 package
▪ Low quiescent current draw (0.5 μA max. in shutdown mode)
▪ Primary-side output voltage sensing; no resistor divider required
▪ Adjustable switch peak current limit up to 1.5 A with
single-wire programming through the CHARGE pin
▪ 1V logic (VHI(min)) compatibility
TheAllegro®A8732 is a Xenon photoflash charger IC designed
to meet the needs of ultra low power, small form factor cameras,
particularly camera phones. By using primary-side voltage
sensing, the need for a secondary-side resistive voltage divider
iseliminated.Thishastheadditionalbenefitofreducingleakage
currents on the secondary side of the transformer. To extend
battery life, the A8732 features very low supply current draw
(0.5 μA max in shutdown mode). The switch current limit can
be programmed from 0.45 to 1.5A, in 16 steps with single wire
interface, through the CHARGE pin.
▪ Integrated IGBT driver with internal gate resistors
▪ Optimized for mobile phone, 1-cell Li+ battery applications
▪ Zero-voltage switching for lower loss
▪ >75% efficiency
▪ Charge complete indication
The IGBT driver also has internal gate resistors for minimum
external component count. The charge and trigger voltage
logic thresholds are set at 1 VHI(min) to support applications
implementing low-voltage control logic.
▪ Integrated 50 V DMOS switch with self-clamping
protection
Package: 8-pin DFN/MLP (suffix EE)
The A8732 is available in an 8-contact 2 mm × 2 mm
DFN/MLP package with a 0.60 maximum overall package
height, andanexposedpadforenhancedthermalperformance.
It is lead (Pb) free with 100% matte tin leadframe plating.
2 mm×2 mm, 0.60 mm height
Not to scale
Typical Applications
+
+
Battery Input
C1
Battery Input
2.3 to 5.5 V
C1
1.5 to 5.5 V
COUT
COUT
100F
315 V
100F
315 V
VBAT
VBAT
VOUT Detect
VOUT Detect
SW
SW
VIN_VDRV
C2
VIN_VDRV
C2
Control
Block
Control
Block
I
SW sense
ISW sense
VPULLUP
VPULLUP
100 kΩ
100 kΩ
CHARGE
CHARGE
DONE
DONE
DONE
DONE
V
V
IN_VDRV
IN_VDRV
IGBT Driver
IGBT Driver
TRIG
TRIG
IGBT Gate
GATE
IGBT Gate
GATE
GND
GND
(A)
(B)
Figure 1. Typical applications: (A) with single battery supply and (B) with separate bias supply
8732-DS
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Selection Guide
Part Number
Packing
Package
A8732EEETR-T
3000 pieces per reel
8-contact DFN/MLP with exposed thermal pad
Absolute Maximum Ratings
Characteristic
Symbol
Notes
Rating
Units
DC voltage.
(VSW is self-clamped by internal active clamp
and is allowed to exceed 50 V during flyback
spike durations. Maximum repetitive energy
during flyback spike: 0.5 μJ at frequency
≤ 400 kHz.)
VSW
–0.3 to 50
V
SW Pin
ISW
VIN
DC current, pulse width = 1 ms
3
A
V
VIN_DRV, VBAT Pins
–0.3 to 6.0
Care should be taken to limit the current when
–0.6 V is applied to these pins.
¯¯¯¯¯¯¯¯
CHARGE, TRIG, DONE Pins
–0.6 to VIN + 0.3 V
V
Remaining Pins
–0.3 to VIN + 0.3 V
–40 to 85
V
Operating Ambient Temperature
Maximum Junction
TA
TJ(max)
Tstg
Range E
ºC
ºC
ºC
150
Storage Temperature
–55 to 150
THERMAL CHARACTERISTICS may require derating at maximum conditions
Characteristic
Symbol
Test Conditions*
Value Units
RθJA
Package Thermal Resistance
4-layer PCB, based on JEDEC standard
49 ºC/W
*Additional thermal information available on Allegro Web site.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
2
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Functional Block Diagram
SW
VBAT
VSW – VBAT
DCM
Detector
Control Logic
DMOS
t
off(max)
ILIM
Reference
18 μs
S
R
Q
Q
H m L
VDSref
OCP
Triggered Timer
VIN_DRV
t
on(max)
18 μs
Enable
S
R
Q
Q
Decoder
DONE
CHARGE
TRIG
V
IN_DRV
IGBT Driver
GATE
GND
Terminal List
Pin-out Diagram
Number
Name
Function
Open collector output, pulls low when output reaches target value and CHARGE is
high. Goes high during charging or whenever CHARGE is low.
¯¯¯¯¯¯¯¯
DONE
1
DONE
TRIG
GATE
GND
1
2
3
4
8
7
6
5
CHARGE
VIN_DRV
VBAT
2
3
4
5
6
TRIG
GATE
GND
SW
IGBT trigger input.
PAD
IGBT gate drive output.
SW
Ground connection.
Drain connection of internal DMOS switch. Connect to transformer primary winding.
Battery voltage.
(Top View)
VBAT
Input voltage. Connect to 3 to 5.5 V bias supply. Decouple VIN voltage with 0.1 ꢀF
ceramic capacitor placed close to this pin.
7
VIN_DRV
Charge enable and current limit serial programming pin. Set this pin low to
shut down the chip.
8
–
CHARGE
PAD
Exposed pad for enhanced thermal dissipation. Connect to ground plane.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
3
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
ELECTRICAL CHARACTERISTICS Typical values are valid at VIN = VBAT = 3.6 V; TA = 25°C, except indicates specifications
guaranteed from −40°C to 85°C ambient, unless otherwise noted
Characteristics
VBAT Voltage Range
Symbol
Test Conditions
Min.
Typ. Max. Unit
VBAT
(note 1)
(note 1)
VIN rising
1.5
–
5.5
V
VIN_DRV Voltage Range
UVLO Enable Threshold
UVLO Hysteresis
VIN
2.3
–
–
5.5
2.2
–
V
VINUV
2.05
150
0.02
50
V
VINUV(hys)
–
mV
ꢀA
ꢀA
mA
ꢀA
Shutdown (CHARGE = 0 V, TRIG = 0 V)
Charging complete
–
0.5
100
–
VIN Supply Current
IIN
–
Charging (CHARGE = VIN, TRIG = 0 V)
Shutdown (CHARGE = 0 V, TRIG = 0 V)
–
2
–
0.01
1
VBAT Pin Supply Current
Charging done (CHARGE = VIN
¯¯¯¯¯¯¯¯
DONE = 0 V)
,
IBAT
–
–
–
–
5
ꢀA
ꢀA
Charging (CHARGE = VIN, TRIG = 0 V)
50
Current Limit
Primary-Side Current Limit
ISWLIM
ISWLIM1
ISWLIM2
ISWLIM3
100% setting (note 2)
1.35
1.5
100
95
1.65
A
%
%
%
Default setting
–
–
–
–
–
–
One pulse applied to CHARGE pin
Two pulses applied to CHARGE pin
90
Three pulses applied to CHARGE pin
(note 3)
ISWLIM4
–
86
–
%
ISWLIM5
ISWLIM6
ISWLIM7
Four pulses applied to CHARGE pin
–
–
–
81
76
71
–
–
–
%
%
%
Five pulses applied to CHARGE pin (note 3)
Six pulses applied to CHARGE pin (note 3)
Seven pulses applied to CHARGE pin
(note 3)
ISWLIM8
–
67
–
%
ISWLIM9
ISWLIM10
ISWLIM11
Eight pulses applied to CHARGE pin
–
–
–
62
57
52
–
–
–
%
%
%
Switch Current Limit (ILIM Programming Input
on CHARGE Pin)
Nine pulses applied to CHARGE pin (note 3)
Ten pulses applied to CHARGE pin (note 3)
Eleven pulses applied to CHARGE pin
(note 3)
ISWLIM12
ISWLIM13
ISWLIM14
ISWLIM15
ISWLIM16
–
–
–
–
–
48
43
38
33
29
–
–
–
–
–
%
%
%
%
%
Twelve pulses applied to CHARGE pin
(note 3)
Thirteen pulses applied to CHARGE pin
(note 3)
Fourteen pulses applied to CHARGE pin
(note 3)
Fifteen pulses applied to CHARGE pin
(note 3)
Continued on the next page…
Allegro MicroSystems, Inc.
115 Northeast Cutoff
4
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
ELECTRICAL CHARACTERISTICS (Continued) Typical values are valid at VIN = VBAT = 3.6 V; TA = 25°C, except indicates
specifications guaranteed from −40°C to 85°C ambient, unless otherwise noted
Switch On-Resistance
RSWDS(on)
VIN_DRV = 3.6 V, ID = 600 mA, TA = 25°C
–
0.4
–
ꢁ
VSW = 5.5, over full temperature range
(note 1)
Switch Leakage Current
CHARGE Pull-down Resistance
ISWLK
–
–
2
ꢀA
RCHGPD
–
1.0
–
100
–
–
–
kꢁ
V
High, over input supply range (note 1)
Low, over input supply range (note 1)
CHARGE Input Voltage
VCHARGE
–
0.4
V
Charge Pin Programming
tILIM(H)init
tILIM(H)
Initial Pulse (note 3)
Subsequent Pulses (note 3)
(note 3)
15
0.2
0.2
–
–
–
–
–
ꢀs
ꢀs
ꢀs
ꢀs
ꢀs
ꢀs
V
ILIM Programming High at CHARGE Pin
ILIM Programming Low at CHARGE Pin
Total ILIM Setup Time at CHARGE Pin
Switch-Off Timeout
tILIM(L)
–
–
tILIM(SU)
toff(max)
ton(max)
VOUTTRIP
VOUTOV
IDONELK
(note 3)
200
18
–
–
–
Switch-On Timeout
–
18
–
Output Comparator Trip Voltage
Output Comparator Voltage Overdrive
Measured as VSW – VBAT (note 4)
Pulse width = 200 ns (90% to 90%)
(note 1)
31
–
31.5
200
32
400
1
mV
μA
¯¯¯¯¯¯¯¯
DONE Leakage Current
¯¯¯¯¯¯¯¯
¯¯¯¯¯¯¯¯
DONE Output Low Voltage
VDONEL
dV/dt
32 ꢀA into DONE pin (note 1)
–
–
–
100
–
mV
dV/dt Threshold for ZVS Comparator
Measured at SW pin
20
V/μs
IGBT Driver
Input = logic high, over input supply range
(note 1)
VTRIG(H)
VTRIG(L)
1.0
–
–
–
–
V
V
TRIG Input Voltage
Input = logic low, over input supply range
(note 1)
0.4
TRIG Pull-Down Resistor
GATE Resistance to VIN_DRV
GATE Resistance to GND
RTRIGPD
RSrcDS(on)
RSnkDS(on)
–
–
–
100
21
–
–
–
kꢁ
ꢁ
VGATE = 1.8 V
VGATE = 1.8 V
27
ꢁ
Measurement taken at GATE pin,
CL= 6500 pF (notes 3, 5)
Propagation Delay (Rising)
tDr
–
25
–
ns
Propagation Delay (Falling)
Output Rise Time
tDf
(notes 3, 5)
(notes 3, 5)
(notes 3, 5)
–
–
–
–
60
290
380
20
–
–
–
–
ns
ns
ns
kꢁ
tr
tf
Output Fall Time
GATE Pull-Down Resistor
RGTPD
1 Specifications throughout the range TA = –40°C to 85°C guaranteed by design and characterization.
2Current limit guaranteed by design and correlation to static test.
3Guaranteed by design and characterization.
4Specifications throughout the range TA = –20°C to 85°C guaranteed by design and characterization.
5See IGBT Drive Timing Definition diagram for further information.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
5
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
IGBT Drive Timing Definition
50%
50%
TRIG
t
t
r
t
Df
t
f
Dr
90%
90%
GATE
10%
10%
Operation Timing Diagram
VBAT
UVLO
V
IN
CHARGE
SW
Target V
OUT
V
OUT
DONE
T2
T3
T1
TRIG
GATE
A
B
C
D
E
F
Explanation of Events
A: Start charging by pulling CHARGE to high, provided that V is above UVLO level.
IN
B: Charging stops when V
reaches the target voltage.
OUT
C: Start a new charging process with a low-to-high transition at the CHARGE pin.
D: Pull CHARGE to low to put the controller in low-power standby mode.
E: Charging does not start, because V is below UVLO level when CHARGE goes high.
IN
F: After V goes above UVLO, another low-to-high transition at the CHARGE pin is required to
IN
start the charging.
T1, T2, T3 (Trigger instances): IGBT driver output pulled high whenever the TRIG pin is at logic
high. It is recommended to avoid applying any trigger pulses during charging.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
6
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Characteristic Performance
IGBT Drive Performance
IGBT drive waveforms are measured at pin, with capacitive load of 6800 pF
tr
Rising Signal
VIN
Symbol
Parameter Units/Division
C1
C2
C3
t
VTRIGGER
VGATE
VIN
1 V
1 V
1 V
100 ns
Value
23 ns
320 ns
6.8 nF
time
C2,C3
Conditions Parameter
VGATE
tDr
tr
CLOAD
C1
VTRIGGER
t
tf
Falling Signal
VIN
Symbol
Parameter Units/Division
C1
C2
C3
t
VTRIGGER
VGATE
VIN
1 V
1 V
1 V
VGATE
time
100 ns
Conditions Parameter
Value
58 ns
402 ns
6.8 nF
C2,C3
tDr
tr
CLOAD
VTRIGGER
C1
t
Allegro MicroSystems, Inc.
115 Northeast Cutoff
7
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Characteristic Performance
Charge Time versus Battery Voltage at Various ILIM
Transformer LPRIMARY = 12.8 μH, N =10.25, VIN =3.6 V, COUT = 100 μF / 330 V UCC, at room temperature
20
18
ILIM13 (0.65A)
16
14
ILIM11 (0.79A)
12
ILIM9 (0.93A)
10
ILIM7 (1.07A)
8
ILIM5 (1.22A)
6
ILIM3 (1.36A)
4
ILIM1 (1.50A)
2
0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Battery Voltage (V)
Efficiency versus Battery Voltage at Various ILIM
Transformer LPRIMARY = 12.8 μH, N =10.25, VIN =3.6 V, at room temperature
86%
84%
82%
80%
78%
76%
74%
72%
70%
68%
66%
64%
62%
60%
58%
56%
54%
ILIM13 (0.65A)
ILIM11 (0.79A)
ILIM9 (0.93A)
ILIM7 (1.07A)
ILIM5 (1.22A)
ILIM3 (1.36A)
ILIM1 (1.50A)
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Allegro MicroSystems, Inc.
115 Northeast Cutoff
8
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Final Output Voltage versus Battery Voltage at Various ILIM
Transformer LPRIMARY = 12.8 μH, N =10.25, VIN =3.6 V, at room temperature
328
327
326
325
324
323
322
321
320
ILIM15 (0.51A)
ILIM13 (0.65A)
ILIM11 (0.79A)
ILIM9 (0.93A)
ILIM7 (1.07A)
ILIM5 (1.22A)
ILIM3 (1.36A)
ILIM1 (1.50A)
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Battery Voltage (V)
Note: Output voltage is sensed from the primary side winding when the switch turns off. This duration, toff , has
to be long enough (>200 ns) in order to obtain an accurate measurement. The value of toff depends on ISWlim
,
primary inductance, LPrimary , and the turns ratio, N, as given by: toff = (ISWlim × LPRIMARY × N) / VOUT
.
Final Output Voltage versus Secondary Side Conduction Time
at Various Battery Voltages
Transformer LPRIMARY = 12.8 μH, N =10.25, VIN =3.6 V, at room temperature
328
327
326
V
(V)
BAT
5.0
325
324
323
322
321
320
4.2
3.6
2.2
150
200
250
300
350
400
450
500
550
600
650
toff (ns)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
9
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Average Input Current versus Battery Voltage at Various ILIM
Transformer LPRIMARY = 12.8 μH, N =10.25, VIN =3.6 V, at room temperature
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
ILIM1 (1.50A)
ILIM3 (1.36A)
ILIM5 (1.22A)
ILIM7 (1.07A)
ILIM9 (0.93A)
ILIM11 (0.79A)
ILIM13 (0.65A)
ILIM15 (0.51A)
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Battery Voltage (V)
Note: Peak switch current is limited by the maximum on-time and di/dt of the transformer primary
current; therefore, average input current drops at very low battery voltage.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
10
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Charging Waveforms
Output Capacitor Charging at Various Peak Current Limits
Test conditions: VIN = 3.0 V, VBAT = 3.7 V, COUT = 100 μF / 330 V UCC, transformer = T-16-024A (LPRIMARY =12.8 μH, N = 10.25), at room temperature
¯¯¯¯¯¯¯¯
Oscilloscope settings: Ch1 = DONE (5 V / div), Ch2 = Output Voltage (50 V / div), Ch3 = Input Current (100 mA / div), Time scale = 1 sec / div
VOUT
ILIM1 (1.5 A)
IIN
C2,C3
VDONE
C1
VOUT
ILIM5 (1.22 A)
IIN
C2,C3
VDONE
C1
VOUT
ILIM9 (0.93 A)
IIN
C2,C3
VDONE
C1
VOUT
ILIM11 (0.79 A)
IIN
VDONE
C2,C3
C1
t
Allegro MicroSystems, Inc.
115 Northeast Cutoff
11
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Output Capacitor Charging at Various Battery Voltages
Test conditions: VIN = 3.0 V, ILIM3 (1.36 A), COUT = 100 μF / 330 V UCC, transformer = T-16-024A (LPRIMARY =12.8 μH, N = 10.25), at room temperature
¯¯¯¯¯¯¯¯
Oscilloscope settings: Ch1 = DONE (5 V / div), Ch2 = Battery Voltage (1 V / div), Ch3 = Output Voltage (50 V / div), Ch4 = Input Current (100 mA V / div),
Time scale = 1 sec / div
VOUT
VBAT
VBAT = 3.0 V
IIN
C2,C3,C4
VDONE
C1
VOUT
VBAT
V
BAT = 3.7 V
IIN
C2,C3,C4
C1
VDONE
VOUT
VBAT
VBAT = 4.2 V
IIN
C2,C3,C4
C1
VDONE
VOUT
VBAT
VBAT = 5.0 V
IIN
C2,C3,C4
C1
VDONE
t
Allegro MicroSystems, Inc.
115 Northeast Cutoff
12
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Functional Description
General Operation Overview
Timer Mode and Fast Charging Mode
The charging operation is started by a low-to-high signal on the
CHARGE pin, provided that VIN is above the VUVLO level. It is
strongly recommended to keep the CHARGE pin at logic low
during power-up. After VIN exceeds the UVLO level, a low-
to-high transition on the CHARGE pin is required to start the
charging.
The A8732 achieves fast charging times and high efficiency by
operating in discontinuous conduction mode (DCM) through
most of the charging process. The relationship of Timer mode and
Fast Charging mode is shown in figure 2.
The IC operates in Timer mode when beginning to charge a com-
pletely discharged photoflash capacitor, usually when the output
voltage, VOUT, is less than approximately 30 V (depending on
transformer used). Timer mode is a fixed period, 18 μs, off-time
control. One advantage of having Timer mode is that it limits the
initial battery current surge and thus acts as a “soft-start.” A time-
expanded view of a Timer mode interval is shown in figure 3.
¯¯
¯
¯¯
¯
¯¯¯¯
The DONE open-drain indicator is pulled low when CHARGE
is high and target output voltage is reached. The primary peak
current is set to 1.5 A by default, but it can be programmed from
1.5 A down to approximately 0.44 A in 15 steps. See the ILIM
Programming section for details.
When a charging cycle is initiated, the transformer primary side
current, IPRIMARY, ramps-up linearly at a rate determined by the
combined effect of the battery voltage, VBAT, and the primary
side inductance, LPRIMARY. When IPRIMARY reaches the current
limit, ISWLIM , the internal MOSFET is turned off immediately,
allowing the energy to be pushed into the photoflash capacitor,
COUT, from the secondary winding. The secondary side current
drops linearly as COUT charges. The switching cycle starts again,
either after the transformer flux is reset, or after a predetermined
time period, tOFF(max) (18 μs), whichever occurs first.
VOUT
IIN
The A8732 senses output voltage indirectly on primary side. This
eliminates the need for high voltage feedback resistors required
for secondary sensing. Flyback converter stops switching when
output voltage reaches:
Figure 2. Timer mode and Fast Charging mode: VOUT = 50 V/div,
IIN = 100 mA/div., VIN = VBAT = 3.6 V, COUT = 100 ꢀF/330 V, ILIM = 1.0 A,
and t = 1 s/div.
VOUT = K × N – Vd ,
Where:
K = 31.5 V typically,
Vd is the forward drop of the output diode (approximately 2 V),
and
ISW
C4
N is transformer turns ratio.
VSW
Switch On-Time and Off-Time Control
The A8732 implements an adaptive on-time/off-time control. On-
time duration, ton , is approximately equal to
VBAT
C2,C3
t
on = ISWlim × LPRIMARY / VBAT .
VOUT
Off-time duration, toff , depends on the operating conditions
during switch off-time. The A8732 applies two charging modes:
Fast Charging mode and Timer mode, according to the conditions
described in the next section.
C1
Figure 3. Expanded view of Timer mode: VOUT ≤ 10 V, VBAT = 5.5 V,
Ch1: VOUT = 20 V/div., Ch2: VBAT = 5 V/div., Ch3: VSW = 5 V/div.,
Ch4: ISW = 500 mA/div., t = 5 ꢀs / div.
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Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
As soon as a sufficient voltage has built up at the output capaci-
tor, the IC enters Fast-Charging mode. In this mode, the next
switching cycle starts after the secondary side current has stopped
flowing, and the switch voltage has dropped to a minimum value.
A proprietary circuit is used to allow minimum-voltage switch-
Fast-Charging mode to start earlier, thereby reducing the overall
charging time. Minimum-voltage switching is shown in figure 4.
During Fast-Charging mode, when VOUT is high enough (over
50 V), true zero-voltage switching (ZVS) is achieved. This
further improves efficiency as well as reduces switching noise. A
ing, even if the SW pin voltage does not drop to 0 V. This enables ZVS interval is shown in figure 5.
ISW
ISW
C4
C4
VSW
VSW
VBAT
VBAT
C2,C3
C1
C2,C3
C1
VOUT
VOUT
Figure 4. Minimum-voltage switching: VOUT ≥ 35 V, VBAT = 5.5 V,
Ch1: VOUT = 20 V/div., Ch2: VBAT = 5 V/div., Ch3: VSW = 5 V/div.,
Ch4: ISW = 500 mA/div., t = 1 ꢀs / div.
Figure 5. True zero-voltage switching (ZVS): VOUT = 75 V, VBAT = 5.5 V,
Ch1: VOUT = 20 V/div., Ch2: VBAT = 5 V/div., Ch3: VSW = 5 V/div.,
Ch4: ISW = 500 mA/div., t = 0.5 ꢀs / div.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
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Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
current starts to ramp up to the set ISWLIM. The ISWLIM setting
ILIM Programming
The peak current limit can be programmed to sixteen differ-
ent levels, from 100% to 29%, with programming through the
CHARGE pin. An internal digital circuit decodes the input clock
signals, which sets the switch current limit. This flexible scheme
allows the user to operate the A8732 at required current limits.
The battery life can be effectively extended by setting a lower cur-
rent limit at low battery voltages. Figure 6 shows the ILIM clock
remains in effect as long as the CHARGE pin is high. To reset the
ILIM decoder, pull the CHARGE pin low before clocking-in the
new setting.
After the first start-up or an ILIM decoder reset, each new current
limit can be set by sending a burst of pulses to the CHARGE
pin. The first rising edge starts the ILIM decoder, and up to 16
rising edges will be counted to set the ISWLIM level. The first
pulse width, tILIM1(H), must be at least 15 ꢀs long. Subsequent
pulses (up to 15 more) can be as short as 0.2 ꢀs. The last low-
to-high edge must arrive within 200 ꢀs from the first edge. The
CHARGE pin will stay high afterwards.
timing scheme protocol. The total ILIM setup time, tILIM(SU)
,
denotes the time needed for the decoder circuit to receive ILIM
inputs and set ISWLIM , and has a typical duration of 200 ꢀs.
Figure 7 shows the timing definition of the primary current
limiting circuit. At the end of the setup period, tILIM(SU) , primary
(0 to 15)
Figure 6. ILIM programming timing definition
Figure 7. Current limit timing example (ISWLIM4 selected)
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Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Applications Information
The minimum pulse width for toff determines what is the mini-
Transformer Design
1. The transformer turns ratio, N, determines the output voltage:
mum LPRIMARY required for the transformer. For example, if
ILIM8 = 1.0 A, N = 10, and VOUT = 315 V, then LPRIMARY must
be at least 6.3 μH in order to keep toff at 200 ns or longer. These
relationships are illustrated in figure 8.
N = NS / NP
VOUT = 31.5 × N – Vd ,
where 31.5 is the typical value of VOUTTRIP, and Vd is the for-
ward drop of the output diode.
In general, choosing a transformer with a larger LPRIMARY results
in higher efficiency (because a larger LPRIMARY corresponds to
a lower switch frequency and hence lower switching loss). But
transformers with a larger LPRIMARY also require more windings
and larger magnetic cores. Therefore, a trade-off must be made
between transformer size and efficiency.
2. The primary inductance, LPRIMARY, determines the on-time of
the switch:
ton = (–LPRIMARY/R)×ln(1 – ISWlim × R/V ) ,
IN
where R is the total resistance in the primary current path (includ-
ing RSWDS(on) and the DC resistance of the transformer).
Leakage Inductance and Secondary Capacitance
The transformer design should minimize the leakage induc-
tance to ensure the turn-off voltage spike at the SW node does
not exceed the absolute maximum specification on the SW pin
(refer to the Absolute Maximum Ratings table). An achievable
minimum leakage inductance for this application, however, is
usually compromised by an increase in parasitic capacitance.
Furthermore, the transformer secondary capacitance should be
minimized. Any secondary capacitance is multiplied by N2 when
reflected to the primary, leading to high initial current swings
when the switch turns on, and to reduced efficiency.
If VIN is much larger than ISWlim ×R, then ton can be approxi-
mated by:
ton = ISWlim ×LPRIMARY /VIN .
3. The secondary inductance, LSECONDARY, determines the off-
time of the switch. Given:
LSECONDARY/LPRIMARY = N×N , then
toff = (ISWlim /N)×LSECONDARY/VOUT
= (ISWlim ×LPRIMARY×N)/VOUT
.
toff
ton
VSW
ISW
V
r
tf
V
V
IN
IN
VSW
ISW
tneg
Figure 8. Transformer Selection Relationships
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Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Effects of Input Filters
Input Capacitor Selection
VOUT
Ceramic capacitors with X5R or X7R dielectrics are recom-
mended for the input capacitor, CIN. During initial Timer mode
the device operates with 18 ꢀs off-time. The resonant period
caused by input filter inductor and capacitor should be at least
2 times greater or smaller than the 18 ꢀs Timer period, to reduce
input ripple current during this period. The typical input LC filter
is shown in figure 9.
VBAT
C2
C3
IBAT
C1
The resonant period is given by:
T
res = 2 ꢁ (L × CIN)1/2
.
Figure 10. Input current waveforms with Li+ battery connected by
5-in. wire and decoupled by 4.7 ꢀF capacitor, COUT = 100 μF,
VIN = VBAT = 3.6 V, Ch1: VOUT = 50 V/div, Ch2: VBAT = 2 V/div,
Ch3: IBAT = 500 mA/div, t = 1 s/div
The effects of input filter components are shown in figures 10,
11, and 12. It is recommended to use at least 10 μF / 6.3 V to
decouple the battery input, VBAT , at the primary of the trans-
former. Decouple the VIN pin using 0.1 μF / 6.3 V bypass
capacitor.
VOUT
VBAT
Output Diode Selection
C2
IBAT
Choose rectifying diodes, D1, to have small parasitic capacitance
(short reverse recovery time) while satisfying the reverse voltage
and forward current requirements. The peak reverse voltage of
the diodes, VDPeak , occurs when the internal MOSFET switch is
closed. It can be calculated as:
C3
C1
Figure 11. Input current waveforms with Li+ battery connected through
4.7 ꢀH inductor and 4.7 ꢀF capacitor, COUT = 100 μF, VIN = VBAT = 3.6 V,
Ch1: VOUT = 50 V/div, Ch2: VBAT = 2 V/div, Ch3: IBAT = 200 mA/div,
t = 1 s/div
VDPeak = VOUT + N × VBAT
.
The peak current of the rectifying diode, IDPeak, is calculated as:
IDPeak = IPRIMARY_Peak / N .
VOUT
L
VBAT
IN
C2
IBAT
+
A8732
C3
V
C
BAT
IN
C1
Figure 12. Input current waveforms with Li+ battery connected through
4.7 ꢀH inductor and 10 ꢀF capacitor, COUT = 100 μF, VIN = VBAT = 3.6 V,
Ch1: VOUT = 50 V/div, Ch2: VBAT = 2 V/div, Ch3: IBAT = 200 mA/div,
t = 1 s/div
Figure 9. Typical input section with input inductance (inductance, LIN, may
be an input filter inductor or inductance due to long wires in test setup)
Allegro MicroSystems, Inc.
115 Northeast Cutoff
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Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Avoid placing any ground plane area underneath the transformer
Layout Guidelines
secondary and diode, to minimize parasitic capacitance.
Key to a good layout for the photoflash capacitor charger circuit
is to keep the parasitics minimized on the power switch loop
(transformer primary side) and the rectifier loop (secondary side).
Use short, thick traces for connections to the transformer primary
For low threshold logic (<1.2 V) add 1 nF capacitors across the
CHARGE and TRIGGER pins to GND to avoid malfunction due
to noise.
¯¯
¯
¯¯
¯
¯¯¯¯
and SW pin. It is important that the DONE signal trace and other
signal traces be routed away from the transformer and other
switching traces, in order to minimize noise pickup. In addition,
high voltage isolation rules must be followed carefully to avoid
breakdown failure of the circuit board.
Connect the EE package PAD to the ground pad for better ther-
mal performance. Use ground planes on the top and bottom layers
below the IC and connect them through multiple thermal vias.
Refer to the figures on page 18 for recommended layout.
Recommended Components
Component
C1, Input Capacitor
C2
Rating
Part Number
Source
Taiyo Yuden
10 ꢀF, ±10%, 6.3 V, X5R ceramic
capacitor (0805)
JMK212BJ106K
0.1uF, 6.3V X5R ceramic capacitor
COUT, Photoflash
Capacitor
100 ꢀF / 330 V
EPH-31ELL101B131S Chemi-Con
Philips Semiconductor,
Fairchild Semiconductor
D1, Output Diode
T1, Transformer
2 x 250 V, 225 mA, 5 pF
BAV23S
LPRIMARY = 12.8 μH, N= 10.25,
6.5 × 8 × 4 mm
T-16-024A
Tokyo Coil Electric
Allegro MicroSystems, Inc.
115 Northeast Cutoff
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Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Recommended layout:
Vout
D1
VBAT
1
2
BAV23S
C2
X2
2
1
4
Cout1
100uF
C4
10uF
Schematic
0.1uF
TCE_T-16-024A
3
DONE
CHARGE
TP_Gate
R10
2k
6
7
1
8
5
3
2
4
A8732
VBAT
SW
GATE
TRIG
GND
VIN_DRV
DONE
Rg
12
CHARGE
C6
1nF
C5
1nF
U1
TRIGGER
Top side
Bottom side
Top components
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Ultra Small Mobile Phone Xenon Photoflash
Capacitor Charger with IGBT Driver
A8732
Package EE 8-Contact DFN/MLP with Exposed Thermal Pad
0.30
0.50
8
2.00 ±0.15
8
0.83
2.00 ±0.15
0.90
2.13
A
1
2
1
1.60
D
C
9X
SEATING
PLANE
0.08
C
C
PCB Layout Reference View
+0.05
–0.04
0.25 ±0.05
0.55
0.50 BSC
1
2
All dimensions nominal, not for tooling use
(reference JEDEC MO-229UCCD)
Dimensions in millimeters
Exact case and lead configuration at supplier discretion within limits shown
0.325 ±0.050
A
B
Terminal #1 mark area
0.90
Exposed thermal pad (reference only, terminal #1
identifier appearance at supplier discretion)
B
C
Reference land pattern layout (reference IPC7351
SON50P200X200X100-9M);
All pads a minimum of 0.20 mm from all adjacent pads; adjust as
necessary to meet application process requirements and PCB layout
tolerances; when mounting on a multilayer PCB, thermal vias at the
exposed thermal pad land can improve thermal dissipation (reference
EIA/JEDEC Standard JESD51-5)
8
1.60
D
Coplanarity includes exposed thermal pad and terminals
Copyright ©2008-2010, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such departures from the detail specifications as may be required to per-
mit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, Inc. assumes no responsibility for its use;
nor for any infringement of patents or other rights of third parties which may result from its use.
Allegro MicroSystems, Inc.
115 Northeast Cutoff
20
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
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