A6217KLJTR-T
更新时间：2024-09-18 22:02:05
品牌：ALLEGRO
描述：Automotive-Grade, Constant-Current PWM Dimmable Buck Regulator LED Driver
概述
数据手册A6217KLJTR-T 概述
Automotive-Grade, Constant-Current PWM Dimmable Buck Regulator LED Driver
A6217KLJTR-T 数据手册
通过下载A6217KLJTR-T数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。
PDF下载A6217 and A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
DESCRIPTION
FEATURES AND BENEFITS
The A6217 is a single IC switching regulator that provides
constant-currentoutputtodrivehigh-powerLEDs.Itintegrates
ahigh-sideN-channelDMOSswitchforDC-to-DCstep-down
(buck) conversion. A true average current is output using a
cycle-by-cycle, controlled on-time method.
• AEC-Q100 qualified
• 6 to 48 V supply voltage
• True average output current control
• 3 A maximum output over operating temperature range
(1.5 A for A6217-1)
• Cycle-by-cycle current limit
• Integrated MOSFET switch
Output current is user-selectable by an external current sense
resistor. Output voltage is automatically adjusted to drive
various numbers of LEDs in a single string. This ensures the
optimal system efficiency.
• Enable / PWM dimming via direct logic input or power
supply voltage
• Internal control loop compensation
• Undervoltage lockout (UVLO) and thermal shutdown
protection
LED dimming is accomplished by a direct logic input pulse-
width-modulation (PWM) signal at the enable pin.
• Low power shutdown (1 µA typical)
• Robust protection against:
▫ꢀAdjacentꢀpin-to-pinꢀshort
▫ꢀPin-to-GNDꢀshort
▫ꢀComponentꢀopen/shortꢀfaults
• Enhancements over A6213:
The device is provided in a 3 mm × 3 mm wettable flank 10-pin
DFN(suffixEJ)oran8-pinnarrowSOIC(suffixLJ), bothwith
exposed pad for enhanced thermal dissipation. Both packages
are lead (Pb) free, with 100% matte-tin leadframe plating.
▫ꢀDitheringꢀofꢀswitchingꢀfrequencyꢀtoꢀreduceꢀEMI
▫ꢀAbleꢀtoꢀdriveꢀsingleꢀwhiteꢀLEDꢀfromꢀ18ꢀVꢀsupplyꢀatꢀ2.2ꢀMHz
▫ꢀSmallerꢀpackageꢀoption
APPLICATIONS:
Automotive lighting
• Daytime running lights
• Front and rear fog lights
• Turn/stop lights
PACKAGES:
10-pin DFN with
wettable flank
• Map light
(suffix EJ)
• Dimmable interior lights
Not to scale
8-pin SOICN
(suffix LJ)
TYPICAL APPLICATION CIRCUIT
V (6 to 48 V)
IN
L1
LED+
C1
GND
A6217
(EJ)
1, 2
9,10
VIN
SW
D1
R1
C4
3
4
8
7
TON
BOOT
GND
VCC
EN
EN
CS
PAD
6
5
C5
Enable/PWM Dimming
(100 Hz to 2 kHz)
LED–
RSENSE
A6217-DS
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
SELECTION GUIDE
Maximum Output
Part Number
Package
Packing
Current (A)
A6217KEJTR-J
A6217KEJTR-1-J
A6217KLJTR-T
A6217KLJTR-1-T
3
Wettable flank 10-pin DFN with exposed thermal pad
Wettable flank 10-pin DFN with exposed thermal pad
8-pin SOICN with exposed thermal pad
Contact Factory
Contact Factory
1.5
3
3000 pieces per 13-in. reel
3000 pieces per 13-in. reel
1.5
8-pin SOICN with exposed thermal pad
ABSOLUTE MAXIMUM RATINGS
Characteristic
Symbol
Notes
Rating
Unit
V
Supply Voltage
VIN
VBOOT
VSW
–0.3 to 50
–0.3 to VIN+8
–1.5 to VIN+0.3
–0.3 to 7
Bootstrap Drive Voltage
Switching Voltage
V
V
Linear Regulator Terminal
Enable and TON Voltage
Current Sense Voltage
Maximum Junction Temperature
Storage Temperature
VCC
VCC to GND
V
VEN , VTON
–0.3 to VIN+0.3
–0.3 to 7
V
VCS
V
TJ(max)
Tstg
150
ºC
ºC
–55 to 150
THERMAL CHARACTERISTICS*: May require derating at maximum conditions; see application section for optimization
Characteristic
Symbol
Test Conditions*
Value
Unit
ºC/W
ºC/W
DFN-10 (EJ) package on 4-layer PCB based on JEDEC standard
SOICN-8 (LJ) package on 4-layer PCB based on JEDEC standard
45
35
Package Thermal Resistance
(Junction to Ambient)
RθJA
Package Thermal Resistance
(Junction to Pad)
RθJP
2
ºC/W
*Additional thermal information available on the Allegro™ website.
Pinout Diagrams
Terminal List Table
Number
Name
Function
EJ
LJ
VIN
VIN
TON
EN
1
2
3
4
5
10 SW
9
8
7
6
SW
1, 2
1
VIN
Supply voltage input terminals
PAD
BOOT
GND
VCC
Regulator on-time setting resistor terminal;
determines the switching frequency of the converter
3
2
TON
CS
Input for Enable and PWM dimming; rated up to
VIN and logic-level compatible
4
5
6
3
4
5
EN
CS
Package EJ Pinouts
Drive output current sense feedback
Internal linear regulator output; add filter capacitor
of 0.1 µF from this pin to GND
VCC
8
7
6
5
SW
1
2
3
4
VIN
TON
EN
7
8
6
7
GND
Ground terminal
BOOT
GND
VCC
BOOT
DMOS gate driver bootstrap terminal
PAD
9, 10
–
8
–
SW
Switched output terminals
Exposed pad for enhanced thermal dissipation;
connect to GND
PAD
CS
Package LJ Pinouts
Allegro MicroSystems, LLC
115 Northeast Cutoff
2
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
FUNCTIONAL BLOCK DIAGRAM
CVCC
CBOOT
L1
LED String
D1
VCC
BOOT
SW
VIN
VIN
VREG 5.3 V
VCC
UVLO
~VOUT
Average
On-Time
Current
Generator
Off-Time
Timer
Gate Drive
UVLO
On-Time
Timer
TON
Shutdown
RON
Dithering
(±5%)
Level Shift
EN
+
–
IC and Driver
Control Logic
VIL = 0.4 V
Buck Switch
Current Sense
+
V
IH = 1.8 V
Current Limit
Off-Time
Timer
–
CCOMP
ILIM
V
CC UVLO
+
+
0.2 V
Thermal
Shutdown
–
–
CS
RSENSE
PAD
GND
Allegro MicroSystems, LLC
115 Northeast Cutoff
3
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
ELECTRICAL CHARACTERISTICS: Valid at VIN = 12 V, TJ = –40°C to 125°C, typical values at TJ = 25°C, unless otherwise noted
Characteristics
Input Supply Voltage
Symbol
VIN
Test Conditions
Min.
6
Typ.
–
Max.
48
–
Unit
V
V
IN Undervoltage Lockout Threshold
IN Undervoltage Lockout Hysteresis
VUVLO
VIN increasing
–
5.3
150
2.5
1
V
V
VUVLO
VIN decreasing
–
–
mV
mA
mA
µA
A
_HYS
VIN Pin Supply Current
VIN Pin Standby Current
VIN Pin Shutdown Current
IIN
IINSB
IINSD
VCS = 0.5 V, EN = High
VCS = 0.5 V, EN = high to low, within 10 ms
EN shorted to GND
–
–
–
–
–
1
10
5.0
2.7
0.4
4.3
–
A6217
3.0
1.9
–
4.0
2.2
0.25
3.5
370
110
75
Buck Switch Current Limit Threshold
ISWLIM
A6217-1
A
Buck Switch On-Resistance
RDS(on)
VBOOT = VIN + 4.3 V, TA = 25°C, ISW = 1 A
VBOOT to VSW increasing
Ω
BOOT Undervoltage Lockout Threshold
VBOOTUV
2.7
–
V
BOOT Undervoltage Lockout Hysteresis VBOTUVHYS VBOOT to VSW decreasing
mV
ns
ns
ns
%
Switching Minimum Off-Time
Switching Minimum On-Time
Selected On-Time
tOFFmin
tONmin
VCS = 0 V
–
150
100
300
–
–
tON
VIN = 12 V, VOUT = 6 V, RON = 31.6 kΩ
RON = 31.6 kΩ
200
–
250
±5
Oscillator Frequency Dithering Range
Dithering Modulation Frequency
fSW_DITH
fSW_MOD
RON = 31.6 kΩ
–
11
–
kHz
REGULATION COMPARATOR AND ERROR AMPLIFIER
Load Current Sense Regulation
VCSREG
VCS decreasing, SW turns on
VCS = 0.2 V, EN = low
187.5
–
200
0.9
210
–
mV
µA
Threshold[1]
Load Current Sense Bias Current
INTERNAL LINEAR REGULATOR
VCC Regulated Output
VCC Current Limit[2]
ICSBIAS
VCC
0 mA < ICC < 5 mA, VIN > 6 V
VCC = 0 V
5.1
5
5.4
20
5.7
–
V
ICCLIM
mA
ENABLE INPUT
Logic High Voltage
VIH
VIL
VEN increasing
VEN decreasing
VEN = 5 V
1.8
–
–
–
–
0.4
–
V
V
Logic Low Voltage
EN Pin Pull-Down Resistance
RENPD
–
100
kΩ
Measured while EN = low, during dimming
control, and internal references are
powered on
Maximum PWM Dimming Off-Time
tPWML
12
20
–
ms
(exceeding tPWML results in shutdown)
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
TSD
–
–
165
25
–
–
°C
°C
TSDHYS
1 In test mode, a ramp signal is applied at CS pin to determine the CS pin regulation threshold voltage. In actual application, the average CS pin
voltage is regulated at VCSREG regardless of ripple voltage.
2 The internal linear regulator is not designed to drive an external load
Allegro MicroSystems, LLC
115 Northeast Cutoff
4
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
CHARACTERISTIC PERFORMANCE
C1,C2
C3
C4
Panel 1B. VIN = 12 V
Panel 1A. VIN = 7 V
Panel 1C. VIN = 18 V
Figure 1: Startup waveforms from off-state at various input voltages. Note that there is a fixed startup delay of ~70 µs before switching
starts. Subsequent rise time of the LED current depends on input/output voltages, inductor value, and switching frequency.
• Operating conditions: LED voltage = 3.5 V, LED current = 1.5 A, R1 = 73.2 kΩ (frequency = 1 MHz in steady state), L1 = 15 µH,
VIN = 7 V (panel 1A), 12 V (panel 1B), and 18 V (panel 1C)
• Oscilloscope settings: CH1 (Red) = VIN (5 V/div), CH2 (Blue) = VSW (5 V/div),
CH3 (Green) = iLED (500 mA/div), CH4 (Yellow) = Enable (5 V/div), time scale = 20 µs/div
Allegro MicroSystems, LLC
115 Northeast Cutoff
5
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
C1,C2
C3
C4
Panel 2A. Duty cycle = 50% and time scale = 1 ms/div
Panel 2B. Duty cycle = 2% and time scale = 50 µs/div
Figure 2: PWM operation at various duty cycles; note that there is no startup delay during PWM dimming operation
• Operating conditions: PWM dimming at 200 Hz, VIN = 12 V, VOUT = 7 V, R1 = 73.2 kΩ, duty cycle = 50% (panel 2A) and 2% (panel 2B)
• CH1 (Red) = VIN (5 V/div), CH2 (Blue) = VOUT (5 V/div),
CH3 (Green) = iLED (500 mA/div), CH4 (Yellow) = Enable (5 V/div), time scale = 1 ms/div (panel 2A) and 50 µs/div (panel 2B)
Allegro MicroSystems, LLC
115 Northeast Cutoff
6
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
95
95
VIN = 24 V, VOUT = 15 V
fSW = 500 kHz
90
85
80
75
70
90
fSW = 1 MHz
V
V
IN = 12 V, VOUT = 5.5 V
IN = 12 V, VOUT = 3.5 V
85
fSW = 2 MHz
80
75
70
0
0.5
1.0
1.5
2.0
(A)
2.5
3.0
0
0.5
1.0
1.5
2.0
(A)
2.5
3.0
LED Current, i
LED Current, i
LED
LED
Figure 3: Efficiency versus LED Current at various LED voltages
Operating conditions: fSW = 1 MHz
Figure 4: Efficiency versus LED Current at various switching
frequencies. Operating conditions: VIN = 12 V, VOUT = 5.5 V
1
0.1
0.01
0.001
V
V
V
= 24 V, load = 2× LED
= 12 V, load = 1× LED
= 12 V, load = 2× LED
IN
IN
IN
Ideal
0.1
1
10
100
PWM Dimming Duty Cycle (%)
Figure 5. Average LED Current versus PWM dimming percentage
Operating conditions: VIN = 12 or 24 V, VOUT = 3.7 V (1× LED) or 7 V (2× LED),
iLED = 1.5 A, RON = 73.2 kΩ, fSW = 1 MHz, L = 15 µH
Allegro MicroSystems, LLC
115 Northeast Cutoff
7
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
FUNCTIONAL DESCRIPTION
The A6217 is a buck regulator designed for driving a high-current
LED string. It uses average current mode control to maintain
constant LED current and consistent brightness. The LED current
level is easily programmable by selection of an external sense
resistor, with a value determined as follows:
Switching Frequency
The A6217 operates in fixed on-time mode during switching. The
on-time (and hence switching frequency) is programmed using
an external resistor connected between the VIN and TON pins, as
given by the following equations:
iLED = VCSREG / RSENSE
t
ON = k × (RON + RINT) × ( VOUT / VIN
SW = 1 / [ k × (RON + RINT)] + c
where k = 0.014 and c = 0.09, with fSWꢀinꢀMHz,ꢀtON in µs, and
ON and RINTꢀ(internalꢀresistance,ꢀ6ꢀkΩ)ꢀinꢀkΩꢀ(seeꢀfigureꢀ6).
)
where VCSREG = 0.2 V typical.
f
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
R
ToꢀminimizeꢀtheꢀpeaksꢀofꢀswitchingꢀfrequencyꢀharmonicsꢀinꢀEMCꢀ
measurement, a dithering feature is implemented. The dithering
range is internally set at ±5%. The actual switching frequency is
swept linearly between 0.95 × fSW and 1.05 × fSW, where fSW is
the programmed switching frequency. The rate of modulation for
f
SWꢀisꢀfixedꢀinternallyꢀatꢀ~11ꢀkHz.
Enable and Dimming
The IC is activated when a logic high signal is applied to the EN
(enable) pin. The buck converter ramps up the LED current to a
target level set by RSENSE.
When the EN pin is forced from high to low, the buck converter
is turned off, but the IC remains in standby mode for up to 12 ms.
If EN goes high again within this period, the LED current is
turned on immediately. Active dimming of the LED is achieved
by sending a PWM (pulse-width modulation) signal to the EN
pin. The resulting LED brightness is proportional to the duty cycle
(tON/Period) of the PWM signal. A practical range for PWM dim-
0
20 40 60 80 100 120 140 160 180 200 220 240 260 280 300 320
RON (kΩ)
Figure 6: Average Switching Frequency versus RON Resistance
(VIN = 12 V, VOUT = ~7 V, iLED = 1 A)
• During SW on-time:
V
SW
i
= [(V –V
) / L] × t = [(V –V
) / L] × t × D
OUT SW
RIPPLE
IN
OUT
ON
IN
where D = t / t
.
ON SW
V
IN
• During SW off-time:
i
= [(V –V ) / L] × t
= [(V
–V ) / L] × t × (1 – D)
OUT D SW
RIPPLE
OUT
D
OFF
Therefore (simplified equation for Output Voltage):
V
= V × D – V × (1 – D)
OUT
IN
D
If V << V
, then VOUT ≈ V × D.
IN
D
OUT
0
More precisely:
–V
D
V
=
(
V
– i × R ) × D – V × (1 – D) – R × i
DS(on) D L av
OUT
IN
av
t
Where R is the resistance fo the inductor.
L
i
A6217
VIN
L
i(max)
C
MOS
IN
i
V
RIPPLE
L
OUT
SW
D
i
av
i
L
i(min)
t
R
SENSE
t
t
OFF
ON
t
SW
Figure 7: Simplified Buck Controller Equations
Allegro MicroSystems, LLC
115 Northeast Cutoff
8
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
mingꢀfrequencyꢀisꢀbetweenꢀ100ꢀHzꢀ(Periodꢀ=ꢀ10ꢀms)ꢀandꢀ2ꢀkHz.ꢀ
Atꢀaꢀ200ꢀHzꢀPWMꢀfrequency,ꢀtheꢀdimmingꢀdutyꢀcycleꢀcanꢀbeꢀ
varied from 100% down to 1% or lower.
Output Voltage and Duty Cycle
Figure 7 provides simplified equations for approximating output
voltage. Essentially, the output voltage of a buck converter is
approximately given as:
If EN is low for more than 20 ms, the IC enters shutdown mode
to reduce power consumption. The next high signal on EN will
initializeꢀaꢀfullꢀstartupꢀsequence,ꢀwhichꢀincludesꢀaꢀstartupꢀdelayꢀ
of approximately 70 µs. This startup delay is not present during
PWM operation.
VOUT = VIN × D – VD1 × (1 – D) ≈ VIN × D, if VD1<< VOUT
D = tON / (tON + tOFF
where D is the duty cycle, and VD1 is the forward drop of the
Schottky diode D1 (typically under 0.5 V).
)
Minimum and Maximum Output Voltages
The EN pin is high-voltage tolerant and can be directly connected
toꢀaꢀpowerꢀsupply.ꢀHowever,ꢀifꢀENꢀisꢀhigherꢀthanꢀtheꢀVIN voltage
atꢀanyꢀtime,ꢀaꢀseriesꢀresistorꢀ(1ꢀkΩ)ꢀisꢀrequiredꢀtoꢀlimitꢀtheꢀcurrentꢀ
flowing into the EN pin. This series resistor is not necessary if
EN is driven from a logic input.
For a given input voltage, the maximum output voltage depends
on the switching frequency and minimum tOFF . For example, if
tOFF(min) = 150 ns and fSW =ꢀ1ꢀMHz,ꢀthenꢀtheꢀmaximumꢀdutyꢀ
cycle is 85%. So for a 24 V input, the maximum output is 20.3 V.
This means up to 6 LEDs can be operated in series, assuming
Vf = 3.3 V or less for each LED.
PWM Dimming Ratio
The brightness of the LED string can be reduced by adjusting the
PWM duty cycle at the EN pin as follows:
The minimum output voltage depends on minimum tON and
switching frequency. For example, if the minimum tON = 100 ns
and fSW =ꢀ1ꢀMHz,ꢀthenꢀtheꢀminimumꢀdutyꢀcycleꢀisꢀ10%.ꢀThatꢀ
means with VIN = 24 V, the minimum VOUT = 2.4 V (one LED).
Dimming ratio = PWM on-time / PWM period
Forꢀexample,ꢀbyꢀselectingꢀaꢀPWMꢀperiodꢀofꢀ5ꢀmsꢀ(200ꢀHzꢀPWMꢀ
frequency) and a PWM on-time of 50 µs, a dimming ratio of 1%
can be achieved.
To a lesser degree, the output voltage is also affected by other
factors such as LED current, on-resistance of the high-side
switch, DCR of the inductor, and forward drop of the low-side
diode. The more precise equation is shown in figure 7.
In an actual application, the minimum dimming ratio is deter-
mined by various system parameters, including: VIN, VOUT
inductance, LED current, switching frequency, and PWM
frequency. As a general guideline, the minimum PWM on-time
should be kept at 50 µs or longer. A shorter PWM on-time is
acceptable under more favorable operating conditions.
,
As a general rule, switching at lower frequencies allows a wider
range of VOUT, and hence more flexible LED configurations.
This is shown in figure 8.
Figure 9 shows how the minimum and maximum output volt-
16
14
12
10
9
8
7
6
5
V
V
(MAX) (V)
(MIN) (V)
OUT
OUT
V
V
(max) (V)
(min) (V)
OUT
OUT
8
6
4
2
0
4
3
2
1
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
iLED (A)
Frequency (MHz)
Figure 8: Minimum and Maximum Output Voltage versus
Switching Frequency (VIN = 16 V, iLED = 1 A, minimum tON
100 ns and tOFF = 150 ns)
Figure 9: Minimum and Maximum Output Voltage versus iLED
current (VIN = 9 V, fSW = 1 MHz, minimum tON = 100 ns and tOFF
150 ns)
=
=
Allegro MicroSystems, LLC
115 Northeast Cutoff
9
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
ages vary with LED current (assuming RDS(on)ꢀ=ꢀ0.4ꢀΩ,ꢀinductorꢀ
DCRꢀ=ꢀ0.1ꢀΩ,ꢀandꢀdiodeꢀVf = 0.6 V).
VOUT
If the required output voltage is lower than that permitted by the
C1
minimum tON , the controller will automatically extend the tOFF
in order to maintain the correct duty cycle. This means that the
switching frequency will drop lower when necessary, while the
LED current is kept in regulation at all times.
,
A6217 tripped SW_ILIM at ~4.2 A
Fault Handling
The A6217 is designed to handle the following faults:
• Pin-to-ground short
Cooldown
period
~ 360 µs
i_LED
Sense Resistor
shorted during
normal operation
• Pin-to-neighboring pin short
• Pin open
• External component open or short
•ꢀOutputꢀshortꢀtoꢀGND
C2
t
Figure 10: A6217 during fault condition where the sense resistor
or CS pin is shorted to GND. Ch1 = VOUT (5 V/div),
Ch2 = i_LED (500 mA/div), t = 200 µs/div.
The waveform in Figure 10 illustrates how the A6217 responds
in the case in which the current sense resistor or the CS pin is
shortedꢀtoꢀGND.ꢀNoteꢀthatꢀtheꢀSWꢀpinꢀovercurrentꢀprotectionꢀisꢀ
tripped at around 4.2 A, and the part shuts down immediately.
The part then goes through startup retry after approximately
360 µs of cool-down period.
VEN
C1
Negative voltage
developed at SW pin
during off-time
VSW
C2
C3
VOUT
iLED
C4
t
Figure 11: Startup waveform with a missing Schottky diode; shows
Enable, VEN (ch1, 5 V/div.), switch node, VSW (ch2, 5 V/div.),
output voltage, VOUT (ch3, 5 V/div.), LED current,
iLED (ch4, 500 mA/div.), t = 100 µs/div.
Allegro MicroSystems, LLC
115 Northeast Cutoff
10
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
As another example, the waveform in Figure 11 shows the fault
case where external Schottky diode D1 is missing or open. As
LED current builds up, a larger-than-normal negative voltage is
developed at the SW node during off-time. This voltage trips the
missing Schottky detection function of the IC. The IC then shuts
down immediately, and waits for a cool-down period before retry.
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
L = 10 µH
L = 15 µH
L = 22 µH
L = 33 µH
L = 47 µH
Component Selections
The inductor is often the most critical component in a buck con-
verter. Follow the procedure below to derive the correct param-
eters for the inductor:
1. Determine the saturation current of the inductor. This can be
done by simply adding 20% to the average LED current:
0
0.5
1
1.5
2
LED Current (A)
iSAT ≥ iLED × 1.2.
Figure 12: Inductance selection based on iLED and fSW
VIN = 12 V, VOUT = 6 V, ripple current = 20%
;
2. Determinetheripplecurrentamplitude(peak-to-peakvalue).As
a general rule, ripple current should be kept between 10% and
30% of the average LED current:
0.1 < iRIPPLE(pk-pk) / iLED < 0.3.
3. Calculate the inductance based on the following equations:
L = (VIN – VOUT) × D × t / iRIPPLE , and
D = (VOUT + VD1) / (VIN + VD1 ) ,
VD1 is the forward voltage drop of the Schottky diode
D1 (see figure 7).
where
Inductor Selection Chart
TheꢀchartꢀinꢀFigureꢀ12ꢀsummarizesꢀtheꢀrelationshipꢀbetweenꢀ
LED current, switching frequency, and inductor value. Based on
D is the duty cycle,
t is the period 1/fSW, and
V
V
IN
IN
L1
L1
LED+
LED+
i
RIPPLE
i
RIPPLE
SW
D1
SW
D1
C1
CS
CS
LED–
LED–
V
V
RIPPLE
RIPPLE
R
R
SENSE
SENSE
Without output capacitor:
With a small capacitor across LED string:
Ripple current through LED string is proportional to ripple voltage
at CS pin.
Ripple current through LED string is reduced, while ripple voltage
at CS pin remains high.
Figure 13. Ripple current and voltage, with and without shunt capacitor
Allegro MicroSystems, LLC
115 Northeast Cutoff
11
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
this chart: Assuming LED current = 1 A and fSW =1ꢀMHz,ꢀthenꢀ
theꢀminimumꢀinductanceꢀrequiredꢀisꢀLꢀ=ꢀ22ꢀµHꢀinꢀorderꢀtoꢀkeepꢀ
the ripple current at 30% or lower. (Note: VOUT = VIN / 2 is the
• If lower ripple current is required for the LED string, one solu-
tion is to add a small capacitor (such as 2.2 µF) across the LED
string from LED+ to LED–. In this case, the inductor ripple cur-
worst case for ripple current). If the switching frequency is lower, rent remains high while the LED ripple current is greatly reduced.
then either a larger inductance must be used, or the ripple current
requirement has to be relaxed.
Output Filter Capacitor
The A6217 is designed to operate without an output filter capaci-
Additional Notes on Ripple Current
tor, in order to save cost. Adding a large output capacitor is not
recommended.
• For consistent switching frequency, it is recommended to
choose the inductor and switching frequency to ensure the induc-
tor ripple current percentage is at least 10% over normal operat-
ing voltage range (ripple current is lowest at lowest VIN).
In some applications, it may be required to add a small filter
capacitor (up to several µF) across the LED string (between
LED+ and LED–) to reduce output ripple voltage and current. It
is important to note that:
If ripple current is less than 10%, the switching frequency may
jitterꢀdueꢀtoꢀinsufficientꢀrippleꢀvoltageꢀatꢀCSꢀpin.ꢀHowever,ꢀtheꢀ
average LED current is still regulated.
• The effectiveness of this filter capacitor depends on many fac-
tors, such as: switching frequency, inductors used, PCB layout,
LED voltage and current, and so forth.
• There is no hard limit on the highest ripple current percentage
allowed. A 60% ripple current is still acceptable, as long as both
the inductor and LEDs can handle the peak current (average cur-
rentꢀ×ꢀ1.3ꢀinꢀthisꢀcase).ꢀHowever,ꢀcareꢀmustꢀbeꢀtakenꢀtoꢀensureꢀ
theꢀvalleyꢀofꢀtheꢀinductorꢀrippleꢀcurrentꢀneverꢀdropsꢀtoꢀzeroꢀatꢀtheꢀ
highest input voltage (which implies a 200% ripple current).
• The addition of this filter capacitor introduces a longer delay
in LED current during PWM dimming operation. Therefore the
maximum PWM dimming ratio is reduced.
• The filter capacitor should NOT be connected between LED+
andꢀGND.ꢀDoingꢀsoꢀmayꢀcreateꢀinstabilityꢀbecauseꢀtheꢀcontrolꢀ
loop must detect a certain amount of ripple current at the CS pin
for regulation.
• In general, allowing a higher ripple current percentage enables
lower-inductance inductors to be used, which results in smaller
sizeꢀandꢀlowerꢀcost.ꢀTheꢀonlyꢀdownsideꢀisꢀtheꢀcoreꢀlossꢀofꢀtheꢀ
inductor increases with larger ripple currents, but this is typically
a small factor.
VIN
VIN
VOUT
VOUT
iLED
C1,C2
C1,C2
iLED
C3
VEN
C3
VEN
C4
C4
t
t
Panel 14B: Operation with a 0.68 µF ceramic
capacitor connected across the LED string
Panel 14A: Operation without using any output
capacitor across the LED string
Figure 14: Waveforms showing the effects of adding a small filter capacitor across the LED string
• Operating conditions: at 200 Hz, VIN = 24 V, VOUT = 15 V, fSW = 500 kHz, L = 10 µH, duty cycle = 50%
• CH1 (Red) = VIN (10 V/div), CH2 (Blue) = VOUT (10 V/div),
CH3 (Green) = iLED (500 mA/div), CH4 (Yellow) = Enable (5 V/div), time scale = 1 ms/div
Allegro MicroSystems, LLC
115 Northeast Cutoff
12
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
Application Circuit
Suggested Components
The application circuit in Figure 15 shows a design for driving a
15 V LED string at 1.3 A (set by RSENSE). The switching fre-
quencyꢀisꢀ500ꢀkHz,ꢀasꢀsetꢀbyꢀR1.ꢀAꢀ0.68ꢀµFꢀceramicꢀcapacitorꢀisꢀ
added across the LED string to reduce the ripple current through
the LEDs (as shown in Figure 14B).
Symbol
C1
Part Number
EMZA500ADA470MF80G
UMK316BJ475KL-T
CGA5L2X5R1H684K160AA
NR8040T100M
Manufacturer
United Chemi-Con
Taiyo Yuden
TDK
C2
C3
L1
Taiyo Yuden
Diodes, Inc.
Susumu
D1
B250A-13-F
RSENSE
RL1632R-R150-F
V
= 24 to 48 V
C1
IN
L1
C2
4.7µF
50V
10 µH / 2 A
47 µF
50 V
LED+
GND
1, 2
3
9,10
8
C4
0.1 µF
A6217
(EJ)
VIN
SW
D1
60 V / 2 A
R1
TON
BOOT
GND
LED
169 kΩ
4
5
7
6
EN
C3
0.68 µF
50 V
string
EN
CS
( 15 V)
≈
PAD
VCC
C5
0.1 µF
LED–
R
SENSE
0.15 Ω
Figure 15: Application Circuit Diagram
• Figure 17 shows analog dimming of LED current by an exter-
nal DC voltage
Additional Application Circuits
The following are some application examples to expand the capa-
bility of the A6217:
• Figure 18 shows thermal de-rating of LED current by an NTC
resistor
• Figure 16 shows PWM dimming of LED current by pulsing the
power supply line
VBAT
VIN
LED+
A6217 (EJ)
GND
1, 2
3
9,10
VIN
TON
EN
SW
BOOT
GND
8
7
6
LED
String
(~6 V)
4
10 kΩ
5
12 V
1 A
CS
VCC
VBAT
0
LED–
RSENSE
VBAT pulsed on/off at 200 Hz, with duty cycle
between 1 % and 99%
LED
Current
0.2 Ω
0
Figure 16: PWM Dimming of LED Current by Using Pulsed Power Supply Line
Allegro MicroSystems, LLC
115 Northeast Cutoff
13
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
VIN = 12 V
iLED
:
L1
47 µH 2 A
C2
4.7 µF
50 V
C1
47 µF
50 V
1.04 A to 0 A
LED+
A6217 (EJ)
GND
EN
1, 2
3
9,10
C4
0.1 µF
VIN
SW
BOOT
GND
R1
D1
60 V 2 A
8
7
6
TON
EN
LED
String
(~6 V)
200 kΩ
4
C3
open
5
V
CS = 0.2 V
CS
VCC
C5
0.1 µF
Analog Dimming
Voltage: 0 to 5.2 V
25 kΩ
iADIM
LED–
1 kΩ
ADIM
VSENSE
0.22 V to 0 V
:
RSENSE
0.2 Ω
iLED
100%
iLED = (0.2 V – iADIM × 1000)/RSENSE
iADIM = (VADIM – 0.2)/25 k
ADIM
0
0.2 V
5.2 V
Figure 17: Analog Dimming of LED Current with an External DC Voltage
0.9 A @ 25ºC
0.52 A @ 100ºC
L1
47 µH 2 A
C2
4.7 µF
50 V
C1
47 µF
50 V
LED+
A6217 (EJ)
GND
1, 2
3
9,10
C4
VIN
SW
BOOT
GND
0.1 µF
R1
D1
8
7
6
TON
EN
60 V 2 A
LED
String
(~6 V)
200 kΩ
4
C3
open
5
V
CS = 0.2 V
CS
VCC
NTC:
220 k @ 25ºC
22 k @ 100ºC
C5
0.1 µF
30 kΩ
1 kΩ
LED–
VCC = 5.2 V
VSENSE
:
RSENSE
0.2 Ω
iADIM
:
0.18 V @ 25ºC
0.104 V @ 100ºC
0.02 mA @ 25ºC
0.096 mA @ 100ºC
i
LED = (0.2 V – iADIM × 1000)/RSENSE
iADIM = (VCC – 0.2)/(RNTC + 30 k)
Figure 18: Thermal Foldback of LED Current Using NTC Resistor
Allegro MicroSystems, LLC
115 Northeast Cutoff
14
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
this high instantaneous current. C1 (electrolytic capacitor) should
not be too far off C2. Therefore, the loop from the ceramic input
capacitor through the upper FET and asynchronous diode to
groundꢀshouldꢀbeꢀminimized.ꢀIdeallyꢀthisꢀconnectionꢀisꢀmadeꢀonꢀ
both the top (component) layer and via the ground plane.
Component Placement and PCB Layout Guidelines
PCB layout is critical in designing any switching regulator. A
good layout reduces emitted noise from the switching device,
and ensures better thermal performance and higher efficiency.
The following guidelines help to obtain a high quality PCB
layout. Figure 19 shows an example for components placement.
Figure 20 shows the three critical current loops that should be
minimizedꢀandꢀconnectedꢀbyꢀrelativelyꢀwideꢀtraces.
4) The voltage on the SW node (pin 8) transitions from 0 V to
V
IN very quickly and may cause noise issues. It is best to place
the asynchronous diode and output inductor close to the A6217 to
minimizeꢀtheꢀsizeꢀofꢀtheꢀSWꢀpolygon.
1) When the upper FET (integrated inside the A6217) is on, cur-
rent flows from the input supply/capacitors, through the upper
FET, into the load via the output inductor, and back to ground as
shown in loop 1. This loop should have relatively wide traces.
Ideally this connection is made on both the top (component) layer
and via the ground plane.
Keep sensitive analog signals (CS, and R1 of switching fre-
quency setting) away from the SW polygon.
6) For accurate current sensing, the LED current sense resistor
RSENSE should be placed close to the IC.
7) Place the bootstrap capacitor C4 near the BOOT node (pin 7)
and keep the routing to this capacitor short.
2) When the upper FET is off, free-wheeling current flows from
ground through the asynchronous diode D1, into the load via the
output inductor, and back to ground as shown in loop 2. This loop
shouldꢀalsoꢀbeꢀminimizedꢀandꢀhaveꢀrelativelyꢀwideꢀtraces.ꢀIdeallyꢀ
this connection is made on both the top (component) layer and
via the ground plane.
8) When routing the input and output capacitors (C1, C2, and C3
if used), use multiple vias to the ground plane and place the vias
as close as possible to the A6217 pads.
9)ꢀToꢀminimizeꢀPCBꢀlossesꢀandꢀimproveꢀsystemꢀefficiency,ꢀtheꢀ
input (VIN) and output (VOUT) traces should be wide and dupli-
cated on multiple layers, if possible.
3) The highest di/dt occurs at the instant the upper FET turns on
and the asynchronous diode D1 undergoes reverse recovery as
shown in loop 3. The ceramic input capacitors C2 must deliver
Loop 1
Loop 2
Loop 3
L1
SW
LED
C
V
IN
C
OUT
D1
IN
Figure 19: Example layout for the A6217 evaluation board
(package LJ)
Figure 20: Three different current loops in a buck converter
Allegro MicroSystems, LLC
115 Northeast Cutoff
15
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
10) Connection to the LED array should be kept short. Exces-
sively long wires can cause ringing or oscillation. When the LED
array is separated from the converter board and an output capaci-
tor is used, the capacitor should be placed on the converter board
to reduce the effect of stray inductance from long wires.
Optimizing Thermal Layout
The features of the printed circuit board, including heat conduc-
tion and adjacent thermal sources such as other components,
have a very significant effect on the thermal performance of the
device.ꢀToꢀoptimizeꢀthermalꢀperformance,ꢀtheꢀfollowingꢀshouldꢀ
be taken into account:
Thermal Dissipation
The amount of heat that can pass from the silicon of the A6217
to the surrounding ambient environment depends on the thermal
resistance of the structures connected to the A6217. The thermal
resistance, RθJAꢀ, is a measure of the temperature rise created by
power dissipation and is usually measured in degrees Celsius per
watt (°C/W).
• The device exposed thermal pad should be connected to as
much copper area as is available.
• Copper thickness should be as high as possible (for example,
2ꢀoz.ꢀorꢀgreaterꢀforꢀhigherꢀpowerꢀapplications).
• The greater the quantity of thermal vias, the better the dissipa-
tion. If the expense of vias is a concern, studies have shown
that concentrating the vias directly under the device in a tight
pattern, as shown in Figure 21, has the greatest effect.
Theꢀtemperatureꢀrise,ꢀΔT,ꢀisꢀcalculatedꢀfromꢀtheꢀpowerꢀdissipated,ꢀ
PD, and the thermal resistance, RθJAꢀ, as:
ꢀ
ꢀ
ΔT = PD × RθJAꢀ
• Additional exposed copper area on the opposite side of the
board should be connected by means of the thermal vias. The
copper should cover as much area as possible.
A thermal resistance from silicon to ambient, RθJAꢀ, of approxi-
mately 35°C/W (LJ package) or 45°C/W (EJ package) can be
achieved by mounting the A6217 on a standard FR4 double-sided
printed circuit board (PCB) with a copper area of a few square
inches on each side of the board under the A6217. Additional
improvementsꢀinꢀtheꢀrangeꢀofꢀ20%ꢀmayꢀbeꢀachievedꢀbyꢀoptimiz-
ing the PCB design.
• Other thermal sources should be placed as remote from the
device as possible
• Place as many vias as possible to the ground plane around the
anode of the asynchronous diode.
Signal traces
LJ package
footprint
LJ package
exposed
thermal pad
0.7 mm
0.7 mm
Top-layer
exposed copper
Ø0.3 mm via
Figure 21: Suggested PCB layout for thermal optimization (maximum
available bottom-layer copper recommended)
Allegro MicroSystems, LLC
115 Northeast Cutoff
16
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
PACKAGE OUTLINE DRAWINGS
For Reference Only – Not for Tooling Use
(Reference JEDEC MO-229)
Dimensions in millimeters – NOT TO SCALE
Exact case and lead configuration at supplier discretion within limits shown
0.30
0.85
0.50
3.00 0.05
10
10
3.00 0.05
3.10
1.64
A
1
2
1
DETAIL A
0.75 0.05
2.38
C
D
10X
0.05
C
C PCB Layout Reference View
SEATING
PLANE
0.25 0.05
0.40 0.10
0.05
0.00
0.5 BSC
0.40 0.10
0.203 REF
0.08 REF
1
2
0.05 REF
1.65 0.10
Detail A
B
0.05 REF
Terminal #1 mark area
A
B
C
Exposed thermal pad (reference only, terminal #1 identifier appearance at supplier discretion)
10
Reference land pattern layout (reference IPC7351 SON50P300X300X80-11WEED3M);
all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary to meet
application process requirements and PCB layout tolerances; when mounting on a
multilayer PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
2.38 0.10
Coplanarity includes exposed thermal pad and terminals
D
Package EJ, 10-Pin DFN
with Exposed Thermal Pad and Wettable Flank
Allegro MicroSystems, LLC
115 Northeast Cutoff
17
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
4.90 0.10
0.65
8°
0°
1.27
8
8
1.75
0.25
0.17
B
3.90 0.10 6.00 0.20
2.41
5.60
2.41 NOM
1.04 REF
A
1
2
1.27
0.40
2
1
3.30 NOM
3.30
PCB Layout Reference View
0.25 BSC
C
SEATING PLANE
GAUGE PLANE
Branded Face
8X
C
SSEEAATTIINNGG
PPLLAANNEE
0.10
C
For Reference Only; not for tooling use (reference MS-012BA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
1.70 MAX
0.51
0.31
0.15
0.00
A
B
C
Terminal #1 mark area
1.27 BSC
Exposed thermal pad (bottom surface); dimensions may vary with device
Reference land pattern layout (reference IPC7351 SOIC127P600X175-9AM);
all pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary
to meet application process requirements and PCB layout tolerances; when
mounting on a multilayer PCB, thermal vias at the exposed thermal pad land
can improve thermal dissipation (reference EIA/JEDEC Standard JESD51-5)
Package LJ, 8-Pin SOICN
with Exposed Thermal Pad
Allegro MicroSystems, LLC
115 Northeast Cutoff
18
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217 and
A6217-1
Automotive-Grade, Constant-Current
PWM Dimmable Buck Regulator LED Driver
Revision History
Number
Date
Description
–
August 8, 2016
Initial release
Copyright ©2016, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
www.allegromicro.com
Allegro MicroSystems, LLC
115 Northeast Cutoff
19
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
A6217KLJTR-T 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| A6219DS | ALLEGRO | Dual Full-Bridge PWM Motor Driver | 获取价格 |
|
| A6225 | UTC | DUAL PRE-AMPLIFIER | 获取价格 |
|
| A6225-G09-T | UTC | DUAL PRE-AMPLIFIER | 获取价格 |
|
| A6225L-G09-T | UTC | DUAL PRE-AMPLIFIER | 获取价格 |
|
| A623308 | AMICC | 8K X 8 BIT CMOS SRAM | 获取价格 |
|
| A623308-70S | AMICC | SRAM | 获取价格 |
|
| A623308-70SF | AMICC | 暂无描述 | 获取价格 |
|
| A623308-70SI | AMICC | SRAM | 获取价格 |
|
| A623308-70SIF | AMICC | SRAM | 获取价格 |
|
| A623308-70SU | AMICC | SRAM | 获取价格 |
|
A6217KLJTR-T 相关文章
Bourns 密封通孔金属陶瓷微调电位计产品选型手册(英文版)
- 2024-09-20
- 5
Bourns 精密环境传感器产品选型手册(英文版)
- 2024-09-20
- 8
Bourns POWrTher 负温度系数(NTC)热敏电阻手册 (英文版)
- 2024-09-20
- 8
Bourns GMOV 混合过压保护组件产品选型手册(英文版)
- 2024-09-20
- 6
