HSDL-3203-011G [AGILENT]
Interface Circuit, BICMOS;
| 型号： | HSDL-3203-011G |
| 厂家： | 
AGILENT TECHNOLOGIES, LTD. |
| 描述： | Interface Circuit, BICMOS 信息通信管理 接口集成电路 |
| 文件： | 总19页 (文件大小：275K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Agilent HSDL-3203
Small Profile Package
IrDA® Data Compliant Low Power
115.2 kbit/s Infrared Transceiver
Data Sheet
Features
•
Fully compliant to IrDA 1.4 low
power specification from
9.6 kbit/s to 115.2 kbit/s
•
•
Low power operation at extended
link distance of 50 cm
Miniature package
— Height: 1.95 mm
— Width: 8.00 mm
— Depth: 3.10 mm
Description
Applications
•
•
•
Guaranteed temperature
performance, –20 to +70˚C
— Critical parameters are
guaranteed over temperature
and supply voltage
The HSDL-3203 is a miniature low
cost infrared transceiver module
that provides the interface between
logic and infrared (IR) signals for
through air, serial, half-duplex IR
data link. The module is compliant
to IrDA Physical Layer Specifica-
tions version 1.4 Low Power from
9.6 kbit/s to 115.2 kbit/s with
extended link distance and it is
IEC 825-Class 1 eye safe.
•
Mobile telecom
— Mobile phones
— Pagers
— Smart phone
Low power consumption
— Low shutdown current
(10 nA typical)
— Complete shutdown of TXD,
RXD, and PIN diode
•
•
•
Data communication
— PDAs
— Portable printers
Digital imaging
— Digital cameras
— Photo-imaging printers
Withstands > 100 mVp-p power
supply ripple typically
Electronic wallet, IrFM
The HSDL-3203 can be shutdown
completely to achieve very low
power consumption. In the shut-
down mode, the PIN diode will be
inactive and thus producing very
little photocurrent even under very
bright ambient light. Such features
are ideal for battery operated
handheld products.
•
•
•
•
VCC supply 2.7 to 3.6 volts
Integrated EMI shield
LED stuck-high protection
Designed to accommodate light
loss with cosmetic windows
•
IEC 825-Class 1 Eye Safe
Application Support Information
The Application Engineering
group in Agilent Technologies is
available to assist you with the
technical understanding associ-
ated with HSDL-3203 infrared
transceiver module. You can con-
tact them through your local
Agilent sales representative for
additional details.
Ordering Information
Part Number
Packaging Type
Tape and Reel
Strip
Package
Quantity
2500
HSDL-3203-021
HSDL-3203-011
Front View
Front View
10
30 Ω
LED A
TXD
8
7
V
V
CC
LED
DRIVER
V
6
5
4
CC
CC
C1
1.0 µF
RXD
GND
3
2
AGND
SD
V
RX PULSE
SHAPER
CC
CX
1
C2
100 nF
8
7
6
5
4
3
2
1
Figure 1. Functional block diagram of HSDL-3203.
Figure 2. Rear view diagram with pin-out.
2
I/O Pin Configuration Table
Pin
1
Symbol
CX
I/O
Description
Note
I
Pin bypass capacitor
Shutdown. Active high
Analog ground
2
SD
I
1
2
2
3
4
3
AGND
GND
RXD
I
4
I
Ground
5
O
I
Receiver data output. Active low
Supply voltage
6
V
CC
7
TXD
I
Transmitter data input. Active high
LED anode
5
6
7
8
LED A
Shield
I
–
–
EMI shield
Notes:
1. Complete shutdown TXD, RXD, and PIN diode.
2. Connect to system ground.
3. Output is active low pulse response when light pulse is seen.
4. Regulated, 2.7 to 3.6 volt.
5. Logic high turns on the LED. If held high longer than 50 µs, the LED is turned off
automatically. TXD must be driven either high or low. DO NOT leave the pin floating.
6. Tied through external resistor, R1, to regulate V from 2.7 to 3.6 volt.
CC
7. Connect to system ground via a low inductance trace. For best performance, do not connect
to GND directly at the part.
Recommended Application Circuit Components
Marking Information
The unit is marked with the
letters "A" and the datacode
"YWW" on the shield for front
options where Y is the last digit
of the year, and WW is the
workweek.
Component
Recommended Value
30 Ω, ± 1%, 0.125 Watt
5.6 Ω, ± 1%, 0.125 Watt
6.8 µF, ± 20%, Tantalum
100 nF, ± 20%, X7R Ceramic
Note
R1
8
R1
9
C1
10
C2
Notes:
8. To obtain I
9. To obtain I
of 50 mA for V
of 250 mA for V of 3 V.
of 3 V.
LED
LED
LED
LED
10.C1 must be placed within 0.7 cm of the HSDL-3203 to obtain optimum noise immunity.
Transceiver I/O Truth Table
Inputs
TXD
Outputs
Light Input to Receiver
Don't Care
High
SD
LED
On
RXD
Note
High
Low
Low
Low
High
Not Valid
Low
Low
Off
Off
Off
11, 12
Low
Low
High
Don't Care
Don't Care
High
Notes:
11.In-band IrDA signals and data rates ≤ 115.2 kbit/s.
12.RXD logic low is a pulsed response. The condition is maintained for a duration independent of pattern and strength of the incident intensity.
Caution: The BiCMOS inherent to the design of this component increases the component's susceptibility
to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in
handling and assembly of this component to prevent damage and/or degradation, which may be
induced by ESD.
3
Absolute Maximum Ratings
For implementation where case to ambient thermal resistance is ≤ 50˚C/W.
Parameter
Symbol
Min.
–40
Max.
100
85
Units
˚C
Conditions
Storage Temperature
Operating Temperature
DC LED Current
T
T
S
–25
˚C
A
I
I
(DC)
(PK)
20
mA
mA
LED
LED
Peak LED Current
250
≤ 90 µs Pulse Width
≤ 25% Duty Cycle
LED Anode Voltage
Supply Voltage
V
V
V
V
–0.5
0
7
7
V
V
V
V
LEDA
CC
I
Input Voltage TXD, SD
Output Voltage RXD
0
V
V
+ 0.5
+ 0.5
CC
–0.5
O
CC
Recommended Operating Conditions
Parameter
Symbol
Min.
–25
2.7
Max.
85
Units
Conditions
Note
Operating Temperature
Supply Voltage
T
˚C
A
V
CC
V
IH
V
IL
3.6
V
Logic High Voltage TXD, SD
Logic Low Voltage TXD, SD
Logic High Receiver Input Irradiance
Logic Low Receiver Input Irradiance
LED Current Pulse Amplitude
Receiver Signal Rate
2/3 V
0
V
CC
V
CC
1/3 V
500
0.3
V
CC
2
EI
EI
0.0081
mW/cm
For in-band signals 13
For in-band signals 13
Guaranteed at 25˚C
H
L
2
µW/cm
mA
I
50
250
LEDA
9.6
115.2
kbit/s
Note:
13.An in-band optical signal is a pulse/sequence where the peak wavelength, λp, is defined as 850 nm ≤ λp ≤ 900 nm, and the pulse characteristics
are compliant with the IrDA Serial Infrared Physical Layer Link Specification.
4
t
pw
V
OH
90%
50%
10%
V
OL
t
t
r
f
Figure 3. RXD output waveform.
t
pw
LED ON
90%
50%
10%
LED OFF
t
t
f
r
Figure 4. LED optical waveform.
TXD
LED
t
pw (MAX.)
Figure 5. TXD ‘Stuck On’ protection waveform.
SD
SD
RX
LIGHT
TXD
TX
LIGHT
RXD
t
t
TW
RW
Figure 6. Receiver wakeup time waveform.
Figure 7. TXD wakeup time waveform.
5
Electrical and Optical Specifications
Specifications hold over the recommended operating conditions unless otherwise noted. Unspecified test conditions
can be anywhere in their operating range. All typical values are at 25˚C and 3.0 V unless otherwise noted.
Parameter
Symbol Min.
Typ. Max. Units
Conditions
Note
Receiver
RXD Output Voltage Logic Low
Logic High
V
V
0
0.4
V
V
I
I
= 200 µA, for in-band EI
14
OL
OL
V
–0.2
V
CC
= 200 µA, for in-band
OH
CC
OH
2
EI ≤ 0.3 µW/cm
Viewing Angle
2φ
1/2
30
˚
2
Logic High Receiver Input
Irradiance
EI
0.0036
500
0.3
mW/cm For in-band signals ≤ 115.2 kbit/s 13
H
2
Logic Low Receiver Input
Irradiance
EI
µW/cm For in-band signals
13
L
Peak Sensitivity Wavelength
RXD Pulse Width
λp
880
2.5 4.0
nm
tpw
1.5
µs
14
RXD Rise and Fall Times
Receiver Latency Time
Receiver Wake Up Time
Transmitter
t , t
25
25
50
100
50
ns
µs
µs
tpw(EI) = 1.6 µs, C = 10 pF
L
r
f
t
t
14
15
L
100
W
Radiant Intensity
EI
4
8
28.8 mW/sr
mW/sr
I
θ
= 50 mA, T = 25˚C,
LEDA A
H
≤ 15˚
1/2
22.5
I
= 250 mA, T = 25˚C,
LEDA A
θ
≤ 15˚
1/2
Peak Wavelength
λp
875
35
nm
nm
Spectral Line Half Width
Viewing Angle
∆λ
1/2
2θ
30
60
2
˚
1/2
Optical Pulse Width
Optical Rise and Fall Times
tpw
1.5
1.6
20
µs
ns
tpw(TXD) = 1.6 µs
tpw(TXD) = 1.6 µs
tr (EI)
tf (EI)
600
Maximum Optical Pulse Width
LED Anode ON State Voltage
LED Anode OFF State Leakage
Transceiver
tpw
(max)
50
µs
V
TXD pin stuck high
V
ON
1.5
I
V
= 50 mA,
LEDA
(LEDA)
(TXD) = 2.7 V
IH
I
0.01 1.0
µA
V = V = 3.6 V,
LEDA CC
LK
(LEDA)
V (TXD) ≤ 1/3 V
I CC
TXD and SD Input
Currents
Logic Low
Logic High
Shutdown
Idle
I
I
I
I
–1
–0.01 1
µA
µA
nA
mA
0 ≤ V ≤ 1/3 V
I CC
L
0.01
10
1
V ≥ 2/3 V
I CC
H
Supply Current
200
4
V
V
= 3.6 V, V ≥ V –0.5
SD CC
CCI
CC2
CC
2.5
= 3.6 V, V (TXD) ≤ 1/3 V ,
I CC
CC
EI = 0
= 3.6 V, V (TXD)≤ 1/3 V
CC
Active
Receiver
I
2.6
5
mA
V
16
CC3
CC
I
Notes:
2
2
14. For in-band signals ≤ 115.2 kbit/s where 8.1 µW/cm ≤ EI ≤ 500 mW/cm .
15. Wake up time is measured from SD pin HIGH to LOW transition or V power ON to valid RXD output.
CC
2
2
16. Typical value is at EI = 10 mW/cm , maximum value is at EI = 500 mW/cm .
6
RADIANT INTENSITY vs ILED_A,
TEMPERATURE = 25°C
VLED_A vs ILED_A,
TEMPERATURE = 25°C
40
35
30
25
20
15
2.2
2.0
1.8
1.6
1.4
1.2
10
5
0
1.0
000.0E+0
000.0E+0
100.0E-3
200.0E-3
300.0E-3
100.0E-3
200.0E-3
300.0E-3
ILED_A (A)
ILED_A (A)
Figure 8. LOP vs. ILED.
Figure 9. VLED vs. LED current.
Package Outline with Dimensions
MOUNTING
CENTER
4.0
1.025
C
L
2.05
RECEIVER
EMITTER
1.95
0.96
0.35
0.65
0.80
2.85
COPLANARITY:
± 0.1 mm
2.55
4.0
8.0
C
L
3.1
3.0
1.85
8
7
6
5
4
3
2
1
UNIT: mm
0.6
TOLERANCE: ± 0.2mm
3.325
P0.95 x 7 = 6.65
1 CX
5 RXD
2 SD
6 V
CC
3 AGND
4 GND
7 TXD
8 LEDA
Figure 10. Package outline dimensions.
7
Tape and Reel Dimensions
4.0 ± 0.1
+ 0.1
UNIT: mm
1.75 ± 0.1
1.5
1.5 ± 0.1
0
POLARITY
PIN 8: LED A
7.5 ± 0.1
16.0 ± 0.2
8.4 ± 0.1
3.4 ± 0.1
PIN 1: CX
0.4 ± 0.05
2.8 ± 0.1
8.0 ± 0.1
PROGRESSIVE DIRECTION
EMPTY
PARTS MOUNTED
LEADER
(400 mm MIN.)
(40 mm MIN.)
EMPTY
(40 mm MIN.)
OPTION # "B" "C" QUANTITY
001
021
178 60
330 80
500
2500
UNIT: mm
DETAIL A
2.0 ± 0.5
B
C
13.0 ± 0.5
R 1.0
LABEL
21 ± 0.8
DETAIL A
+ 2
0
16.4
2.0 ± 0.5
Figure 11. Tape and reel dimensions.
8
Moisture-Proof Packaging
All HSDL-3203 options are shipped in moisture-proof packaging. Once opened, moisture absorption begins.
UNITS IN A SEALED
MOISTURE-PROOF
PACKAGE
PACKAGE IS
OPENED (UNSEALED)
ENVIRONMENT
YES
LESS THAN 25°C,
AND LESS THAN
60% RH?
NO BAKING
IS NECESSARY
NO
PACKAGE IS
OPENED MORE
THAN 2 DAYS?
NO
YES
PERFORM RECOMMENDED
BAKING CONDITIONS
Figure 12. Baking conditions chart.
Baking Conditions
Recommended Storage Conditions
If the parts are not stored in dry
conditions, they must be baked
before reflow to prevent damage
to the parts.
Storage Temp.
Relative Humidity
10˚C to 30˚C
Below 60% RH
Time from Unsealing to Soldering
After removal from the bag, the
parts should be soldered within
two days if stored at the recom-
mended storage conditions. If
times longer than two days are
needed, the parts must be stored
in a dry box.
Packaging
In Reels
In Bulk
Temp.
60˚C
Time
≥ 48 hours
≥ 4 hours
≥ 2 hours
≥ 1 hour
100˚C
125˚C
150˚C
Baking should only be done once.
9
Reflow Profile
MAX. 245°C
R3 R4
230
200
183
170
R2
150
90 sec.
MAX.
ABOVE
183°C
125
100
R1
R5
50
25
0
50
100
150
200
250
300
t-TIME (SECONDS)
P1
HEAT
UP
P2
SOLDER PASTE DRY
P3
SOLDER
REFLOW
P4
COOL
DOWN
Figure 13. Reflow graph.
Process Zone
Heat Up
Symbol
P1, R1
P2, R2
∆T
Maximum ∆T/∆time
4˚C/s
25˚C to 125˚C
125˚C to 170˚C
Solder Paste Dry
Solder Reflow
0.5˚C/s
P3, R3
P3, R4
170˚C to 230˚C (245˚C at 10 seconds max.)
230˚C to 170˚C
4˚C/s
–4˚C/s
Cool Down
P4, R5
170˚C to 25˚C
–3˚C/s
The reflow profile is a straight
line representation of a nominal
temperature profile for a convec-
tive reflow solder process. The
temperature profile is divided
into four process zones, each
with different ∆T/∆time tempera-
ture change rates. The ∆T/∆time
rates are detailed in the above
table. The temperatures are
Process zone P2 should be of
sufficient time duration (> 60
seconds) to dry the solder paste.
The temperature is raised to a
level just below the liquidus point
of the solder, usually 170°C
(338°F).
metallic growth within the solder
connections becomes excessive,
resulting in the formation of weak
and unreliable connections. The
temperature is then rapidly
reduced to a point below the
solidus temperature of the solder,
usually 170°C (338°F), to allow
the solder within the connections
to freeze solid.
Process zone P3 is the solder
reflow zone. In zone P3, the tem-
perature is quickly raised above
the liquidus point of solder to
230°C (446°F) for optimum
measured at the component to
printed circuit board connections.
Process zone P4 is the cool down
after solder freeze. The cool
In process zone P1, the PC board
and HSDL-3203 castellation I/O
pins are heated to a temperature
of 125°C to activate the flux in
the solder paste. The temperature
ramp up rate, R1, is limited to
4°C per second to allow for even
heating of both the PC board and
HSDL-3203 castellation I/O pins.
results. The dwell time above the
liquidus point of solder should be
between 15 and 90 seconds. It
usually takes about 15 seconds to
assure proper coalescing of the
solder balls into liquid solder and
the formation of good solder
connections. Beyond a dwell
time of 90 seconds, the inter-
down rate, R5, from the liquidus
point of the solder to 25°C (77°F)
should not exceed –3°C per sec-
ond maximum. This limitation is
necessary to allow the PC board
and HSDL-3203 castellation I/O
pins to change dimensions
evenly, putting minimal stresses
on the HSDL-3203 transceiver.
10
Appendix A : SMT Assembly Application Note
1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
METAL STENCIL
FOR SOLDER PASTE
PRINTING
STENCIL
APERTURE
LAND
PATTERN
SOLDER
MASK
PCBA
Figure 14. Stencil and PCBA.
1.1 Recommended Land Pattern
C
L
SHIELD
SOLDER PAD
1.35
MOUNTING
CENTER
1.25
2.05
0.10
0.775
1.75
FIDUCIAL
0.60
0.475
1.425
UNIT: mm
2.375
3.325
Figure 15. Land pattern.
11
1.2 Recommended Metal Solder
Stencil Aperture
It is recommended that only a
0.152 mm (0.006 inches) or a
0.127 mm (0.005 inches) thick
stencil be used for solder paste
printing. This is to ensure ad-
equate printed solder paste vol-
ume and no shorting. See the
table below the drawing for com-
binations of metal stencil aper-
ture and metal stencil thickness
that should be used.
APERTURES AS PER
LAND DIMENSIONS
t
w
l
Aperture opening for shield pad
is 2.7 mm x 1.25 mm as per land
pattern.
Figure 16. Solder stencil aperture.
Stencil Thickness, t (mm)
Aperture Size (mm)
Length, l
Width, w
0.55 ± 0.05
0.55 ± 0.05
0.152 mm
0.127 mm
2.60 ± 0.05
3.00 ± 0.05
1.3 Adjacent Land Keepout and
Solder Mask Areas
8.2
Adjacent land keep-out is the
maximum space occupied by
the unit relative to the land pat-
tern. There should be no other
SMD components within this
area.
0.2
2.6
The minimum solder resist strip
width required to avoid solder
bridging adjacent pads is
0.2 mm. It is recommended that
two fiducial crosses be placed at
mid-length of the pads for unit
alignment.
SOLDER MASK
3.0
Note: Wet/Liquid Photo-
Imageable solder resist/mask is
recommended.
UNITS: mm
Figure 17. Adjacent land keep-out and solder mask areas.
12
COMPONENT SIDE
Appendix B: PCB Layout Suggestion
The following shows an example
of a PCB layout using option
#021 that would result in good
electrical and EMI performance.
Things to note:
1. The ground plane should be
continuous under the part, but
should not extend under the
shield trace.
C2
R1
C1
2. The shield trace is a wide, low
inductance trace back to the
system ground.
C3
3. The AGND pin is connected to
the ground plane and not to
the shield tab.
4. C1 and C3 are optional supply
filter capacitors; they may be
left out if a clean power sup-
ply is used.
CIRCUIT SIDE
5. VLED can be connected to
either unfiltered or unregu-
lated power supply. If VLED
and V share the same power
CC
supply and C1 is used, the
connection should be before
the C1 cap. In a noisy envi-
ronment, supply rejection can
be enhanced by including C3
as well.
Figure 18. PCB layout suggestions.
13
Appendix C: General Application
Guide for the HSDL-3203 Infrared IrDA®
Compliant 115.2 kb/s Transceiver
Selection of Resistor R1
Resistor R1 should be selected to
provide the appropriate peak
pulse LED current over different
Description
The HSDL-3203, a wide voltage
operating range infrared
ranges of V as shown in the
CC
table below.
transceiver, is a low-cost and
small form factor device that is
designed to address the mobile
computing market such as PDAs,
as well as small embedded mobile
products such as digital cameras
and cellular phones. It is fully
compliant to IrDA 1.4 low power
specification from 9.6 kb/s to
115.2 kb/s, and supports HP-SIR
and TV Remote modes. The
design of the HSDL-3203 also
includes the following unique
features:
Recommended
R1
V
Intensity
Minimum peak
pulse LED current
CC
30 Ω
3 V
3 V
8 mW/sr
50 mA
5.6 Ω
34 mW/sr 250 mA
Interface to Recommended I/O Chips
The HSDL-3203’s TXD data input
is buffered to allow for CMOS
drive levels. No peaking circuit or
capacitor is required.
Data rate from 9.6 kb/s up to
115.2 kb/s is available at the RXD
pin.
• Low passive component count.
• Shutdown mode for low power
consumption requirement.
The block diagram below shows
ow the IR port fits into a mobile
phone and PDA platform.
SPEAKER
AUDIO INTERFACE
DSP CORE
MICROPHONE
ASIC
CONTROLLER
RF INTERFACE
TRANSCEIVER
MOD/
DE-MODULATOR
IR
MICROCONTROLLER
USER INTERFACE
MOBILE PHONE PLATFORM
HSDL-3203
Figure 19. IR layout in mobile phone platform.
14
LCD
PANEL
RAM
ROM
IR
CPU
FOR EMBEDDED
APPLICATION
PCMCIA
CONTROLLER
TOUCH
PANEL
HSDL-3203
RS232C
COM
DRIVER
PORT
PDA PLATFORM
Figure 20. IR layout in PDA platform.
The link distance testing was
done using typical HSDL-3203
units with National
Semiconductor’s PC87109 3V
Super I/O controller and SMC’s
FDC37C669 and FDC37N769
Super I/O controllers. An IR link
distance of up to 100 cm was
demonstrated.
15
Appendix D: Optical port dimensions
for HSDL-3203:
from the HSDL-3203 to the back
of the window. The distance from
the center of the LED lens to the
center of the photodiode lens, K,
is 5.1 mm. The equations for
computing the window dimen-
sions are as follows:
the above equation. Z' is defined
as:
To ensure IrDA compliance, some
constraints on the height and
width of the window exist. The
minimum dimensions ensure that
the IrDA cone angles are met
without vignetting. The maximum
dimensions minimize the effects
of stray light. The minimum size
corresponds to a cone angle of
30˚ and the maximum size corre-
sponds to a cone angle of 60˚.
Z' = Z + t/n
where ‘t’ is the thickness of the
window and ‘n’ is the refractive
index of the window material.
X = K + 2*(Z + D)*tanA
Y = 2*(Z + D)*tanA
The depth of the LED image in-
side the HSDL-3203, D, is
The above equations assume that
the thickness of the window is
negligible compared to the dis-
tance of the module from the
back of the window (Z). If they
are comparable, Z' replaces Z in
3.17 mm. ‘A’ is the required half
angle for viewing. For IrDA com-
pliance, the minimum is 15˚ and
the maximum is 30˚. Assuming
the thickness of the window to be
negligible, the equations result in
the following tables and graphs.
In the figure below, X is the width
of the window, Y is the height of
the window, and Z is the distance
OPAQUE
IR TRANSPARENT WINDOW
MATERIAL
Z
X
K
IR TRANSPARENT
WINDOW
OPAQUE
MATERIAL
Z
A
D
16
Module Depth
Aperture Width (x, mm)
Aperture Height (y, mm)
(z) mm
Max.
8.76
Min.
6.80
Max.
3.66
Min.
1.70
2.33
2.77
3.31
3.84
4.38
4.91
5.45
5.99
6.52
0
1
2
3
4
5
6
7
8
9
9.92
7.33
4.82
11.07
12.22
13.38
14.53
15.69
16.84
18.00
19.15
7.87
5.97
8.41
7.12
8.94
8.28
9.48
9.43
10.01
10.55
11.09
11.62
10.59
11.74
12.90
14.05
APERTURE WIDTH (X) vs MODULE DEPTH
25
APERTURE HEIGHT (Y) vs MODULE DEPTH
16
14
12
10
8
20
15
10
6
4
X MAX.
X MIN.
5
Y MAX.
Y MIN.
2
0
0
0
1
2
3
4
5
6
7
8
9
0
1
2
3
4
5
6
7
8
9
MODULE DEPTH (Z) – mm
MODULE DEPTH (Z) – mm
17
Window Material
Shape of the Window
the radiation pattern is dependent
upon the material chosen for the
window, the radius of the front
and back curves, and the distance
from the back surface to the
transceiver. Once these items are
known, a lens design can be
made which will eliminate the
effect of the front surface curve.
Almost any plastic material will
work as a window material. Poly-
carbonate is recommended. The
surface finish of the plastic
should be smooth, without any
texture. An IR filter dye may be
used in the window to make it
look black to the eye, but the
total optical loss of the window
should be 10% or less for best
optical performance. Light loss
should be measured at 875 nm.
From an optics standpoint, the
window should be flat. This en-
sures that the window will not
alter either the radiation pattern
of the LED, or the receive pattern
of the photodiode.
If the window must be curved for
mechanical or industrial design
reasons, place the same curve on
the back side of the window that
has an identical radius as the
front side. While this will not
completely eliminate the lens
effect of the front curved surface,
it will significantly reduce the
effects. The amount of change in
The following drawings show the
effects of a curved window on the
radiation pattern. In all cases,
the center thickness of the win-
dow is 1.5 mm, the window is
made of polycarbonate plastic,
and the distance from the trans-
ceiver to the back surface of the
window is 3 mm.
The recommended plastic
materials for use as a cosmetic
window are available from
General Electric Plastics.
Recommended Plastic Materials:
Material
Number
Light
Transmission
Refractive
Index
Haze
1%
Lexan 141L
Lexan 920A
Lexan 940A
88%
85%
85%
1.586
1.586
1.586
1%
1%
Note: 920A and 940A are more flame retardant than 141L.
Recommended Dye: Violet #21051 (IR transmissant above
625 nm).
Flat Window
(First Choice)
Curved Front and Back
(Second Choice)
Curved Front, Flat Back
(Do Not Use)
18
www.agilent.com/semiconductors
For product information and a complete list of
distributors, please go to our web site.
For technical assistance call:
Americas/Canada: +1 (800) 235-0312 or
(408) 654-8675
Europe: +49 (0) 6441 92460
China: 10800 650 0017
Hong Kong: (+65) 6271 2451
India, Australia, New Zealand: (+65) 6271 2394
Japan: (+81 3) 3335-8152(Domestic/Interna-
tional), or 0120-61-1280(Domestic Only)
Korea: (+65) 6271 2194
Malaysia, Singapore: (+65) 6271 2054
Taiwan: (+65) 6271 2654
Data subject to change.
Copyright © 2002 Agilent Technologies, Inc.
May 3, 2002
5988-6237EN
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