HCPL-070L#500 [AGILENT]
Logic IC Output Optocoupler, 1-Element, 3750V Isolation, SO-8;型号: | HCPL-070L#500 |
厂家: | AGILENT TECHNOLOGIES, LTD. |
描述: | Logic IC Output Optocoupler, 1-Element, 3750V Isolation, SO-8 输出元件 光电 |
文件: | 总12页 (文件大小:94K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
AgilentHCPL-270L/070L/273L/073L
Low Input Current High Gain
LVTTL/LVCMOSCompatible
3.3 V Optocouplers
Data Sheet
Features
•
•
•
Low power consumption
High current transfer ratio
Low input current requirements –
0.5 mA
•
•
LVTTL/LVCMOS compatible output
darlington operation. A base
access terminal allows a gain
bandwidth adjustment to be
made.
Description
Performance guaranteed over
temperature0˚Cto+70˚C
These high gain series couplers use
a Light Emitting Diode and an
integrated high gain photodetector
to provide extremely high current
transfer ratio between input and
output. Separate pins for the
photodiode and output stage result
in LVTTL compatible saturation
voltages and high speed operation.
Where desired, the V and V
•
Base access allows gain
bandwidth adjustment
These optocouplers are for use in
LVTTL/LVCMOS or other low
power applications. A 400%
minimum current transfer ratio is
guaranteed over 0 to +70˚C
operating range for only 0.5 mA
of LED current.
•
•
High output current – 60 mA
Safetyapproval,UL,IEC/EN/DINEN
60747-5-2,CSA
CC
O
Applications
terminals may be tied together to
achieve conventional photo-
•
Ground isolate most logic
families – LVTTL/LVCMOS
•
•
•
•
•
Low input current line receiver
High voltage insulation
Functional Diagram
EIA RS-232C line receiver
Telephone ring detector
HCPL-270L/070L
HCPL-273L/073L
8
7
6
5
NC
ANODE
CATHODE
NC
1
2
3
4
V
V
V
V AC line voltage status
indicator – low input power
dissipation
CC
1
2
3
4
8
7
6
5
V
V
V
ANODE
CATHODE
CATHODE
ANODE
CC
O1
O2
1
1
2
2
B
•
Low power systems – ground
isolation
O
GND
GND
SHIELD
TRUTH TABLE
LED
V
O
ON
OFF
LOW
HIGH
A 0.1 µF bypass capacitor connected between pins 8 and 5 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent
damage and/or degradation which may be induced by ESD.
Ordering Information
The HCPL-070L and HCPL-073L
are surface mount devices
packaged in an industry standard
SOIC-8 footprint.
Specify Part Number followed by Option Number (if desired).
Example:
HCPL-270L#XXXX
The SOIC-8 does not require
"through holes" in a PCB. This
package occupies approximately
one-third the footprint area of the
standard dual-in-line package.
The lead profile is designed to be
compatible with standard surface
mount processes.
060=IEC/EN/DINEN60747-5-2Option
500 = Tape and Reel Packaging Option
XXXE = Lead Free Option
Option data sheets available. Contact your Agilent sales representative
or authorized distributor for information.
Remarks: The notation “#” is used for existing products, while (new)
products launched since 15th July 2001 and lead free option will use “-”
Selection Guide
8-Pin DIP (300 Mil)
Small Outline SO-8
Single Channel
Package HCPL-
Dual Channel
Package HCPL-
Single Channel
Package HCPL-
Dual Channel
Package HCPL-
Minimum Input
ONCurrent(I )
Minimum CTR
F
270L
273L
070L
073L
0.5 mA
400%
Schematic
I
I
CC
1
+
F1
V
CC
8
V
F1
V
CC
8
–
I
O1
V
2
O1
I
7
6
5
CC
I
F
2
+
I
3
ANODE
F2
–
I
O2
V
F
V
O2
V
F2
–
3
CATHODE
I
O
6
5
V
O
+
4
GND
GND
SHIELD
SHIELD
I
B
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED
7
V
B
HCPL-270L/HCPL-070L
HCPL-273L/HCPL-073L
2
Package Outline Drawings
8-Pin DIP Package
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
U R
UL
2
3
4
RECOGNITION
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5° TYP.
+ 0.003)
- 0.002)
3.56 ± 0.13
(0.140 ± 0.005)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
1.080 ± 0.320
0.65 (0.025) MAX.
(0.043 ± 0.013)
* MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
2.54 ± 0.25
(0.100 ± 0.010)
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
Small Outline SO-8 Package
LAND PATTERN RECOMMENDATION
TYPE NUMBER
(LAST 3 DIGITS)
OPTION 060 CODE
8
7
6
5
4
5.994 ± 0.203
(0.236 ± 0.008)
XXXV
YWW
3.937 ± 0.127
(0.155 ± 0.005)
7.49 (0.295)
DATE CODE
1
2
3
1.9 (0.075)
PIN ONE
0.406 ± 0.076
(0.016 ± 0.003)
1.270
(0.050)
BSC
0.64 (0.025)
0.432
45° X
*
7°
5.080 ± 0.127
(0.200 ± 0.005)
(0.017)
3.175 ± 0.127
(0.125 ± 0.005)
0 ~ 7°
0.228 ± 0.025
(0.009 ± 0.001)
1.524
(0.060)
0.203 ± 0.102
(0.008 ± 0.004)
TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
*
0.305
(0.012)
MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
OPTION NUMBER 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
3
Solder Reflow Temperature Profile
Regulatory Information
The devices contained in this
data sheet have been approved by
the following organizations:
300
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
PEAK
TEMP.
245°C
PEAK
TEMP.
240°C
PEAK
TEMP.
230°C
UL
200
100
0
Approval under UL 1577,
Component Recognition
Program, File E55361.
2.5°C ± 0.5°C/SEC.
SOLDERING
TIME
200°C
30
160°C
150°C
140°C
SEC.
30
SEC.
3°C + 1°C/–0.5°C
CSA
PREHEATING TIME
150°C, 90 + 30 SEC.
50 SEC.
Approval under CSA Component
Acceptance
Notice #5, File CA 88324.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
50
100
150
200
250
IEC/EN/DINEN60747-5-2
TIME (SECONDS)
Approved under
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884
Teil 2):2003-01
Recommended Pb-Free IR Profile
(Option 060 only)
TIME WITHIN 5 °C of ACTUAL
PEAKTEMPERATURE
t
p
20-40 SEC.
260 +0/-5 °C
T
T
p
217 °C
L
RAMP-UP
3 °C/SEC. MAX.
RAMP-DOWN
6 °C/SEC. MAX.
150 - 200 °C
T
smax
T
smin
t
s
t
L
60 to 150 SEC.
PREHEAT
60 to 180 SEC.
25
t 25 °C to PEAK
TIME
NOTES:
THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
= 200 °C, T = 150 °C
T
smax
smin
4
Insulation and Safety Related Specifications
8-Pin DIP
(300Mil)
Value
SO-8
Parameter
Symbol
Value Units Conditions
Minimum External Air
Gap (External Clearance)
L (101)
7.1
4.9
mm
mm
mm
Measured from input terminals to output
terminals, shortest distance through air.
Minimum External Tracking L (102)
(External Creepage)
7.4
4.8
Measured from input terminals to output
terminals, shortest distance path along body.
Minimum Internal Plastic
Gap (Internal Clearance)
0.08
0.08
Through insulation distance, conductor to
conductor, usually the direct distance
between the photoemitter and photodetector
inside the optocoupler cavity.
Tracking Resistance
(Comparative Tracking
Index)
CTI
200
IIIa
200
IIIa
Volts DIN IEC 112/VDE 0303 Part 1.
Isolation Group
Material Group (DIN VDE 0110, 1/89, Table 1).
IEC/EN/DINEN60747-5-2InsulationRelatedCharacteristics
Description
8-pin DIP
(300mil)
Symbol
SO-8
Units
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 150 V rms
I-IV
I-III
I-II
for rated mains voltage ≤ 300 V rms
for rated mains voltage ≤ 600 V rms
I-IV
I-III
Climatic Classification
55/100/21
55/100/21
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
2
2
V
V
630
566
V
V
IORM
PR
peak
peak
V
= 1.875 x V
, 100% Production Test with t = 1 sec,
1181
1063
PR
IORM
P
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
V
= 1.5 x V
, Type and Sample Test,
V
V
945
849
V
V
PR
IORM
PR
peak
peak
t = 60 sec, Partial Discharge < 5 pC
P
Highest Allowable Overvoltage*
6000
4000
IOTM
(Transient Overvoltage, t = 10 sec)
ini
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 11, Thermal Derating curve.)
Case Temperature
T
175
400
600
150
150
600
˚C
mA
mW
S
Current (Input Current I , P = 0)
I
F
S
S,INPUT
Output Power
Insulation Resistance at T , V = 500 V
P
S,OUTPUT
S
9
9
R
≥ 10
≥ 10
Ω
S
IO
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section, IEC/EN/DIN EN 60747-5-2, for a detailed
description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in application.
5
Absolute Maximum Ratings (No Derating Required up to +85˚C)
Parameter
Symbol
Min.
–55
Max.
125
85
Units
˚C
Storage Temperature
Operating Temperature
Average Forward Input Current
T
T
S
–40
˚C
A
I
I
20
mA
mA
F(AVG)
F(PEAK)
Peak Forward Input Current
40
(50% Duty Cycle, 1 ms Pulse Width)
Peak Transient Input Current
I
1.0
A
F(TRAN)
(< 1 µs Pulse Width, 300 pps)
Reverse Input Voltage
V
P
5
V
R
I
Input Power Dissipation
35
60
0.5
7
mW
mA
V
Output Current (Pin 6)
I
O
Emitter Base Reverse Voltage (Pin 5-7)
Supply Voltage and Output Voltage
Output Power Dissipation
V
V
P
P
EB
CC
O
–0.5
V
100
135
mW
mW
Total Power Dissipation
T
Lead Solder Temperature (for Through Hole Devices)
260˚C for 10 sec., 1.6 mm below seating plane.
See Package Outline Drawings section.
Reflow Temperature Profile
(for SOIC-8 and Option #300)
Recommended Operating Conditions
Parameter
Symbol
Min.
2.7
0.5
0
Max.
3.6
Units
V
Power Supply Voltage
Forward Input Current (ON)
Forward Input Voltage (OFF)
Operating Temperature
V
CC
I
12.0
0.8
mA
V
F(ON)
V
F(OFF)
A
T
0
70
˚C
6
Electrical Specifications
0˚C ≤ T ≤ +70˚C, 2.7 V ≤ V ≤ 3.3 V, 0.5 mA ≤ I
≤ 12 mA, 0 V ≤ V ≤ 0.8 V, unless otherwise specified. All
F(OFF)
A
CC
F(ON)
typicals at T = 25˚C. (See Note 8.)
A
Device
Parameter
Sym. HCPL-
Min. Typ.* Max. Units
Test Conditions
I = 0.5 mA
Fig. Note
Current Transfer CTR
Ratio
400 1300 5000
%
V
= 3.3 V
CC
1, 2
2
F
V = 0.4 V
O
Logic Low
V
OL
0.05 0.3
V
I = 1.6 mA,
F
V
= 3.3 V
CC
Output Voltage
I = 8 mA
O
0.05 0.4
V
I = 5.0 mA,
F
I = 15 mA
O
Logic High
Output Current
I
I
5
25
µA
mA
V = V = 3.3 V
I = 0 mA
F
2
OH
O
CC
Logic Low
Supply Current
270L/070L
0.4
1.3
V
V
= 3.3 V
I = I = 1.6 mA
F1 F2
CCL
CC
V
= V = Open
O1 O2
273L/073L
270L/070L
0.8
2.7
1
mA
Logic High
I
0.002
µA
= 3.3 V
I = I = 0 mA
F1 F2
CCH
CC
Supply Current
V
= V = Open
O1 O2
273L/073L
0.002
1.5
2
µA
Input Forward
Voltage
V
F
1.7
V
T = 25˚C
A
I = 1.6 mA
F
3, 4
Input Reverse
Breakdown
Voltage
BV
5.0
V
I = 10 µA, T = 25˚C
2
2
R
R
A
Input
C
60
pF
f = 1 MHz, V = 0
F
IN
Capacitance
*All typical values at T = 25˚C and V = 3.3 V, unless otherwise noted.
A
CC
7
Switching Specifications (AC)
Over Recommended Operating Conditions (T = 0˚C to +70˚C), V = 3.3 V, unless otherwise specified. (See Note 8.)
A
CC
Device
Parameter
Sym.
HCPL- Min. Typ.* Max.
Units Test Conditions
Fig.
Note
Propagation Delay
Time to Logic Low
at Output
t
30
µs
I = 0.5 mA, Rl = 4.7 kΩ
5
2
PHL
PLH
F
Propagation Delay
Time to Logic High
at Output
t
90
µs
I = 0.5 mA, R = 4.7 kΩ
5
6
2
F
L
Common Mode
Transient Immunity
at Logic High
|CM |
1000
1000
10000
10000
V/µs
I = 0 mA, T = 25˚C,
2, 6, 7
H
F
A
Rl = 2.2 kΩ
|V |=10V
CM
p-p
Level Output
Common Mode
Transient Immunity
at Logic Low
|CM |
V/µs
I = 1.6 mA, T = 25˚C,
6
2, 6, 7
L
F
A
Rl = 2.2 kΩ
|V |=10V
CM
p-p
Level Output
*All typical values at T = 25˚C and V = 3.3 V, unless otherwise noted.
A
CC
8
Package Characteristics
Parameter
Sym. Device HCPL- Min. Typ.* Max.
Units Test Conditions
Fig. Note
Input-Output
Momentary
Withstand
Voltage**
V
3750
V rms RH ≤ 50%,
4, 9
ISO
t = 1 min.,
T = 25˚C
A
12
Resistance
(Input-Output)
R
C
10
Ω
V
= 500 Vdc
I-O
4
I-O
I-O
RH ≤ 45%
Capacitance
(Input-Output)
0.6
pF
µA
f = 1 MHz
11
5
Input-Input
I
0.005
RH ≤ 45%
I-I
Insulation
V = 500 Vdc
I-I
Leakage Current
11
Input-Input
Insulation
Leakage Current
R
C
10
Ω
5
5
I-I
I-I
Capacitance
(Input-Input)
2730
2731
0.03
0.25
pF
0730
0731
*All typical values at T = 25˚C, unless otherwise noted.
A
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous
voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table (if applicable), your
equipment level safety specification or Agilent Application Note 1074 entitled "Optocoupler Input-Output Endurance Voltage."
Notes:
1. Pin 5 should be the most negative voltage at the detector side.
2. Each channel.
3. DC CURRENT TRANSFER RATIO (CTR) is defined as the ratio of output collector current, I , to the forward LED input current, I , times 100%.
O
F
4. Device considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together.
5. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
6. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dV /dt of the common mode pulse, V , to
CM
CM
assure that the output will remain in a Logic High state (i.e., V > 2.0 V). Common mode transient immunity in a Logic Low level is the
O
maximum tolerable (negative) dV /dt of the common mode pulse, V , to assure that the output will remain in a Logic Low state
CM
CM
(i.e., V < 0.8 V).
O
7. In applications where dV/dt may exceed 50,000 V/µs (such as static discharge) a series resistor, R , should be included to protect the
CC
detector IC from destructively high surge currents. The recommended value is R = 110 Ω.
CC
8. Use of a 0.1 µF bypass capacitor connected between pins 5 and 8 adjacent to the device is recommended.
9. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 4500 V rms for 1 second (leakage
detection current limit, I < 5 µA).
I-O
10. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage > 6000 V rms for 1 second (leakage
detection current limit, I < 5 µA).
I-O
11. Measured between the LED anode and cathode shorted together and pins 5 through 8 shorted together.
12. Derate linearly above 65˚C free-air temperature at a rate of 2.3 mW/˚C for the SO-8 package.
9
1000
100
10
85°C
I
F
2000
1600
1200
800
100
10
70°C
25°C
70°C
-40°C
+
V
–
F
T
= 85° C
A
T
= 85°C
A
A
1.0
T
= 70°C
1.0
0.1
T
= 70° C
= 25° C
= 0° C
A
A
A
A
T
T
T
T
T
T
= 25°C
= 0°C
A
A
A
V
V
O
= 3.3 V
= 0.4 V
CC
0.1
400
0
0.01
0.001
= -40° C
= -40°C
0.01
0.01
0.1
1.0
10
1.1
1.2
1.3
1.4
1.5
1.6
0.1
1
10
I
– FORWARD CURRENT – mA
I
– INPUT DIODE FORWARD CURRENT – mA
F
V
– FORWARD VOLTAGE – V
F
F
Figure 1. Current transfer ratio vs. forward
current.
Figure 2. Output current vs. input diode
forward current.
Figure 3. Input diode forward current vs.
forward voltage.
1.6
I
= 1.6 mA
F
1.5
1.4
1.3
1.2
-60 -40 -20
0
20 40 60 80 100
T
– TEMPERATURE – °C
A
Figure 4. Forward voltage vs. temperature.
1 0
I
F
I
PULSE
GEN.
F
0
8
7
6
5
3.3 V
1
2
3
4
Z
t
= 50 Ω
= 5 ns
O
r
3.3 V
V
O
R
L
10% DUTY CYCLE
I/f < 100 µs
(SATURATED
RESPONSE)
50%
50%
V
O
V
OL
0.1 µF
I
MONITOR
F
t
t
PHL
PLH
C
= 15 pF*
L
R
M
3.3 V
* INCLUDES PROBE AND
FIXTURE CAPACITANCE
V
O
90%
10%
90%
10%
(NON-SATURATED
RESPONSE)
t
f
t
r
Figure 5. Switching test circuit.
R
(SEE NOTE 6)
CC
I
F
t , t = 16 ns
8
7
6
5
1
2
3
4
+3.3 V
r
f
10 V
90% 90%
V
CM
B
A
0 V
10%
10%
R
L
t
r
t
f
V
O
V
3.3 V
O
V
FF
SWITCH AT A: I = 0 mA
F
V
V
O
V
CM
OL
+
–
SWITCH AT B: I = 1.6 mA
F
PULSE GEN.
Figure 6. Test circuit for transient immunity and typical waveforms.
1 1
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Data subject to change.
Copyright © 2004 Agilent Technologies, Inc.
Obsoletes 5989-0298EN
December 20, 2004
5989-2103EN
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