AFBR-5803Z [AGILENT]

FDDI, 100 Mb/s ATM, and Fast Ethernet Transceivers in Low Cost 1 x 9 Package Style; FDDI , 100 Mb / s的ATM ,并在低成本1 ×9封装形式快速以太网收发器
AFBR-5803Z
型号: AFBR-5803Z
厂家: AGILENT TECHNOLOGIES, LTD.    AGILENT TECHNOLOGIES, LTD.
描述:

FDDI, 100 Mb/s ATM, and Fast Ethernet Transceivers in Low Cost 1 x 9 Package Style
FDDI , 100 Mb / s的ATM ,并在低成本1 ×9封装形式快速以太网收发器

光纤 异步传输模式 放大器 PC 以太网 ATM 通信
文件: 总16页 (文件大小:288K)
中文:  中文翻译
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AFBR-5803Z/5803TZ/5803AZ/5803ATZ  
FDDI, 100 Mb/s ATM, and Fast Ethernet  
Transceivers in Low Cost 1 x 9 Package  
Style  
Data Sheet  
Features  
Full compliance with the optical  
performance requirements of the  
FDDI PMD standard  
Description  
Full compliance with the FDDI  
LCF-PMD standard  
The AFBR-5800Z family of  
transceivers from Agilent  
provide the system designer  
with products to implement a  
range of Fast Ethernet, FDDI  
and ATM (Asynchronous  
Transfer Mode) designs at the  
100 Mb/s-125 MBd rate.  
The AFBR-5803Z/5803TZ is  
useful for both ATM 100 Mb/s  
interfaces and Fast Ethernet  
100 Base-FX interfaces. The  
ATM Forum User-Network  
Interface (UNI) Standard,  
Full compliance with the optical  
performance requirements of the  
ATM 100 Mb/s physical layer  
Full compliance with the optical  
performance requirements of  
100 Base-FX version of IEEE 802.3u  
Multisourced 1 x 9 package style  
with choice of duplex SC or  
duplex ST* receptacle  
Wave solder and aqueous wash  
process compatible  
Single +3.3 V or +5 V power  
supply  
Version 3.0, defines the  
Physical Layer for 100 Mb/s  
Multimode Fiber Interface for  
ATM in Section 2.3 to be the  
FDDI PMD Standard. Likewise,  
the Fast Ethernet Alliance  
defines the Physical Layer for  
100 Base-FX for Fast Ethernet  
to be the FDDI PMD Standard.  
The transceivers are all  
supplied in the industry  
standard 1 x 9 SIP package  
style with either a duplex SC  
or a duplex ST* connector  
interface.  
RoHS Compliance  
FDDI PMD, ATM and Fast Ethernet  
2 km Backbone Links  
ATM applications for physical  
layers other than 100 Mb/s  
Multimode Fiber Interface are  
supported by Agilent. Products  
are available for both the  
single mode and the multi-  
mode fiber SONET OC-3c  
(STS-3c) ATM interfaces and  
the 155 Mb/s-194 MBd multi-  
mode fiber ATM interface as  
specified in the ATM Forum  
UNI.  
Applications  
The AFBR-5803Z/5803TZ are  
1300 nm products with optical  
performance compliant with  
the FDDI PMD standard. The  
FDDI PMD standard is ISO/IEC  
9314-3:  
Multimode fiber backbone links  
Multimode fiber wiring closet to  
desktop links  
Very low cost multimode fiber  
links from wiring closet to  
desktop  
1990 and ANSI X3.166 - 1990.  
Multimode fiber media converters  
These transceivers for 2 km  
multimode fiber backbones are  
supplied in the small 1 x 9  
duplex SC or ST package style.  
*ST is a registered trademark of AT&T  
Lightguide Cable Connectors.  
Contact your Agilent sales  
representative for information  
on these alternative Fast  
Ethernet, FDDI and ATM  
products.  
Transmitter Sections  
The package outline drawings  
and pin out are shown in  
Figures 2, 2a and 3. The  
details of this package outline  
and pin out are compliant  
with the multisource definition provide mechanical strength  
of the 1 x 9 SIP. The low  
profile of the Agilent  
The outer housing including  
the duplex SC connector  
receptacle or the duplex ST  
ports is molded of filled  
nonconductive plastic to  
The transmitter section of the  
AFBR-5803Z and AFBR-5805Z  
series utilize 1300 nm Surface  
Emitting InGaAsP LEDs. These  
LEDs are packaged in the  
optical subassembly portion of  
the transmitter section. They  
are driven by a custom silicon  
IC which converts differential  
PECL logic signals, ECL  
and electrical isolation. The  
solder posts of the Agilent  
design are isolated from the  
circuit design of the  
transceiver and do not require  
connection to a ground plane  
on the circuit board.  
transceiver design complies  
with the maximum height  
allowed for the duplex SC  
referenced (shifted) to a +3.3 V connector over the entire  
or +5 V supply, into an analog  
LED drive current.  
length of the package.  
The optical subassemblies  
utilize a high volume assembly  
process together with low cost  
lens elements which result in a two solder posts which exit  
cost effective building block.  
The transceiver is attached to  
a printed circuit board with  
the nine signal pins and the  
Receiver Sections  
The receiver sections of the  
AFBR-5803Z and AFBR-5805Z  
series utilize InGaAs PIN  
photodiodes coupled to a  
custom silicon transimpedance  
preamplifier IC. These are  
packaged in the optical sub-  
assembly portion of the  
receiver.  
the bottom of the housing. The  
two solder posts provide the  
primary mechanical strength to  
withstand the loads imposed  
on the transceiver by mating  
with duplex or simplex SC or  
ST connectored fiber cables.  
The electrical subassembly  
consists of a high volume  
multilayer printed circuit  
board on which the IC chips  
and various surface-mounted  
passive circuit elements are  
attached.  
These PIN/preamplifier combi-  
nations are coupled to a  
custom quantizer IC which  
provides the final pulse  
shaping for the logic output  
and the Signal Detect function.  
The data output is differential.  
The signal detect output is  
single-ended. Both data and  
signal detect outputs are PECL  
compatible, ECL referenced  
(shifted) to a +3.3 V or +5 V  
power supply.  
The package includes internal  
shields for the electrical and  
optical subassemblies to ensure  
low EMI emissions and high  
immunity to external EMI  
fields.  
ELECTRICAL SUBASSEMBLY  
DUPLEX SC  
RECEPTACLE  
DIFFERENTIAL  
DATA OUT  
PIN PHOTODIODE  
SINGLE-ENDED  
SIGNAL  
QUANTIZER IC  
DETECT OUT  
Package  
PREAMP IC  
OPTICAL  
The overall package concept  
for the Agilent transceivers  
consists of the following basic  
elements; two optical  
subassemblies, an electrical  
subassembly and the housing  
as illustrated in Figure 1 and  
Figure 1a.  
SUBASSEMBLIES  
DIFFERENTIAL  
DATA IN  
LED  
DRIVER IC  
TOP VIEW  
Figure 1. SC Connector Block Diagram.  
2
ELECTRICAL SUBASSEMBLY  
DUPLEX ST  
RECEPTACLE  
DIFFERENTIAL  
DATA OUT  
PIN PHOTODIODE  
SINGLE-ENDED  
SIGNAL  
DETECT OUT  
QUANTIZER IC  
PREAMP IC  
OPTICAL  
SUBASSEMBLIES  
DIFFERENTIAL  
DATA IN  
LED  
DRIVER IC  
TOP VIEW  
Figure 1a. ST Connector Block Diagram.  
Case Temperature  
Measurement Point  
39.12  
(1.540)  
12.70  
(0.500)  
MAX.  
ꢀ.35  
(0.250)  
AREA  
RESERVED  
FOR  
PROCESS  
PLUG  
25.40  
MAX.  
12.70  
(0.500)  
(1.000)  
AFBR-5803Z  
DATE CODE (YYWW)  
SINGAPORE  
AGILENT  
5.93 0.1  
(0.233 0.004)  
+ 0.08  
0.75  
– 0.05  
3.3 0.4  
(0.130 0.01ꢀ)  
3.30 0.38  
(0.130 0.015)  
+ 0.003  
10.35  
(0.407)  
)
(0.030  
MAX.  
– 0.002  
2.92  
(0.115)  
+ 0.25  
– 0.05  
18.52  
(0.729)  
1.27  
+ 0.010  
– 0.002  
0.4ꢀ  
(0.018)  
NOTE 1  
4.14  
(0.1ꢀ3  
(0.050  
)
Ø
(9x)  
NOTE 1  
23.55  
(0.927)  
20.32  
(0.800)  
1ꢀ.70  
(0.ꢀ57)  
17.32 20.32  
(0.ꢀ82 (0.800) (0.918)  
23.32  
[8x(2.54/.100)]  
0.87  
23.24  
(0.915)  
15.88  
(0.ꢀ25)  
(0.034)  
Note 1:  
Phosphor bronze is the base material for the posts & pins. For lead-free soldering, the solder posts  
have Tin Copper over Nickel plating, and the electrical pins have pure Tin over Nickel plating.  
DIMENSIONS ARE IN MILLIMETERS (INCHES).  
Figure 2. SC Connector Package Outline Drawing with standard height.  
3
42  
(1.ꢀ54)  
MAX.  
5.99  
(0.23ꢀ)  
24.8  
(0.97ꢀ)  
12.7  
(0.500)  
25.4  
(1.000)  
MAX.  
AFBR-5803TZ  
DATE CODE (YYWW)  
SINGAPORE  
Case Temperature  
Measurement Point  
+ 0.08  
- 0.05  
+ 0.003  
0.5  
(0.020)  
(
- 0.002  
(
12.0  
(0.471)  
MAX.  
2.ꢀ 0.4  
(0.102 0.01ꢀ)  
3.3 0.38  
(0.130 0.015)  
0.38  
0.015)  
20.32  
(
0.4ꢀ  
Ø
(0.018)  
NOTE 1  
2.ꢀ  
Ø
+ 0.25  
- 0.05  
1.27  
(0.102)  
(0.050)  
(
+ 0.010  
- 0.002  
)
20.32  
(0.800)  
17.4  
(0.ꢀ85)  
[(8x (2.54/0.100)]  
20.32  
(0.800)  
22.8ꢀ  
21.4  
(0.843)  
(0.900)  
3.ꢀ  
(0.142)  
1.3  
(0.051)  
23.38  
18.ꢀ2  
(0.921)  
(0.733)  
Note 1:  
Phosphor bronze is the base material for the posts & pins. For lead-free soldering, the solder posts  
have Tin Copper over Nickel plating, and the electrical pins have pure Tin over Nickel plating.  
DIMENSIONS IN MILLIMETERS (INCHES).  
Figure 2a. ST Connector Package Outline Drawing with standard height.  
1 = VEE  
N/C  
2 = RD  
Rx  
Tx  
3 = RD  
4 = SD  
5 = VCC  
ꢀ = VCC  
7 = TD  
8 = TD  
9 = VEE  
N/C  
TOP VIEW  
Figure 3. Pin Out Diagram.  
4
Application Information  
equipment mission life periods. encoding factor used to encode  
The Applications Engineering  
group in the Agilent Fiber  
Contact your Agilent sales  
representative for additional  
the data  
(symbols/bit).  
Optics Communication Division details.  
is available to assist you with  
When used in Fast Ethernet,  
FDDI and ATM 100 Mb/s  
applications the performance  
Figure 4 was generated with a  
Agilent fiber optic link model  
the technical understanding  
and design trade-offs  
associated with these trans-  
ceivers. You can contact them  
through your Agilent sales  
representative.  
containing the current industry of the 1300 nm transceivers is  
conventions for fiber cable  
specifications and the FDDI  
PMD and LCF-PMD optical  
parameters. These parameters  
guaranteed over the signaling  
rate of 10 MBd to  
125 MBd to the full conditions  
listed in individual product  
The following information is  
provided to answer some of  
the most common questions  
about the use of these parts.  
are reflected in the guaranteed specification tables.  
performance of the transceiver  
2.5  
specifications in this data  
sheet. This same model has  
2.0  
been used extensively in the  
ANSI and IEEE committees,  
including the ANSI X3T9.5  
committee, to establish the  
optical performance require-  
ments for various fiber optic  
interface standards. The cable  
parameters used come from  
the ISO/IEC JTC1/SC 25/WG3  
Generic Cabling for Customer  
Premises per  
DIS 11801 document and the  
EIA/TIA-568-A Commercial  
Building Telecommunications  
Cabling Standard per SP-2840.  
Transceiver Optical Power Budget  
versus Link Length  
Optical Power Budget (OPB) is  
the available optical power for  
a fiber optic link to  
accommodate fiber cable losses  
plus losses due to in-line  
connectors, splices, optical  
switches, and to provide  
margin for link aging and  
unplanned losses due to cable  
plant reconfiguration or repair.  
1.5  
1.0  
0.5  
0
0.5  
0
25 50  
75 100 125 150 175 200  
SIGNAL RATE (MBd)  
CONDITIONS:  
1. PRBS 27-1  
2. DATA SAMPLED AT CENTER OF DATA SYMBOL.  
3. BER = 10-ꢀ  
4. TA = +25˚ C  
5. VCC = 3.3 V to 5 V dc  
ꢀ. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.  
Figure 4 illustrates the pre-  
dicted OPB associated with the  
transceiver series specified in  
this data sheet at the Beginning  
of Life (BOL). These curves  
represent the attenuation and  
chromatic plus modal  
dispersion losses associated  
with the 62.5/125 µm and 50/  
125 µm fiber cables only. The  
area under the curves  
Figure 5. Transceiver Relative Optical Power  
Budget at Constant BER vs. Signaling Rate.  
12  
AFBR-5803, ꢀ2.5/125 µm  
10  
The transceivers may be used  
for other applications at  
signaling rates outside of the  
10 MBd to 125 MBd range  
with some penalty in the link  
optical power budget primarily  
caused by a reduction of  
receiver sensitivity. Figure 5  
gives an indication of the  
typical performance of these  
1300 nm products at different  
rates.  
8
AFBR-5803  
50/125 µm  
4
2
represents the remaining OPB  
at any link length, which is  
available for overcoming non-  
fiber cable related losses.  
1.  
0
0
0.3 0.5  
1.5  
2.0  
2.5  
FIBER OPTIC CABLE LENGTH (km)  
Figure 4. Optical Power Budget at BOL versus  
Fiber Optic Cable Length.  
Agilent LED technology has  
produced 1300 nm LED  
devices with lower aging  
characteristics than normally  
associated with these  
technologies in the industry.  
The industry convention is 1.5  
dB aging for 1300 nm LEDs.  
The Agilent 1300 nm LEDs will  
experience less than 1 dB of  
aging over normal commercial  
These transceivers can also be  
used for applications which  
require different Bit Error  
Rate (BER) performance.  
Figure 6 illustrates the typical  
trade-off between link BER  
and the receivers input optical  
power level.  
Transceiver Signaling Operating  
Rate Range and BER Performance  
For purposes of definition, the  
symbol (Baud) rate, also called  
signaling rate, is the reciprocal  
of the shortest symbol time.  
Data rate (bits/sec) is the  
symbol rate divided by the  
5
1 x 10 -2  
without violating the Annex E  
allocation example. In practice  
the typical contribution of the  
Agilent transceivers is well  
below these maximum allowed  
amounts.  
to prevent damage which may  
be induced by electrostatic  
discharge (ESD). The AFBR-  
5800 series of transceivers  
meet MIL-STD-883C Method  
3015.4 Class 2 products.  
1 x 10 -3  
1 x 10 -4  
AFBR-5803 SERIES  
1 x 10 -5  
1 x 10 -ꢀ  
1 x 10 -7  
CENTER OF SYMBOL  
Recommended Handling Precautions Care should be used to avoid  
Agilent recommends that  
normal static precautions be  
taken in the handling and  
assembly of these transceivers  
1 x 10 -8  
1 x 10 -9  
1 x 10 -10  
1 x 10 -11  
1 x 10 -12  
shorting the receiver data or  
signal detect outputs directly  
to ground without proper  
current limiting impedance.  
-ꢀ  
-4  
-2  
0
2
4
RELATIVE INPUT OPTICAL POWER - dB  
CONDITIONS:  
1. 155 MBd  
2. PRBS 27-1  
3. CENTER OF SYMBOL SAMPLING  
4. TA = +25˚C  
5. VCC= 3.3 V to 5 V dc  
ꢀ. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.  
Rx  
Tx  
Figure ꢀ. Bit Error Rate vs. Relative Receiver  
Input Optical Power.  
NO INTERNAL CONNECTION  
NO INTERNAL CONNECTION  
Transceiver Jitter Performance  
The Agilent 1300 nm  
AFBR-5803Z  
transceivers are designed to  
operate per the system jitter  
allocations stated in Tables E1  
of Annexes E of the FDDI  
PMD and LCF-PMD standards.  
TOP VIEW  
Rx  
Rx  
VCC  
5
Tx  
Tx  
VEE  
VEE  
RD  
2
RD  
3
SD  
4
VCC  
TD  
7
TD  
8
1
9
The Agilent 1300 nm  
transmitters will tolerate the  
worst case input electrical  
jitter allowed in these tables  
without violating the worst  
case output jitter requirements  
of Sections 8.1 Active Output  
Interface of the FDDI PMD and  
LCF-PMD standards.  
C1  
C2  
VCC  
R2  
R3  
L1  
L2  
C4  
TERMINATION  
AT PHY  
DEVICE  
INPUTS  
R1  
R4  
VCC  
C3  
C5  
V
CC FILTER  
AT VCC PINS  
TRANSCEIVER  
R9  
R5  
R7  
The Agilent 1300 nm receivers  
will tolerate the worst case  
input optical jitter allowed in  
Sections 8.2 Active Input  
TERMINATION  
AT TRANSCEIVER  
INPUTS  
Cꢀ  
Rꢀ  
R8  
R10  
Interface of the FDDI PMD and  
LCF-PMD standards without  
violating the worst case output  
electrical jitter allowed in the  
Tables E1 of the Annexes E.  
RD  
RD  
SD  
VCC  
TD  
TD  
NOTES:  
THE SPLIT-LOAD TERMINATIONS FOR ECL SIGNALS NEED TO BE LOCATED AT THE INPUT  
OF DEVICES RECEIVING THOSE ECL SIGNALS. RECOMMEND 4-LAYER PRINTED CIRCUIT  
BOARD WITH 50 OHM MICROSTRIP SIGNAL PATHS BE USED.  
R1 = R4 = Rꢀ = R8 = R10 = 130 OHMS FOR +5.0 V OPERATION, 82 OHMS FOR +3.3 V OPERATION.  
R2 = R3 = R5 = R7 = R9 = 82 OHMS FOR +5.0 V OPERATION, 130 OHMS FOR +3.3 V OPERATION.  
C1 = C2 = C3 = C5 = Cꢀ = 0.1 µF.  
The jitter specifications stated  
in the following 1300 nm  
transceiver specification tables  
are derived from the values in  
Tables E1 of Annexes E. They  
represent the worst case jitter  
contribution that the trans-  
ceivers are allowed to make to  
the overall system jitter  
C4 = 10 µF.  
L1 = L2 = 1 µH COIL OR FERRITE INDUCTOR.  
Figure 7. Recommended Decoupling and Termination Circuits  
6
Solder and Wash Process  
Compatibility  
Board Layout - Decoupling Circuit  
and Ground Planes  
Board Layout - Hole Pattern  
The Agilent transceiver  
The transceivers are delivered  
with protective process plugs  
inserted into the duplex SC or  
duplex ST connector  
receptacle. This process plug  
protects the optical  
It is important to take care in  
the layout of your circuit  
board to achieve optimum  
performance from these  
transceivers. Figure 7 provides  
complies with the circuit board  
“Common Transceiver  
Footprint” hole pattern defined  
in the original multisource  
announcement which defined  
a good example of a schematic the 1 x 9 package style. This  
subassemblies during wave  
solder and aqueous wash  
processing and acts as a dust  
cover during shipping.  
for a power supply decoupling  
circuit that works well with  
these parts. It is further  
recommended that a  
contiguous ground plane be  
provided in the circuit board  
directly under the transceiver  
to provide a low inductance  
ground for signal return  
current. This recommendation  
is in keeping with good high  
frequency board layout  
drawing is reproduced in  
Figure 8 with the addition of  
ANSI Y14.5M compliant  
dimensioning to be used as a  
guide in the mechanical layout  
of your circuit board.  
These transceivers are compat-  
ible with either industry  
standard wave or hand solder  
processes.  
Board Layout - Mechanical  
For applications providing a  
choice of either a duplex SC  
or a duplex ST connector  
interface, while utilizing the  
same pinout on the printed  
circuit board, the ST port  
needs to protrude from the  
chassis panel a minimum of  
9.53 mm for sufficient  
Shipping Container  
The transceiver is packaged in  
a shipping container designed  
to protect it from mechanical  
and ESD damage during  
shipment or storage.  
practices.  
clearance to install the ST  
connector.  
20.32  
(0.800)  
2 x Ø 1.9 0.1  
(0.075 0.004)  
Please refer to Figure 8a for a  
mechanical layout detailing the  
recommended location of the  
duplex SC and duplex ST  
transceiver packages in  
relation to the chassis panel.  
20.32  
(0.800)  
9 x Ø 0.8 0.1  
(0.032 0.004)  
2.54  
(0.100)  
TOP VIEW  
DIMENSIONS ARE IN MILLIMETERS (INCHES)  
Figure 8. Recommended Board Layout Hole Pattern  
7
42.0  
24.8  
9.53  
12.0  
(NOTE 1)  
0.51  
12.09  
25.4  
39.12  
11.1  
ꢀ.79  
0.75  
25.4  
NOTE 1: MINIMUM DISTANCE FROM FRONT  
OF CONNECTOR TO THE PANEL FACE.  
Figure 8a. Recommended Common Mechanical Layout for SC and ST 1 x 9 Connectored Transceivers.  
Regulatory Compliance  
Electrostatic Discharge (ESD)  
There are two design cases in  
which immunity to ESD  
damage is important.  
The second case to consider is  
static discharges to the exterior  
of the equipment chassis con-  
taining the transceiver parts.  
To the extent that the duplex  
SC connector is exposed to the  
outside of the equipment  
chassis it may be subject to  
whatever ESD system level test  
criteria that the equipment is  
intended to meet.  
These transceiver products are  
intended to enable commercial  
system designers to develop  
equipment that complies with  
the various international  
regulations governing certifica-  
tion of Information Technology  
Equipment. See the Regulatory  
Compliance Table for details.  
Additional information is  
available from your Agilent  
sales representative.  
The first case is during  
handling of the transceiver  
prior to mounting it on the  
circuit board. It is important  
to use normal ESD handling  
precautions for ESD sensitive  
devices. These precautions  
include using grounded wrist  
straps, work benches, and  
floor mats in ESD controlled  
areas.  
8
Regulatory Compliance Table  
Feature  
Test Method  
Performance  
Electrostatic Discharge (ESD) to MIL-STD-883C  
Meets Class 1 (<1999 Volts)  
the Electrical Pins  
Method 3015.4  
Withstand up to 1500 V applied between electrical pins.  
Electrostatic Discharge (ESD) to Variation of  
Typically withstand at least 25 kV without damage when the Duplex SC  
Connector Receptacle is contacted by a Human Body Model probe.  
the Duplex SC Receptacle  
IEC 801-2  
Electromagnetic Interference  
(EMI)  
FCC Class B  
Transceivers typically provide a 13 dB margin (with duplex SC receptacle) or a 9  
dB margin (with duplex ST receptacles ) to the noted standard limits. However,  
it should be noted that final margin depends on the customer's board and  
chassis design.  
CENELEC CEN55022  
Class B (CISPR 22B)  
VCCI Class 2  
Immunity  
Variation of IEC 61000-4-3  
Typically show no measurable effect from a 10 V/m field swept from 10 to 450  
MHz applied to the transceiver when mounted to a circuit card without a  
chassis enclosure.  
Electromagnetic Interference (EMI)  
Most equipment designs  
In all well-designed chassis,  
two 0.5" holes for ST  
Transceiver Reliability and  
Performance Qualification Data  
utilizing these high speed  
transceivers from Agilent will  
be required to meet the  
requirements of FCC in the  
United States, CENELEC  
connectors to protrude through The 1 x 9 transceivers have  
will provide 4.6 dB more  
passed Agilent reliability and  
performance qualification  
testing and are undergoing  
ongoing quality monitoring.  
Details are available from your  
Agilent sales representative.  
shielding than one 1.2" duplex  
SC rectangular cutout. Thus, in  
a well-designed chassis, the  
EN55022 (CISPR 22) in Europe duplex ST 1 x 9 transceiver  
and VCCI in Japan.  
emissions will be identical to  
the duplex SC 1 x 9  
Accessory Duplex SC Connectored  
Cable Assemblies  
transceiver emissions.  
200  
Immunity  
Agilent recommends for  
optimal coupling the use of  
flexible-body duplex SC con-  
nectored cable.  
3.0  
3.5  
180  
1.5  
Equipment utilizing these  
transceivers will be subject to  
radio-frequency  
1ꢀ0  
2.0  
electromagnetic fields in some  
environments. These  
transceivers have a high  
immunity to such fields.  
140  
120  
100  
2.5  
Accessory Duplex ST Connectored  
Cable Assemblies  
3.0  
3.5  
t
– TRANSMITTER  
r/f  
OUTPUT OPTICAL  
RISE/FALL TIMES – ns  
Agilent recommends the use of  
Duplex Push-Pull connectored  
cable for the most repeatable  
optical power coupling  
performance.  
1200 1300 1320 1340 13ꢀ0 1380  
For additional information  
regarding EMI, susceptibility,  
ESD and conducted noise  
testing procedures and results  
on the  
λ
– TRANSMITTER OUTPUT OPTICAL  
CENTER WAVELENGTH –nm  
C
AFBR-5803Z FDDI TRANSMITTER TEST RESULTS  
OF λ , ∆λ AND t ARE CORRELATED AND  
COMPLY WITH THE ALLOWED SPECTRAL WIDTH  
AS A FUNCTION OF CENTER WAVELENGTH FOR  
VARIOUS RISE AND FALL TIMES.  
C
r/f  
1 x 9 Transceiver family,  
please refer to Applications  
Note 1075, Testing and  
Measuring Electromagnetic  
Compatibility Performance of  
the AFBR-510X/520X Fiber  
Optic Transceivers.  
Figure 9. Transmitter Output Optical Spectral  
Width (FWHM) vs. Transmitter Output Optical  
Center Wavelength and Rise/Fall Times.  
9
4.40  
1.975  
1.25  
4.850  
1.525  
0.525  
10.0  
5.6  
1.025  
1.00  
0.975  
0.075  
0.90  
100% TIME  
INTERVAL  
40 0.7  
0.50  
0.10  
0.725  
0.725  
0% TIME  
INTERVAL  
0.025  
0.0  
0.075  
-0.025  
-0.05  
1.525  
0.525  
5.6  
1.975  
4.40  
10.0  
4.850  
80 500 ppm  
TIME – ns  
THE AFBR-5803Z OUTPUT OPTICAL PULSE SHAPE SHALL FIT WITHIN THE BOUNDARIES  
OF THE PULSE ENVELOPE FOR RISE AND FALL TIME MEASUREMENTS.  
Figure 10. Output Optical Pulse Envelope.  
5
AFBR-5803Z SERIES  
4
3
-10  
2.5 x 10 BER  
2
-12  
1.0 x 10 BER  
1
0
-4 -3 -2 -1  
0
1
2
3
4
EYE SAMPLING TIME POSITION (ns)  
CONDITIONS:  
1.TA = 25 C  
2. VCC = 5 Vdc  
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/2.1 ns.  
4. INPUT OPTICAL POWER IS NORMALIZED TO  
CENTER OF DATA SYMBOL.  
5. NOTE 20 AND 21 APPLY.  
Figure 11. Relative Input Optical Power vs.  
Eye Sampling Time Position.  
10  
-31.0 dBm  
MIN (PO + 4.0 dB OR -31.0 dBm)  
PO = MAX (PS OR -45.0 dBm)  
PA(PO + 1.5 dB  
< PA < -31.0 dBm)  
2
(PS = INPUT POWER FOR BER < 10 )  
INPUT OPTICAL POWER  
( 1.5 dB STEP INCREASE)  
INPUT OPTICAL POWER  
>
( 4.0 dB STEP DECREASE)  
>
-45.0 dBm  
ANS MAX  
AS MAX  
SIGNAL DETECT  
(ON)  
SIGNAL DETECT  
(OFF)  
TIME  
AS MAX — MAXIMUM ACQUISITION TIME (SIGNAL).  
AS MAX IS THE MAXIMUM SIGNAL DETECT ASSERTION TIME FOR THE STATION.  
AS MAX SHALL NOT EXCEED 100.0 µs. THE DEFAULT VALUE OF AS MAX IS 100.0 µs.  
ANS MAX — MAXIMUM ACQUISITION TIME (NO SIGNAL).  
ANS MAX IS THE MAXIMUM SIGNAL DETECT DEASSERTION TIME FOR THE STATION.  
ANS MAX SHALL NOT EXCEED 350 µs. THE DEFAULT VALUE OF AS MAX IS 350 µs.  
Figure 12. Signal Detect Thresholds and Timing.  
11  
Absolute Maximum Ratings  
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parameter in  
isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that limiting values  
of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum ratings for extended  
periods can adversely affect device reliability.  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Reference  
Storage Temperature  
TS  
-40  
+100  
°C  
Lead Soldering Temperature  
Lead Soldering Time  
Supply Voltage  
TSOLD  
tSOLD  
VCC  
VI  
+260  
10  
°C  
sec.  
V
-0.5  
-0.5  
7.0  
VCC  
1.4  
50  
Data Input Voltage  
Differential Input Voltage  
Output Current  
V
VD  
V
Note 1  
IO  
mA  
Recommended Operating Conditions  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Reference  
Ambient Operating Temperature  
AFBR-5803Z/5803TZ  
TA  
0
+70  
°C  
Note A  
Note B  
AFBR-5803AZ/5803ATZ  
Supply Voltage  
TA  
VCC  
-10  
3.135  
+85  
3.5  
°C  
V
VCC  
4.75  
5.25  
V
V
V
W
Data Input Voltage - Low  
VIL - VCC  
VIH - VCC  
RL  
-1.810  
-1.165  
-1.475  
-0.880  
Data Input Voltage - High  
Data and Signal Detect Output Load  
50  
Note 2  
Notes:  
A. Ambient Operating Temperature corresponds to transceiver case temperature of 0°C mininum to +85 °C maximum with necessary airflow applied.  
Recommended case temperature measurement point can be found in Figure 2.  
B. Ambient Operating Temperature corresponds to transceiver case temperature of -10 °C mininum to +100 °C maximum with necessary airflow  
applied. Recommended case temperature measurement point can be found in Figure 2.  
Transmitter Electrical Characteristics  
(AFBR-5803Z/5803TZ: T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
(AFBR-5803AZ/AFBR-5803ATZ: T = -10°C to +85°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Reference  
Supply Current  
ICC  
133  
175  
mA  
Note 3  
Power Dissipation  
at VCC = 3.3 V  
at VCC = 5.0 V  
PDISS  
PDISS  
IIL  
0.45  
0.76  
-2  
0.6  
W
W
0.97  
Data Input Current - Low  
-350  
µA  
µA  
Data Input Current - High  
IIH  
18  
350  
12  
Receiver Electrical Characteristics  
(AFBR-5803Z/5803TZ: T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
(AFBR-5803AZ/AFBR-5803ATZ: T = -10°C to +85°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
Parameter  
Symbol  
Min.  
Typ.  
Max.  
Unit  
Reference  
Supply Current  
ICC  
87  
120  
mA  
Note 4  
Power Dissipation  
at VCC = 3.3 V  
at VCC = 5.0 V  
PDISS  
0.15  
0.3  
0.25  
0.5  
W
W
V
Note 5  
Note 5  
Note 6  
Note 6  
Note 7  
Note 7  
Note 6  
Note 6  
Note 7  
Note 7  
PDISS  
Data Output Voltage - Low  
Data Output Voltage - High  
Data Output Rise Time  
VOL - VCC  
-1.83  
-1.085  
0.35  
-1.55  
-0.88  
2.2  
VOH - VCC  
V
tr  
ns  
ns  
V
Data Output Fall Time  
tf  
0.35  
2.2  
Signal Detect Output Voltage - Low  
Signal Detect Output Voltage - High  
Signal Detect Output Rise Time  
Signal Detect Output Fall Time  
VOL - VCC  
-1.83  
-1.085  
0.35  
-1.55  
-0.88  
2.2  
VOH - VCC  
V
tr  
tf  
ns  
ns  
0.35  
2.2  
Transmitter Optical Characteristics  
(AFBR-5803Z/5803TZ: T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
(AFBR-5803AZ/AFBR-5803ATZ: T = -10°C to +85°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
Parameter  
Output Optical Power  
Symbol  
PO  
Min.  
-19  
Typ.  
Max.  
-14  
Unit  
dBm avg.  
Reference  
Note 11  
BOL  
EOL  
62.5/125 µm, NA = 0.275 Fiber  
-20  
Output Optical Power  
BOL  
EOL  
PO  
-22.5  
-23.5  
-14  
dBm avg.  
Note 11  
Note 12  
50/125 µm, NA = 0.20 Fiber  
Optical Extinction Ratio  
10  
%
-10  
-45  
dB  
dBm avg.  
Output Optical Power at Logic “0” State  
Center Wavelength  
PO (“0”)  
lC  
Note 13  
Note 14  
Note 14  
1270  
1308  
147  
1380  
nm  
nm  
Dl  
Spectral Width - FWHM  
Spectral Width - nm RMS  
Optical Rise Time  
63  
1.9  
Figure 9  
Note 14, 15  
tr  
tf  
0.6  
0.6  
3.0  
3.0  
ns  
ns  
Figure 9, 10  
Optical Fall Time  
1.6  
Note 14, 15  
Figure 9, 10  
Duty Cycle Distortion Contributed by the Transmitter  
Data Dependent Jitter Contributed by the Transmitter  
Random Jitter Contributed by the Transmitter  
DCD  
DDJ  
RJ  
0.6  
ns p-p  
ns p-p  
ns p-p  
Note 16  
Note 17  
Note 18  
0.6  
0.69  
13  
Receiver Optical and Electrical Characteristics  
(AFBR-5803Z/5803TZ: T = 0°C to +70°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
(AFBR-5803AZ/AFBR-5803ATZ: T = -10°C to +85°C, V = 3.135 V to 3.5 V or 4.75 V to 5.25 V)  
A
CC  
Parameter  
Symbol  
PIN Min. (W)  
Min.  
Typ.  
-33.9  
Max.  
-31  
Unit  
dBm avg.  
Reference  
Note 19  
Input Optical Power Minimum at Window Edge  
Input Optical Power Minimum at Eye Center  
Figure 11  
P
IN Min. (C)  
-35.2  
-31.8  
dBm avg.  
Note 20  
Figure 11  
Input Optical Power Maximum  
PIN Max.  
-14  
dBm avg.  
nm  
Note 19  
l
Operating Wavelength  
1270  
1380  
0.4  
Duty Cycle Distortion Contributed by the Receiver  
Data Dependent Jitter Contributed by the Receiver  
Random Jitter Contributed by the Receiver  
Signal Detect - Asserted  
DCD  
DDJ  
RJ  
ns p-p  
ns p-p  
ns p-p  
dBm avg.  
Note 8  
Note 9  
Note 10  
1.0  
2.14  
-33  
PA  
PD + 1.5 dB  
-45  
Note 21, 22  
Figure 12  
Signal Detect - Deasserted  
PD  
dBm avg.  
Note 23, 24  
Figure 12  
Signal Detect - Hysteresis  
PA - PD  
1.5  
0
dB  
µs  
Figure 12  
Signal Detect Assert Time (off to on)  
AS_Max  
2
8
100  
350  
Note 21, 22  
Figure 12  
Signal Detect Deassert Time (on to off)  
ANS_Max  
0
µs  
Note 23, 24  
Figure 12  
Notes:  
1. This is the maximum voltage that can be  
applied across the Differential Transmitter  
Data Inputs to prevent damage to the input  
ESD protection circuit.  
using an IDLE Line State, 125 MBd  
With HALT Line State, (12.5 MHz square-  
wave), input signal.  
(62.5 MHz square-wave), input signal. The  
input optical power level is -20 dBm  
average. See Application Information -  
Transceiver Jitter Section for further  
information.  
At the end of one meter of noted optical  
fiber with cladding modes removed.  
2. The outputs are terminated with 50 W  
The average power value can be converted  
to a peak power value by adding 3 dB.  
Higher output optical power transmitters  
are available on special request.  
connected to V -2 V.  
CC  
3. The power supply current needed to operate  
the transmitter is provided to differential  
ECL circuitry. This circuitry maintains a  
nearly constant current flow from the power  
supply. Constant current operation helps to  
prevent unwanted electrical noise from  
being generated and conducted or emitted  
to neighboring circuitry.  
9. Data Dependent Jitter contributed by  
the receiver is specified with the FDDI DDJ  
test pattern described in the FDDI PMD  
Annex A.5. The input optical power level is -  
20 dBm average. See Application Informa-  
tion - Transceiver Jitter Section for further  
information.  
12. The Extinction Ratio is a measure of the  
modulation depth of the optical signal. The  
data “0” output optical power is compared  
to the data “1” peak output optical power  
and expressed as a percentage. With the  
transmitter driven by a HALT Line State  
(12.5 MHz square-wave) signal, the average  
optical power is measured. The data “1”  
peak power is then calculated by adding 3  
dB to the measured average optical power.  
The data “0” output optical power is found  
by measuring the optical power when the  
transmitter is driven by a logic “0” input.  
The extinction ratio is the ratio of the  
optical power at the “0” level compared to  
the optical power at the “1” level expressed  
as a percentage or in decibels.  
10. Random Jitter contributed by the receiver is  
specified with an IDLE Line State,  
4. This value is measured with the outputs  
terminated into 50 W connected to V - 2 V  
125 MBd (62.5 MHz square-wave), input  
signal. The input optical power level is at  
CC  
and an Input Optical Power level of  
-14 dBm average.  
maximum “P  
(W)”. See Application  
IN Min.  
5. The power dissipation value is the power  
dissipated in the receiver itself. Power  
dissipation is calculated as the sum of the  
products of supply voltage and currents,  
minus the sum of the products of the output  
voltages and currents.  
Information - Transceiver Jitter Section for  
furtherinformation.  
11. These optical power values are measured  
with the following conditions:  
The Beginning of Life (BOL) to the End of  
Life (EOL) optical power degradation is  
typically 1.5 dB per the industry  
6. This value is measured with respect to V  
CC  
with the output terminated into 50 W  
convention for long wavelength LEDs.  
The actual degradation observed in  
Agilent’s 1300 nm LED products is  
< 1 dB, as specified in this data sheet.  
Over the specified operating voltage and  
temperature ranges.  
13. The transmitter provides compliance with  
the need for Transmit_Disable commands  
from the FDDI SMT layer by providing an  
Output Optical Power level of < -45 dBm  
average in response to a logic “0” input.  
This specification applies to either 62.5/125  
µm or 50/125 µm fiber cables.  
connected to V - 2 V.  
CC  
7. The output rise and fall times are measured  
between 20% and 80% levels with the  
output connected to V -2 V through 50 W.  
CC  
8. Duty Cycle Distortion contributed by the  
receiver is measured at the 50% threshold  
14  
-2  
14. This parameter complies with the FDDI PMD  
requirements for the trade-offs between  
center wavelength, spectral width, and rise/  
fall times shown in Figure 9.  
15. This parameter complies with the optical  
pulse envelope from the FDDI PMD shown  
in Figure 10. The optical rise and fall times  
are measured from 10% to 90% when the  
transmitter is driven by the FDDI HALT Line  
State (12.5 MHz square-wave) input signal.  
16. Duty Cycle Distortion contributed by the  
transmitter is measured at a 50% threshold  
using an IDLE Line State, 125 MBd  
with production test equipment. The  
receiver can be equivalently tested to the  
worst case FDDI PMD input jitter conditions  
and meet the minimum output data window  
time-width of 2.13 ns. This is accomplished  
by using a nearly ideal input optical signal  
(no DCD, insignificant DDJ and RJ) and  
measuring for a wider window time-width of  
4.6 ns. This is possible due to the cumulative  
effect of jitter components through their  
superposition (DCD and DDJ are directly  
additive and RJ components are rms  
additive). Specifically, when a nearly ideal  
input optical test signal is used and the  
maximum receiver peak-to-peak jitter  
contributions of DCD (0.4 ns), DDJ (1.0 ns),  
and RJ (2.14 ns) exist, the minimum window  
time-width becomes 8.0 ns -0.4 ns - 1.0 ns -  
2.14 ns = 4.46 ns, or conservatively 4.6 ns.  
This wider window time-width of 4.6 ns  
guarantees the FDDI PMD Annex E  
above 10 for an input optical data stream  
that decays with a negative ramp function  
instead of a step function. See Figure 12 for  
moreinformation.  
(62.5 MHz square-wave), input signal. See  
Application Information - Transceiver Jitter  
Performance Section of this data sheet for  
further details.  
17. Data Dependent Jitter contributed by the  
transmitter is specified with the FDDI test  
pattern described in FDDI PMD Annex A.5.  
See Application Information - Transceiver  
Jitter Performance Section of this data  
sheet for further details.  
18. Random Jitter contributed by the  
transmitter is specified with an IDLE Line  
State, 125 MBd (62.5 MHz square-wave),  
input signal. See Application Information -  
Transceiver Jitter Performance Section of  
this data sheet for further details.  
19. This specification is intended to indicate the  
performance of the receiver section of the  
transceiver when Input Optical Power signal  
characteristics are present per the following  
definitions. The Input Optical Power  
minimum window time-width of 2.13 ns  
under worst case input jitter conditions to  
the Agilent receiver.  
Transmitter operating with an IDLE Line  
State pattern, 125 MBd (62.5 MHz  
square-wave), input signal to simulate  
any cross-talk present between the  
transmitter and receiver sections of the  
transceiver.  
20. All conditions of Note 19 apply except that  
the measurement is made at the center of  
the symbol with no window time-width.  
21. This value is measured during the transition  
from low to high levels of input optical  
power.  
22. The Signal Detect output shall be asserted  
within 100 µs after a step increase of the  
Input Optical Power. The step will be from a  
low Input Optical Power, - -45 dBm, into the  
dynamic range from the minimum level (with  
a window time-width) to the maximum level  
is the range over which the receiver is  
guaranteed to provide output data with a Bit  
Error Ratio (BER) better than or equal to 2.5  
-10  
x 10  
.
At the Beginning of Life (BOL)  
Over the specified operating temperature  
and voltage ranges  
range between greater than P , and  
A
-14 dBm. The BER of the receiver output will  
-2  
be 10 or better during the time, LS_Max  
Input symbol pattern is the FDDI test  
pattern defined in FDDI PMD Annex A.5  
with 4B/5B NRZI encoded data that  
contains a duty cycle base-line wander  
effect of 50 kHz. This sequence causes a  
near worst case condition for inter-  
symbol interference.  
Receiver data window time-width is  
2.13 ns or greater and centered at  
mid-symbol. This worst case window  
time-width is the minimum allowed  
eye-opening presented to the FDDI PHY  
PM._Data indication input (PHY input)  
per the example in FDDI PMD Annex E.  
This minimum window time-width of 2.13  
ns is based upon the worst case FDDI  
PMD Active Input Interface optical  
conditions for peak-to-peak DCD (1.0 ns),  
DDJ (1.2 ns) and RJ (0.76 ns) presented  
to the receiver.  
(15 µs) after Signal Detect has been  
asserted. See Figure 12 for more  
information.  
23. This value is measured during the transition  
from high to low levels of input optical  
power. The maximum value will occur when  
the input optical power is either -45 dBm  
average or when the input optical power  
-2  
yields a BER of 10 or larger, whichever  
power is higher.  
24. Signal detect output shall be de-asserted  
within 350 µs after a step decrease in the  
Input Optical Power from a level which is  
the lower of; -31 dBm or P + 4 dB (P is the  
D
D
power level at which signal detect was de-  
asserted), to a power level of -45 dBm or  
less. This step decrease will have occurred  
in less than 8 ns. The receiver output will  
-2  
have a BER of 10 or better for a period of  
12 µs or until signal detect is de-asserted.  
The input data stream is the Quiet Line  
State. Also, signal detect will be de-  
asserted within a maximum of 350 µs after  
the BER of the receiver output degrades  
To test a receiver with the worst case FDDI  
PMD Active Input jitter condition requires  
exacting control over DCD, DDJ and RJ jitter  
components that is difficult to implement  
15  
Ordering Information  
The AFBR-5803Z/5803TZ/5803AZ/5803ATZ 1300 nm products are available for production orders  
through the Agilent Component Field Sales Offices and Authorized Distributors world wide.  
0 °C to +70 °C  
AFBR-5803Z/5803TZ  
-10 °C TO +85 °C  
AFBR-5803AZ/5803ATZ  
Note:  
The “T” in the product numbers indicates a transceiver with a duplex ST connector receptacle.  
Product numbers without a “T” indicate transceivers with a duplex SC connector receptacle.  
www.agilent.com/  
semiconductors  
For product information and a complete list  
of distributors, please go to our web site.  
For technical assistance call:  
Americas/Canada: +1 (800) 235-0312 or  
(408)654-8675  
Europe: +49 (0) 6441 92460  
China: 10800 650 0017  
Hong Kong: (+65) 6756 2394  
India, Australia, New Zealand: (+65) 6755 1939  
Japan: (+81 3) 3335-8152(Domestic/Inter-  
national), or 0120-61-1280(Domestic Only)  
Korea: (+65) 6755 1989  
Singapore, Malaysia, Vietnam, Thailand,  
Philippines, Indonesia: (+65) 6755 2044  
Taiwan: (+65) 6755 1843  
Data subject to change.  
Copyright © 2005 Agilent Technologies, Inc.  
Obsoletes5989-2294EN  
October 4, 2005  
5989-3432EN  

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