AEAS-7000-1GSD0 [AGILENT]
Plug and Play Ultra-Precision Absolute Encoder 16-bit Gray Code; 即插即用超精密绝对式编码器的16位格雷码
| 型号： | AEAS-7000-1GSD0 |
| 厂家： | 
AGILENT TECHNOLOGIES, LTD. |
| 描述： | Plug and Play Ultra-Precision Absolute Encoder 16-bit Gray Code |
| 文件： | 总8页 (文件大小：148K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Agilent AEAS-7000
Plug and Play Ultra-Precision
Absolute Encoder 16-bit Gray Code
Data Sheet
Features
• Minumum mechanical alignment
during installation
Description
• 2 Sine/Cosine true differential
outputs with 1024 periods for unit
alignment
The encoder IC consists of 13
signal photo diode channels and
1 monitor photo diode channel
and is used for the optical
reading of rotary carriers (i.e.,
discs). The photodiodes are
accompanied with precision
amplifiers plus additional
circuitry.
• Integrated highly collimated
illumination system
• 11 digital tracks plus 2 sin/cos
tracksgenerateprecise16bitGray
code
2. 11 analog (A1-A11) channels
which are directly digitized
• Ultra fast, 1 µs cycle for serial data
output word equals 16 MHz
by precison comparators with
hysterisis tracking. The
digitized signals are called
D1-D11.
The monitor channel is used to
drive a constant current source
for the highly collimated IR
illumination system.
• On-chipinterpolationandcode
correctiontocompensatefor
mountingtolerance
An internal correction and
synchronization module allows
the composition of a true 16 bit
gray code by merging the data
bits of 1) and 2) by still keeping
the code monotony.
FunctionalDescription
Background
• MSB can be inverted for changing
the counting direction
• Internally built in monitor track for
tracking the light level
The 13 signal channels are set up
as:
• Watch dog with alarm output
• –25°Cto+85°Coperatingtemp.
1. Two precision defining signals
(A0, A09), which are two 90°
electrical shifted sine, cosine
signals. These signals are
There is a Gray code correction
feature for this encoder to
counter any codewheel
imperfectionormisalignment.
This Gray code correction can
be disabled/enabled by the pin
KORR.
Applications
• Rotary application up to 16 bit/
360° absolute position
conditioned to be compensated
for offset and gain errors.
After conditioning they are on
chip interpolated (4 bit) and
computed to an absolute 6 bit
Gray code. Additionally, these
Sin/Cos signals can be tapped
as two true-differential analog
outputs to be used at the
• Rotary application up to 11 bit user
defined code patterns
The gain and offset conditioning
value of the sine and cosine
wave has been on-chip preset
by factory. This will
compensate for mechanical
sensor misalignment error.
• Cost effective solution for direct
integration into OEM systems
system designer’s choice.
Signal-ChannelsA1-A11
InterpolatorforChannelsA0,A09
MSBINV and DOUT Pins
The photocurrent of the photo
diodes is fed into a trans-
impedance amplifier. The
analog output of the amplifier
has a voltage swing of (dark/
light) about 1.3 V. Every
output is transformed by
precision comparators into
digital signals (D1-D11). The
threshold is at VDD/2
The interpolator generates the
digital signals D0,D09 and D-1
to D-4. The interpolated
signals D-1 to D-4 extend the
12 bit Gray code of the signals
D11….D0 to form a 16 bit Gray
code.
The serial interface consists of
a shift register. The most
significant bit, MSB (D11) will
always be sent first to DOUT.
The MSB can be inverted
(change code direction) by
using pin MSBINV.
D0 and D09 are digitized from
A0 and A09. The channels A0-
A11 and A09 have very high
dynamic bandwidth, which
allows a real time monotone 12
bit Gray code at 12000 RPM.
DIN and NSL Pins
The Serial input DIN allows
the configuration as ring
register for multiple
transmissions or for cascading
2 or more encoders. DIN is
the input of the shift register
that shifts the data to DOUT.
(=Analog-reference),regulated
by the monitor channel.
Monitor Channel with LED Control at
PinsLEDRandLERR
The interpolated 16 bit Gray
code can be used up to 1000
RPM only. At more than 1000
RPM, only the 12 bit Gray code
from the MSB side can be
used.
The analog output signal of the
monitor channel is regulated
by the LED current. An
internal bipolar transistor sets
this level to VDD/2 (control
voltage at pin LEDR). Thus
the signal swing of each output
is symmetrical to VDD/2
The NSL pin controls the shift
register, to switch it between
load (1) or shift (0) mode.
Under load mode, DOUT will
give the logic of the MSB, i.e.,
D11.
LSBGrayCodeCorrection(PinKORR)
This function block
(=Analog-reference)
synchronizes the switching
points for the 11 bit gray code
of the digital signals D1 to D11
with D0 and D09 (digitized
signal of A0 and A09).
Under shift mode (0), coupled
with the SCL, the register will
be clocked, and gives out the
serial word output bit by bit.
As the clock frequency can be
up to 16 MHz, the
The error bit at pin LERR is
triggered if the Ve of the
internal bipolar transistor is
larger than VDD/2.
This Gray code correction only
works for the 12 bit MSB(4096
steps per revolution).
Signals Channels A0, A09 with Signal
ConditioningandSelfCalibration
transmission of the full 16 bit
word can be done within 1µs.
These two channels give out a
sine and cosine wave which
are 90 deg phase shifted.
These signals have amplitudes
which are almost constant due
to the LED current monitoring.
Due to amplifier mismatch the
signals do have gain and offset
errors. These errors are
eliminated by an adaptive
signal conditioning circuitry.
The conditioning values are
on-chip preprogrammed by
factory. The analog output
signals of A0 and A09 are
supplied as true-differential
voltage with a peak to peak
value of 2.0 V at the pins
A09P, A09N, A0P, A0N.
Valid data of DOUT should be
read when the SCL clock is
low. Please refer to timing
diagram (Figure 2).
It does not work for the 4
excess interpolated bits of the
16 bit Gray code.
When some special applications
require code patterns other
than Gray code, the Gray code
correction can be disabled by
putting pin KORR = 0. When
that happens just the 11 data
bits (D1…D11) will be sent 1:1
to the DOUT serial output.
Gray code correction can be
switched on or off by putting
the pin KORR =1 (on) or =0
(off).
2
Pinout Description
No. Pin Name
[1]
Description
Function
Notes
1
2
3
4
NC
InternallyconnectedtocathodeofLED
1 = Gray Code Correction Active
Do not use
Do not use
KORR
PROBE_ON
PCL
Digital-input
Digital-Input
CMOS, internal pu
CMOS, internal pd
CMOS, internalpu
DigitalInput
PositiveEdge
Do not use
5
STCAL
DigitalInput
Positiveedge
Negativeedge
Tobeground
CMOS, internal pd
6
7
8
9
MSBINV
DIN
Digital-Input
DigitalInput
Digital-Input
1 = MSB inverted
CMOS, internal pd
CMOS, internal pd
CMOS, internal pu
CMOS, internal pu
Shift Register input. Used for cascading only
Shift-register Shift (=0) / Load (=1) Control
Shift-register Shift Clock
NSL
SCL
Digital-Input
PositiveEdge
10 DOUT
11 DO
DigitalOutput
Shift-Register Data Out (MSB first)
DO signal
CMOS, 2 mA
CMOS, 2 mA
CMOS, 2 mA
DigitalOutput
12 DPROBE
13 VDD
14 GND
15 A09P
16 GND
17 A0P
DigitalOutput
DO9 signal
SupplyVoltage
Gndforsupplyvoltage
Analogoutput
+5 V Supply Digital
GND for 5 V supply analog/digital
A09 positive (+True diff.)
GND for 5 V supply analog/digital
A0 positive (+True diff.)
A09 negative (–True diff.)
+5VSupplyAnalog
CMOS, analogout
Gndforsupplyvoltage
AnalogOutput
Analogoutput
CMOS, analogout
CMOS, analogout
18 A09N
19 VDDA
20 A0N
SupplyVoltage
AnalogOutput
DigitalOutput
A0 negative (–True diff.)
IR-LED Current Limit Signal
Do not use
CMOS, analogout
CMOS, 2 mA
21
LERR
22 LEDR
AnalogOutput
CMOS, analogout
Note:
1. Internal pu/pd = internal pull-up (typ. 50 µA)/ pull-down (typ. 10 µA) CMOS-transistor-Rs.
Pinout Configuration
ESD WARNING: HANDLING PRECAUTIONS SHOULD BE TAKEN TO AVOID STATIC DISCHARGE
3
Using the AEAS-7000
(C's optional)
VDD
0R to 2R VCC (+5V)
GND
VCC
A09P_APR
VDD
min 2µ2
Tantal
A09N_AREF
GND
D09
A0P_A0
DPROBE
A0N_MON
D0
DOUT
D0
DOUT
SCL
VDDA
GND
VDD
10R
SCL
NSL
DIN
NSL
min 100µ
Tantal
DIN
MSBINV
MSBINV
LEDR
STCAL
PCL
STCAL
PCL
LERR
PROBE_ON
KORR
PROBE_ON
KORR
LERR
Figure 1. Schematic using AEAS-7000.
Note: The RC-filter combination,
LEDR, do not connect to this
pin.
The rate of the 16 bit Gray
code serial transfer rate is
dependent on the SCL clock
frequency. The faster the
clock, the faster the transfer
rate. The maximum clock rate
the AEAS-7000 can take is 16
MHz, which means the entire
16 bit Gray code can be
serially transferred out in 1
µs.
especially on VDDA, is used to filter
spikes and transients and is strongly
recommended. It is advised that the
tantalum caps be put as close to the
VDD and VDDA pins as possible.
LERR will be high when the
light output of the emitter is
low. This is an indicator when
light intensity is at a critical
stage affecting the performance
of the encoder. It is caused by
contamination of the codewheel
or LED degradation.
It is recommended to ground
the PROBE_ON pin during
normal operation.
Leave PCL unconnected.
Operation
A09N and A0N are the negative
cosine and sine waves, the
negative versions of A09P and
A0P.
3)Whenever NSL is high, the
DOUT will have the logic of
the MSB D11. After NSL goes
low, the number of bits being
trans-ferred out will depend
on the number of clock pulses
given to SCL. The default is
16 clock pulses for the 16 bit
Gray code. If for other
1) After powering up the unit
using V =+5 V and
CC
connecting GND to ground,
trigger input pins NSL and
SCL using the timing
diagram below (Figure 2).
NSL is a control pin for the
internal shift register. When
triggered to low and
combined with clock pulses,
the serial Gray code will be
shifted out to DOUT bit by
bit per every clock pulse
D0 is used to check the D0
signal. D0 is the digitized signal
of A0. DPROBE is used to check
D09, the digitized signal of A09.
Recommended to be used for
testing purpose only.
application where another
number other than 16 is
needed, just supply the
corresponding number of clock
pulses to the SCL, e.g., 12 bit,
13 bit, 14 bit or 15 bit, and
you will get the corresponding
length of Gray code words
with the corresponding
KORR is for Gray Code
correction for 12 bits resolution
only.
MSBINV is for user to change
between counting up and
counting down for a given
rotating direction. MSB(D11)
will always be sent out to
DOUT first.
2) The 16 bit serial gray code
can then be tapped out from
the pin DOUT, most
significant bit (D11) first.
resolution.
4
LAPSE TIME
BETWEEN WORDS,
SET BY NSL
1 FRAME = 16 BITS
NSL
SCL
1
2
14
15
16
DOUT
D11
D10
D-3
D-4
D11
(SERIAL)
Note: VALID DATA IS WHEN NSL IS LOW
Figure2. Timingdiagram.
Absolute Limits
No.
1
Parameters
Symbol
VD
Min.
–0.3
–0.3
–25
Typ.
Max.
6.0
Units
V
SupplyVoltage
2
Voltages at all Input and Output Pins
OperatingTemperature
StorageTemperature
Vin , Vout
VD + 0.3
+85
V
3
T
°C
A
S
4
T
–40
+100
°C
Operating Conditions
No.
1
Parameters
Symbol
Min.
4.5
Typ.
5
Max
5.5
Units
V
SupplyVoltage
OperatingTemperature
Input-H-Level
VD
2
T
A
–25
25
+85
°C
V
3
Vih
Vil
0.7*VD
0
VD
4
Input-L-Level
0.3*VD
V
5
Electrical Characteristics (VD = 4.5 to 5 V, T = –40 to +85 °C)
A
No.
OperatingCurrents
TotalCurrent
Digital Inputs
Parameters
Symbol
Conditions
Min.
Typ.
Max.
Units
1
Itotal
25
mA
1
2
PullDownCurrent
Pull Up Current
Ipd
Ipu
–20
30
–5
µA
µA
160
Digital Outputs
1
2
Ouput-H-Level
Output-L-Level
Voh
Vol
Ioh = 2 mA
Iol = –2 mA
VD - 0.5 V
0
VD
0.5
V
V
SerialInterface
1
2
3
SCLClockFrequency
fclock
16
MHz
ns
Duty Cycle Fclock
Accuracy (1)
T clock,LH
Fclock = 16 MHz 0.4
0.6
Fclock = 5MHz,
RPM = 80
±2bits
Analog-Signal-Conditioning–SignaltracksA0P,A0N,A09P,A09N
1.
SignalFrequencyA0,A09
Fsine,cos
0
250
KHz
Note1:
Accuracywouldbeinfluencedbyinstallationcontrolandthebearingandshafttypebeingused.
TestconditionstodetermineAccuracy
1) 80 RPM
o
2) 25 C, room temperature
3) At nominal radial, tangential and gap position
4) On dual preloaded bearing with absolute assembly concentricity of not exceedding 10 microns
5) SCL frequency of 5MHz
6) Both VDD & VDDA filter capacitor placed not more than 20mm from header pins
7)Testedforonerevolution
MountingConsideration
24.0
12.0
Readhead
Ø42.1
Code Disc
Ø8.02 H6
2x11 -1.27mm pitch pin header
35.1
UNLESS SPECIFIED OTHERWISE
DIMENSIONS ARE IN MILLIMETRES
THIRD ANGLE PROJECTION
XX.
XX.X
XX.XX
0.3
0.1
0.03
STRIKE OUT
OR FILL IN
AS NEEDED
Note:
Codewheelmountingtolerancesforradial, tangentialandZgapare:
Radial:
50um
40um
50 um
Tangential:
Z Gap:
Plug & Play Hub-Shaft design
OrderingInformation
The following details the design of the
hub-shaftofwhichthedimensions
must be strictly followed for the plug &
play feature of the AEAS-7000 to work.
In order to secure the code disk to the
hub, an adhesive must be utilised.
AgilentrecommendsusingDELO-
DUOPOX, 1895 from DELO. Stainless
steel is recommended as the hub-shaft
material.
0
- 7000 - 1 G S
AEA
A complete instruction for AEAS-7000
Plug&Playinstallationconsideration
canbefoundinAEAS-7000application
note.
D - 13 bits
G - 16 bits
S - Standard
(-25°C to +85°C)
Legend
1 = 5V
G = gray code
S = serial output mode
58
0.8 depth as adhesive reservoir
2
Ø16
Ø15
0.01
20
Motor end is user
specified
Ø11
12
+0.03
-0
4.2
0.01 A
0.02
A
Straightness
Ø0.01
Flatness
Perpendicularity
Total Run-out
0.01 A
0.02
www.agilent.com/semiconductors
For product information and a complete list of
distributors, please go to our web site.
For technical assistance call:
Americas/Canada: +1 (800) 235-0312 or
(916) 788-6763
Europe: +49 (0) 6441 92460
China: 10800 650 0017
Hong Kong: (+65) 6756 2394
India, Australia, New Zealand: (+65) 6755 1939
Japan: (+81 3) 3335-8152 (Domestic/Interna-
tional), or 0120-61-1280 (Domestic Only)
Korea: (+65) 6755 1989
Singapore, Malaysia, Vietnam, Thailand,
Philippines, Indonesia: (+65) 6755 2044
Taiwan: (+65) 6755 1843
Data subject to change.
Copyright © 2004 Agilent Technologies, Inc.
February 23, 2004
5988-9627EN
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