OP282_04 [ADI]
Dual/Quad Low Power, High Speed JFET Operational Amplifiers; 双/四通道，低功耗，高速JFET运算放大器
| 型号： | OP282_04 |
| 厂家： | 
ADI |
| 描述： | Dual/Quad Low Power, High Speed JFET Operational Amplifiers |
| 文件： | 总16页 (文件大小：428K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Dual/Quad Low Power, High Speed
JFET Operational Amplifiers
OP282/OP482
FEATURES
High slew rate: 9 V/µs
PIN CONNECTIONS
V+
OUT A
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
Wide bandwidth: 4 MHz
Low supply current: 250 µA/amplifier max
Low offset voltage: 3 mV max
Low bias current: 100 pA max
Fast settling time
OUT B
–IN B
OP282
+IN B
Figure 1. 8-Lead Narrow-Body SOIC (S-Suffix) [R-8]
Common-mode range includes V+
Unity-gain stable
OUT A
–IN A
+IN A
V–
1
2
3
4
8
7
6
5
V+
APPLICATIONS
Active filters
Fast amplifiers
OP282
OUT B
–IN B
+IN B
TOP VIEW
(Not to Scale)
Integrators
Supply current monitoring
Figure 2. 8-Lead MSOP [RM-8]
1
2
3
4
5
6
7
14 OUT D
GENERAL DESCRIPTION
OUT A
–IN A
+IN A
V+
–IN D
+IN D
13
12
– +
+ –
The OP282/OP482 dual and quad operational amplifiers feature
excellent speed at exceptionally low supply currents. The slew
rate is typically 9 V/µs with a supply current under 250 µA per
amplifier. These unity-gain stable amplifiers have a typical gain
bandwidth of 4 MHz.
OP482
11 V–
+IN C
+IN B
10
9
– +
+ –
–IN C
–IN B
OUT B
OUT C
8
The JFET input stage of the OP282/OP482 ensures bias current
is typically a few picoamps and below 500 pA over the full
temperature range. Offset voltage is under 3 mV for the dual
and under 4 mV for the quad.
Figure 3. 14-Lead PDIP (P-Suffix) [N-14]
OUT A
–IN A
+IN A
V+
OUT D
–IN D
+IN D
1
2
3
4
5
6
7
14
13
12
11
10
9
With a wide output swing, within 1.5 V of each supply, low
power consumption, and high slew rate, the OP282/OP482
are ideal for battery-powered systems or power restricted
applications. An input common-mode range that includes the
positive supply makes the OP282/OP482 an excellent choice for
high-side signal conditioning.
OP482
V–
+IN C
+IN B
–IN B
OUT B
–IN C
OUT C
8
The OP282/OP482 are specified over the extended industrial
temperature range. The OP282 is available in the standard
8-lead narrow SOIC and MSOP packages. The OP482 is
available in PDIP and narrow SOIC packages.
Figure 4. 14-Lead Narrow-Body SOIC (S-Suffix) [R-14]
Rev. F
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
OP282/OP482
TABLE OF CONTENTS
Specifications..................................................................................... 3
High-Side Signal Conditioning ................................................ 12
Phase Inversion........................................................................... 12
Active Filters ............................................................................... 12
Programmable State-Variable Filter......................................... 13
Outline Dimensions....................................................................... 14
Ordering Guide .......................................................................... 16
Electrical Characteristics............................................................. 3
Absolute Maximum Ratings............................................................ 4
ESD Caution.................................................................................. 4
Typical Performance Characteristics ............................................. 5
Applications Information .............................................................. 12
REVISION HISTORY
10/04—Data Sheet Changed from Rev. E to Rev. F
10/02—Data Sheet Changed from Rev. D to Rev. E
Deleted 8-Lead PDIP .........................................................Universal
Added 8-Lead MSOP .........................................................Universal
Changes to Format and Layout.........................................Universal
Changes to Features.......................................................................... 1
Changes to Pin Configurations....................................................... 1
Changes to General Description .................................................... 1
Changes to Specifications................................................................ 3
Changes to Absolute Maximum Ratings ....................................... 4
Changes to Table 3............................................................................ 4
Added Figure 5 through Figure 20; Renumbered
Successive Figures............................................................................. 5
Updated Figure 21 and Figure 22 ................................................... 7
Updated Figure 23 and Figure 27 ................................................... 8
Updated Figure 29 ............................................................................ 9
Updated Figure 35 and Figure 36 ................................................. 10
Updated Figure 43 .......................................................................... 11
Changes to Applications Information.......................................... 12
Changes to Figure 44...................................................................... 12
Deleted OP282/OP482 Spice Macro Model Section.................... 9
Deleted Figure 4................................................................................ 9
Deleted OP282 Spice Marco Model ............................................. 10
Updated Outline Dimensions....................................................... 14
Changes to Ordering Guide .......................................................... 14
Edits to 8-Lead Epoxy DIP (P-Suffix) Pin......................................1
Edits to Ordering Guide ...................................................................3
Edits to Outline Dimensions......................................................... 11
9/02—Data Sheet Changed from Rev. C to Rev. D
Edits to 14-Lead SOIC (S-Suffix) Pin .............................................1
Replaced 8-Lead SOIC (S-Suffix)................................................. 11
4/02—Data Sheet changed from Rev. B to Rev. C
Wafer Test Limits Deleted ................................................................2
Edits to Absolute Maximum Ratings ..............................................3
Dice Characteristics Deleted............................................................3
Edits to Ordering Guide ...................................................................3
Edits to Figure 1.................................................................................7
Edits to Figure 3.................................................................................8
20-Position Chip Carrier (RC Suffix) Deleted ........................... 11
Rev. F | Page 2 of 16
OP282/OP482
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
At VS = 15.0 V, TA = 25°C, unless otherwise noted; applies to both A and G grade.
Table 1.
Parameter
Symbol
Conditions
Min
Typ
0.2
0.2
3
Max
Unit
INPUT CHARACTERISTICS
Offset Voltage
VOS
VOS
IB
OP282
3
4.5
4
mV
mV
mV
mV
pA
pA
pA
pA
V
OP282, −40°C ≤ TA ≤ +85°C
OP482
OP482, −40°C ≤ TA ≤ +85°C
VCM = 0 V
VCM = 0 V1
6
Input Bias Current
100
500
50
250
+15
Input Offset Current
IOS
VCM = 0 V
VCM = 0 V1
1
Input Voltage Range
Common-Mode Rejection Ratio
Large Signal Voltage Gain
−11
70
20
CMRR
AVO
−11 V ≤ VCM ≤ +15 V, −40°C ≤ TA ≤ +85°C
RL = 10 kΩ
RL = 10 kΩ, −40°C ≤ TA ≤ +85°C
90
dB
V/mV
V/mV
µV/°C
pA/°C
15
Offset Voltage Drift
Bias Current Drift
∆VOS/∆T
∆IB/∆T
10
8
OUTPUT CHARACTERISTICS
Output Voltage High
Output Voltage Low
Short-Circuit Limit
VOH
VOL
ISC
RL = 10 kΩ
RL = 10 kΩ
Source
Sink
f = 1 MHz
+13.5
3
+13.9
−13.9
10
−12
200
V
V
mA
mA
Ω
−13.5
−8
Open-Loop Output Impedance
POWER SUPPLY
ZOUT
Power Supply Rejection Ratio
Supply Current/Amplifier
Supply Voltage Range
DYNAMIC PERFORMANCE
Slew Rate
Full-Power Bandwidth
Settling Time
Gain Bandwidth Product
Phase Margin
PSRR
ISY
VS
VS = 4.5 V to 18 V, −40°C ≤ TA ≤ +85°C
VO = 0 V, −40°C ≤ TA ≤ 85°C
25
210
316
250
18
µV/V
µA
V
4.5
7
SR
BWP
tS
GBP
ØO
RL = 10 kΩ
1% distortion
To 0.01%
9
V/µs
kHz
µs
MHz
Degrees
125
1.6
4
55
NOISE PERFORMANCE
Voltage Noise
Voltage Noise Density
Current Noise Density
en p-p
en
in
0.1 Hz to 10 Hz
f = 1 kHz
1.3
36
µV p-p
nV/√Hz
pA/√Hz
0.01
1 The input bias and offset currents are characterized at TA = TJ = 85°C. Bias and offset currents are guaranteed but not tested at −40°C.
Rev. F | Page 3 of 16
OP282/OP482
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameters
Ratings
18 V
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Supply Voltage
Input Voltage
18 V
36 V
Indefinite
Differential Input Voltage1
Output Short-Circuit Duration
Storage Temperature Range
P-Suffix (N), S-Suffix (R), RM Packages
Operating Temperature Range
OP282G, OP282A, OP482G
Junction Temperature Range
P-Suffix (N), S-Suffix (R), RM Packages
Lead Temperature Range (Soldering 60 sec)
−65°C to +150°C
−40°C to +85°C
Table 3.
Package Type
−65°C to +150°C
300°C
1
θJA
θJC
44
56
39
36
Unit
°C/W
°C/W
°C/W
°C/W
8-Lead MSOP [RM]
206
157
83
8-Lead SOIC (S-Suffix) [R]
14-Lead PDIP (P-Suffix) [N]
14-Lead SOIC (S-Suffix) [R]
1 For supply voltages less than 18 V, the absolute maximum input voltage is
equal to the supply voltage.
104
1 θJA is specified for the worst-case conditions; i.e., θJA is specified for device in
socket for CERDIP, PDIP; θJA is specified for device soldered in circuit board
for SOIC or MSOP package.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate
on the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. F | Page 4 of 16
OP282/OP482
TYPICAL PERFORMANCE CHARACTERISTICS
80
70
60
180
135
90
V
T
= ±15V
= 25°C
V
= ±15V
T = 25°C
A
S
S
A
60
50
A
A
= 100
VCL
40
40
30
= 10
VCL
20
45
20
10
A
= 1
VCL
0
0
0
–10
–20
–30
–20
–40
–45
–90
1k
10k
100k
1M
10M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 5. OP282 Open-Loop Gain and Phase vs. Frequency
Figure 8. OP282 Closed-Loop Gain vs. Frequency
45
40
35
30
25
20
15
10
5
30
25
20
15
10
5
V
R
= ±15V
= 10kΩ
V
R
C
= ±15V
= 10kΩ
= 50pF
S
S
L
L
L
–SR
+SR
0
–75
0
–75
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 9. OP282 Slew Rate vs. Temperature
Figure 6. OP282 Open-Loop Gain vs. Temperature
80
70
60
50
40
30
20
10
0
1000
100
10
V
R
V
A
= ±15V
= 2kΩ
V
V
= ±15V
S
S
= 0V
L
CM
= 100mV p-p
IN
= 1
VCL
T
= 25°C
A
+OS
–OS
1
0.1
–75
0
100
200
300
400
500
–50
–25
0
25
50
75
100
125
LOAD CAPACITANCE (pF)
TEMPERATURE (°C)
Figure 7. OP282 Small Signal Overshoot vs. Load Capacitance
Figure 10. OP282 Input Bias Current vs. Temperature
Rev. F | Page 5 of 16
OP282/OP482
1000
20
15
T
R
= 25°C
= 10kΩ
V
T
= ±15V
= 25°C
A
S
L
A
V
OH
10
100
10
5
0
–5
–10
–15
–20
V
OL
1
10
0
±5
±10
SUPPLY VOLTAGE (V)
±15
±20
100
FREQUENCY (Hz)
1k
10k
Figure 11. OP282 Voltage Noise Density vs. Frequency
Figure 14. OP282 Output Voltage Swing vs. Supply Voltage
1000
100
10
1000
100
10
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
S
A
A
A
= 100
VCL
VCL
A
= 10
= 1
1
1
A
VCL
0.1
0.1
100
–15
–10
–5
0
5
10
15
1k
10k
100k
1M
COMMON-MODE VOLTAGE (V)
FREQUENCY (Hz)
Figure 12. OP282 Input Bias Current vs. Common-Mode Voltage
Figure 15. OP282 Closed-Loop Output Impedance vs. Frequency
480
480
T
= 25°C
A
475
470
465
460
455
450
475
470
465
460
455
450
0
±5
±10
±15
±20
–50
–25
0
25
50
75
100
125
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
Figure 13. OP282 Supply Current vs. Supply Voltage
Figure 16. OP282 Supply Current vs. Temperature
Rev. F | Page 6 of 16
OP282/OP482
16
14
12
10
8
30
25
20
15
10
5
V
T
= ±15V
= 25°C
V
T
R
= ±15V
= 25°C
= 10kΩ
= 1
S
S
A
A
L
V
A
OL
V
VCL
OH
6
4
2
0
100
0
100
1k
LOAD RESISTANCE (
10k
1k
10k
100k
1M
Ω
)
FREQUENCY (Hz)
Figure 20. OP282 Maximum Output Swing vs. Frequency
Figure 17. OP282 Absolute Output Voltage vs. Load Resistance
140
140
V
T
= ±15V
= 25°C
A
V
T
= ±15V
= 25°C
S
S
120
100
80
A
120
100
80
+PSRR
60
60
40
40
20
20
–PSRR
0
0
–20
–40
–60
–20
–40
–60
100
1k
10k
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21. OP282 CMRR vs. Frequency
Figure 18. OP282 PSRR vs. Frequency
14
200
160
120
80
V
= ±15V
= 25°C
S
V
= ±15V
S
T
A
12
10
8
300 × OP282
(600 OP AMPS)
SINK
SOURCE
6
4
40
2
0
–50
0
–25
0
25
50
75
100
125
–2000
–1200
–400
0
400
(µV)
1200
2000
TEMPERATURE (°C)
V
OS
Figure 19. OP282 Short-Circuit Current vs. Temperature
Figure 22. OP282 VOS Distribution SOIC Package
Rev. F | Page 7 of 16
OP282/OP482
70
60
50
40
30
20
10
0
400
360
320
280
240
200
160
120
80
A
= 1
V
= ±15V
VCL
S
V
R
= ±15V
= 2kΩ
= 100mV p-p
S
NEGATIVE EDGE
300 × OP282
(600 OP AMPS)
L
V
IN
A
= 1
VCL
POSITIVE EDGE
40
0
0
4
8
12
16
20
24
28
32
36
300
LOAD CAPACITANCE (pF)
0
100
200
400
500
TCV (µV/°C)
OS
Figure 26. OP482 Small Signal Overshoot vs. Load Capacitance
Figure 23. OP282 TCVOS Distribution SOIC Package
80
60
40
20
0
0
60
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
S
A
A
50
40
A
= 100
= 10
= 1
45
VCL
30
90
A
VCL
20
135
180
10
A
VCL
0
–10
–20
1k
10k
100k
1M
10M
100M
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 24. OP482 Open-Loop Gain, Phase vs. Frequency
Figure 27. OP482 Closed-Loop Gain vs. Frequency
35
25
20
15
10
5
V
R
= ±15V
= 10kΩ
–SR
S
L
30
25
20
15
10
5
V
R
C
= ±15V
= 10kΩ
= 50pF
S
L
L
+SR
0
–75
0
–75
–50
–25
0
25
50
75
100
125
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 25. OP482 Open-Loop Gain (V/mV)
Figure 28. OP482 Slew Rate vs. Temperature
Rev. F | Page 8 of 16
OP282/OP482
1000
100
10
1000
100
10
V
T
= ±15V
= 25°C
V
V
= ±15V
= 0V
S
S
A
CM
1.0
1
0.1
0.1
0
–50
–25
0
25
50
75
100
125
–15
–10
–5
0
5
10
15
TEMPERATURE (°C)
COMMON-MODE VOLTAGE (V)
Figure 29. OP482 Input Bias Current vs. Temperature
Figure 32. OP482 Input Bias Current vs. Common-Mode Voltage
60
5.0
4.5
4.0
3.5
3.0
1.15
V
R
= ±15V
= 10kΩ
T
= 25°C
S
A
L
1.10
1.05
1.00
0.95
0.90
0.85
55
50
45
40
GBW
–75
–50
–25
0
25
50
75
100
125
0
±5
±10
±15
±20
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
Figure 30. OP482 Phase Margin and Gain Bandwidth Product vs. Temperature
Figure 33. OP482 Relative Supply Current vs. Supply Voltage
80
20
15
V
T
= ±15V
= 25°C
R
T
= 10kΩ
= 25°C
S
L
A
A
70
60
50
40
30
20
10
0
10
5
0
–5
–10
–15
–20
10
100
FREQUENCY (Hz)
1k
10k
0
±5
±10
±15
±20
SUPPLY VOLTAGE (V)
Figure 31. OP482 Voltage Noise Density vs. Frequency
Figure 34. OP482 Output Voltage Swing vs. Supply Voltage
Rev. F | Page 9 of 16
OP282/OP482
600
500
400
300
200
100
100
80
60
40
20
0
V
T
= ±15V
= 25°C
V = ±15V
S
V = 100mV
S
+PSRR
–PSRR
∆
A
T
= 25°C
A
A
= 100
VCL
A
= 10
VCL
A
= 1
VCL
20
0
100
1k
10k
FREQUENCY (Hz)
100k
1M
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 35. OP482 Closed-Loop Output Impedance vs. Frequency
Figure 38. OP482 Power Supply Rejection Ratio (PSRR) vs. Frequency
1.20
20
V
= ±15V
V
= ±15V
S
S
SINK
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
15
10
5
SOURCE
0
–75
–50
–25
0
25
50
75
100
125
–75
–50
–25
0
25
50
75
100
125
TEMPERATURE (°C)
TEMPERATURE (°C)
Figure 36. OP482 Relative Supply Current vs. Temperature
Figure 39. OP482 Short-Circuit Current vs. Temperature
30
25
20
15
10
5
16
14
12
10
8
V
T
A
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
S
A
A
= 1
VCL
= 10kΩ
R
L
POSITIVE
SWING
NEGATIVE
SWING
6
4
2
0
100
0
10K
100K
1M
1K
1k
10k
FREQUENCY (Hz)
LOAD RESISTANCE (Ω)
Figure 40. OP482 Maximum Output Swing vs. Frequency
Figure 37. OP482 Maximum Output Voltage vs. Load Resistance
Rev. F | Page 10 of 16
OP282/OP482
100
80
60
40
20
0
320
280
240
200
160
120
80
V
= ±15V
= 25°C
S
40
T
A
V
= 100mV
CM
0
–20
100
1k
10k
100k
1M
0
4
8
12
16
20
24
28
32
FREQUENCY (Hz)
TCV (µV/°C)
OS
Figure 41. OP482 Common-Mode Rejection Ratio (CMRR) vs. Frequency
Figure 43. OP482 TCVOS Distribution P Package
700
V
= ±15V
= 25°C
S
T
A
300 × OP482
(1200 OP AMPS)
600
500
400
300
200
100
0
–2000 –1600 –1200 –800 –400
0
400 800 1200 1600 2000
V
(µV)
OS
Figure 42. OP482 VOS Distribution P Package
Rev. F | Page 11 of 16
OP282/OP482
APPLICATIONS INFORMATION
The OP282 and OP482 are dual and quad JFET op amps that
are optimized for high speed at low power. This combination
makes these amplifiers excellent choices for battery-powered or
low power applications that require above average performance.
Applications benefiting from this performance combination
include telecommunications, geophysical exploration, portable
medical equipment, and navigational instrumentation.
PHASE INVERSION
Most JFET-input amplifiers invert the phase of the input signal
if either input exceeds the input common-mode range. For the
OP282/OP482, negative signals in excess of approximately 14 V
cause phase inversion. The cause of this effect is saturation of
the input stage leading to the forward-biasing of a drain-gate
diode. A simple fix for this in noninverting applications is to
place a resistor in series with the noninverting input. This limits
the amount of current through the forward-biased diode and
prevents the shutting down of the output stage. For the
OP282/OP482, a value of 200 kΩ has been found to work;
however, this adds a significant amount of noise.
HIGH-SIDE SIGNAL CONDITIONING
There are many applications that require the sensing of signals
near the positive rail. OP282s and OP482s were tested and are
guaranteed over a common-mode range (−11 V ≤ VCM ≤ +15 V)
that includes the positive supply.
15
10
5
One application where this is commonly used is in the sensing
of power supply currents. This enables it to be used in current
sensing applications, such as the partial circuit shown in Figure 44.
In this circuit, the voltage drop across a low value resistor, such
as the 0.1 Ω shown here, is amplified and compared to 7.5 V.
The output can then be used for current limiting.
0
15V
0.1Ω
–
5
500k
Ω
100k
Ω
R
L
–
–
10
100k
Ω
15
–15
1/2
OP282
–10
–5
0
5
10
15
V
IN
Figure 45. OP282 Phase Reversal
500k
Ω
ACTIVE FILTERS
Figure 44. High-Side Signal Conditioning
The wide bandwidth and high slew rates of the OP282/OP482
make either an excellent choice for many filter applications.
There are many active filter configurations, but the four most
popular configurations are Butterworth, Elliptical, Bessel, and
Chebyshev. Each type has a response that is optimized for a
given characteristic as shown in Table 4.
Table 4.
Type
Selectivity
Moderate
Good
Best
Poor
Overshoot
Phase
Amplitude (Pass Band)
Maximum Flat
Equal Ripple
Amplitude (Stop Band)
Butterworth
Chebyshev
Elliptical
Good
Moderate
Poor
Nonlinear
Linear
Equal Ripple
Equal Ripple
Bessel (Thompson)
Best
Rev. F | Page 12 of 16
OP282/OP482
PROGRAMMABLE STATE-VARIABLE FILTER
The circuit shown in Figure 46 can be used to accurately
program the Q, the cutoff frequency fC, and gain of a 2-pole
state variable filter. OP482s have been used in this design
because of their high bandwidths, low power, and low noise.
This circuit takes only three packages to build because of the
quad configuration of the op amps and DACs.
1
D1
⎛
⎝
⎞
⎟
⎠
fc =
⎜
2πR1C1 256
where D1 is the digital code for the DAC.
The gain of this circuit is set by adjusting D3. The gain equation is
The DACs shown are used in the voltage mode; therefore, many
values are dependent on the accuracy of the DAC only and not
on the absolute values of the DAC’s resistive ladders. This makes
this circuit unusually accurate for a programmable filter.
R4 D3
⎛
⎞
⎟
⎠
Gain =
⎜
R5 256
⎝
DAC 2 is used to set the Q of the circuit. Adjusting this DAC
controls the amount of feedback from the band-pass node to
the input summing node. Note that the digital value of the
DAC is in the numerator; therefore, zero code is not a valid
operating point.
Adjusting DAC 1 changes the signal amplitude across R1;
therefore, the DAC attenuation times R1 determines the amount
of signal current that charges the integrating capacitor, C1. This
cutoff frequency can now be expressed as
R2 256
⎛
⎞
⎟
⎠
Q =
⎜
R3 D2
⎝
R7
2kΩ
R4
2kΩ
V
IN
C1
1000pF
R5
2kΩ
1/4
1/4
DAC8408
OP482
1/4
C1
1000pF
R1
2kΩ
OP482
1/4
1/4
DAC8408
OP482
1/4
R1
2kΩ
OP482
1/4
1/4
DAC8408
OP482
1/4
OP482
HIGH PASS
LOW
PASS
BAND PASS
R6
2kΩ
R3
2kΩ
R2
2kΩ
1/4
1/4
DAC8408
OP482
1/4
OP482
Figure 46.
Rev. F | Page 13 of 16
OP282/OP482
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
8°
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 47. 8-Lead Standard Small Outline Package [SOIC]
Narrow-Body S-Suffix (R-8)
Dimensions shown in millimeters and (inches)
3.00
BSC
8
1
5
4
4.90
BSC
3.00
BSC
PIN 1
0.65 BSC
1.10 MAX
0.15
0.00
0.80
0.60
0.40
8°
0°
0.38
0.22
0.23
0.08
COPLANARITY
0.10
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 48. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
Rev. F | Page 14 of 16
OP282/OP482
8.75 (0.3445)
8.55 (0.3366)
14
1
8
7
4.00 (0.1575)
3.80 (0.1496)
6.20 (0.2441)
5.80 (0.2283)
1.27 (0.0500)
BSC
0.50 (0.0197)
0.25 (0.0098)
1.75 (0.0689)
1.35 (0.0531)
× 45°
0.25 (0.0098)
0.10 (0.0039)
8°
0°
0.51 (0.0201)
0.31 (0.0122)
SEATING
PLANE
1.27 (0.0500)
0.40 (0.0157)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
COMPLIANT TO JEDEC STANDARDS MS-012AB
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 49. 14-Lead Standard Small Outline Package [SOIC]
Narrow-Body S-Suffix (R-14)
Dimensions shown in millimeters and (inches)
0.685 (17.40)
0.665 (16.89)
0.645 (16.38)
0.285 (7.24)
0.295 (7.49)
0.275 (6.99)
14
1
8
7
0.100 (2.54)
BSC
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.015 (0.38)
MIN
0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
0.180 (4.57)
MAX
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.022 (0.56) 0.060 (1.52)
0.018 (0.46) 0.050 (1.27)
0.014 (0.36) 0.045 (1.14)
COMPLIANT TO JEDEC STANDARDS MO-095-AB
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
Figure 50. 14-Lead Plastic Dual-in-Line Package [PDIP]
P-Suffix (N-14)
Dimension shown in inches and (millimeters)
Rev. F | Page 15 of 16
OP282/OP482
ORDERING GUIDE
Model
OP282ARMZ-R21
OP282ARMZ-REEL1
OP282GS
OP282GS-REEL
OP282GS-REEL7
OP282GSZ1
OP282GSZ-REEL1
OP282GSZ-REEL71
OP482GP
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
8-Lead MSOP
8-Lead MSOP
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
8-Lead SOIC
14-Lead PDIP
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
14-Lead SOIC
Package Option
RM-8
RM-8
Branding
A0B
A0B
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
S-Suffix (R-8)
P-Suffix (N-14)
S-Suffix (R-14)
S-Suffix (R-14)
S-Suffix (R-14)
S-Suffix (R-14)
S-Suffix (R-14)
S-Suffix (R-14)
OP482GS
OP482GS-REEL
OP482GS-REEL7
OP482GSZ1
OP482GSZ-REEL1
OP482GSZ-REEL71
1 Z = Pb-free part.
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C00301–0–10/04(F)
Rev. F | Page 16 of 16
相关型号：
OP283GBC
IC DUAL OP-AMP, 1250 uV OFFSET-MAX, 5 MHz BAND WIDTH, UUC8, 0.063 X 0.092 INCH, DIE-8, Operational Amplifier
ADI
©2020 ICPDF网 联系我们和版权申明