ADUM1200UR-EP-RL7 [ADI]

Dual-Channel Digital Isolator (2/0 Channel Directionality);
ADUM1200UR-EP-RL7
型号: ADUM1200UR-EP-RL7
厂家: ADI    ADI
描述:

Dual-Channel Digital Isolator (2/0 Channel Directionality)

光电二极管 接口集成电路
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Dual-Channel Digital Isolator  
Data Sheet  
ADuM1200-EP  
FEATURES  
GENERAL DESCRIPTION  
Narrow body, 8-lead SOIC package  
Low power operation  
5 V operation  
The ADuM1200-EP1 is a dual-channel, digital isolator based on  
the Analog Devices, Inc., iCoupler® technology. Combining  
high speed CMOS and monolithic transformer technologies,  
this isolation component provides outstanding performance  
characteristics superior to alternatives, such as optocouplers.  
1.1 mA per channel maximum at 0 Mbps to 2 Mbps  
3.7 mA per channel maximum at 10 Mbps  
8.2 mA per channel maximum at 25 Mbps  
3 V operation  
0.8 mA per channel maximum at 0 Mbps to 2 Mbps  
2.2 mA per channel maximum at 10 Mbps  
4.8 mA per channel maximum at 25 Mbps  
Precise timing characteristics  
High common-mode transient immunity: >25 kV/µs  
Safety and regulatory approvals  
UL recognition  
2500 V rms for 1 minute per UL 1577  
CSA Component Acceptance Notice #5A  
VDE Certificate of Conformity  
By avoiding the use of LEDs and photodiodes, iCoupler devices  
remove the design difficulties commonly associated with opto-  
couplers. The typical optocoupler concerns regarding uncertain  
current transfer ratios, nonlinear transfer functions, and tem-  
perature and lifetime effects are eliminated with the simple  
iCoupler digital interfaces and stable performance characteristics.  
The need for external drivers and other discrete components is  
eliminated with these iCoupler products. Furthermore, iCoupler  
devices consume one-tenth to one-sixth the power of optocouplers  
at comparable signal data rates.  
The ADuM1200-EP isolator provides two independent isolation  
channels with a supply voltage on either side ranging from 3.0 V  
to 5.5 V. In addition, the ADuM1200-EP provides low pulse width  
distortion and tight channel-to-channel matching. Unlike other  
optocoupler alternatives, the ADuM1200-EP isolator has a  
patented refresh feature that ensures dc correctness in the absence  
of input logic transitions and during power-up/ power-down  
conditions.  
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12  
V
IORM = 560 V peak  
ENHANCED PRODUCT FEATURES  
Supports defense and aerospace applications (AQEC)  
Military temperature range (−55°C to +125°C)  
Controlled manufacturing baseline  
Enhanced product change notification  
Qualification data available on request  
Full details about this enhanced product are available in the  
ADuM1200/ADuM1201 data sheet, which should be consulted  
in conjunction with this data sheet.  
APPLICATIONS  
Size-critical multichannel isolation  
SPI interface/data converter isolation  
RS-232/RS-422/RS-485 transceiver isolation  
Digital field bus isolation  
FUNCTIONAL BLOCK DIAGRAM  
1
2
3
4
8
7
6
5
V
V
V
V
DD1  
DD2  
OA  
OB  
ENCODE  
ENCODE  
DECODE  
DECODE  
V
V
IA  
IB  
GND  
GND  
2
1
Figure 1.  
1 Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.  
Rev. B  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700 ©2010–2014 Analog Devices, Inc. All rights reserved.  
Technical Support  
www.analog.com  
 
 
 
 
 
ADuM1200-EP  
Data Sheet  
TABLE OF CONTENTS  
Features .............................................................................................. 1  
Regulatory Information................................................................8  
Insulation and Safety-Related Specifications.............................8  
Enhanced Product Features ............................................................ 1  
Applications....................................................................................... 1  
General Description......................................................................... 1  
Functional Block Diagram .............................................................. 1  
Revision History ............................................................................... 2  
Specifications..................................................................................... 3  
Electrical Characteristics—5 V operation................................. 3  
Electrical Characteristics—3 V operation................................. 5  
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12  
Insulation Characteristics ............................................................9  
Recommended Operating Conditions .......................................9  
Absolute Maximum Ratings ......................................................... 10  
ESD Caution................................................................................ 10  
Pin Configuration and Function Descriptions........................... 11  
Typical Performance Characteristics ........................................... 12  
Outline Dimensions....................................................................... 13  
Ordering Guide .......................................................................... 13  
Electrical Characteristics—Mixed 5 V/3 V or 3 V/5 V  
Operation....................................................................................... 6  
Package Characteristics ............................................................... 8  
REVISION HISTORY  
2/14—Rev. A to Rev. B  
Changed +105°C to +125°C in Operating Temperature  
Range............................................................................... Throughout  
Changed Minimum VDDx from 2.7 V to 3.0 V........... Throughout  
Changes to Table 6............................................................................ 8  
Changes to Table 7............................................................................ 9  
Changes to Table 10........................................................................ 10  
5/12—Rev. 0 to Rev. A  
Removed RoHS-Compliant from Features Section .................... 1  
Changed ADuM1200WSRZ55 to ADuM1200UR-EP, Table 5... 8  
Changes to Ordering Guide .......................................................... 13  
7/10—Revision 0: Initial Version  
Rev. B | Page 2 of 16  
 
Data Sheet  
ADuM1200-EP  
SPECIFICATIONS  
ELECTRICAL CHARACTERISTICS—5 V OPERATION  
All voltages are relative to their respective ground; 4.5 V ≤ VDD1 ≤ 5.5 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply  
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 5 V.  
Table 1.  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
DC SPECIFICATIONS  
Input Supply Current per  
Channel, Quiescent  
Output Supply Current per  
Channel, Quiescent  
IDDI (Q)  
0.50  
0.19  
0.60  
0.30  
mA  
mA  
IDDO (Q)  
Total Supply Current, Two  
Channels1  
DC to 2 Mbps  
VDD1 Supply Current  
IDD1 (Q)  
IDD2 (Q)  
1.1  
0.5  
1.4  
0.8  
mA  
mA  
DC to 1 MHz logic signal  
frequency  
DC to 1 MHz logic signal  
frequency  
VDD2 Supply Current  
10 Mbps  
VDD1 Supply Current  
VDD2 Supply Current  
25 Mbps  
IDD1 (Q)  
IDD2 (Q)  
4.3  
1.3  
5.5  
2.0  
mA  
mA  
5 MHz logic signal frequency  
5 MHz logic signal frequency  
VDD1 Supply Current  
VDD2 Supply Current  
Input Currents  
IDD1 (Q)  
IDD2 (Q)  
IIA, IIB  
10  
2.8  
+0.01  
13  
3.4  
+10  
mA  
mA  
µA  
V
12.5 MHz logic signal frequency  
12.5 MHz logic signal frequency  
−10  
0.7 (VDD1 or VDD2  
Logic High Input Threshold VIH  
)
Logic Low Input Threshold  
VIL  
0.3 (VDD1 or VDD2  
)
V
Logic High Output  
Voltages  
VOAH, VOBH  
(VDD1 or VDD2) − 0.1 5.0  
V
IOx = −20 µA, VIx = VIxH  
(VDD1 or VDD2) − 0.5  
4.8  
0.0  
0.04  
0.2  
V
V
V
V
IOx = −4 mA, VIx = VIxH  
IOx = 20 µA, VIx = VIxL  
IOx = 400 µA, VIx = VIxL  
IOx = 4 mA, VIx = VIxL  
Logic Low Output Voltages VOAL, VOBL  
0.1  
0.1  
0.4  
SWITCHING SPECIFICATIONS  
Minimum Pulse Width2  
Maximum Data Rate3  
Propagation Delay4  
PW  
20  
50  
40  
ns  
Mbps  
ns  
25  
20  
tPHL, tPLH  
PWD  
45  
3
Pulse Width Distortion,  
ns  
4
|tPLH − tPHL  
|
Propagation Delay Skew5  
tPSK  
tPSKCD/tPSKOD  
15  
3
ns  
ns  
Channel-to-Channel  
Matching6  
Output Rise/Fall Time  
(10% to 90%)  
tR/tF  
2.5  
ns  
Common-Mode Transient  
Immunity  
Logic High Output7  
Logic Low Output7  
Refresh Rate  
|CMH|  
|CML|  
fr  
25  
25  
35  
35  
1.2  
kV/µs  
kV/µs  
Mbps  
VIx = VDD1, VDD2, VCM = 1000 V,  
transient magnitude = 800 V  
VIx = 0 V, VCM = 1000 V,  
transient magnitude = 800 V  
Rev. B | Page 3 of 16  
 
 
 
ADuM1200-EP  
Data Sheet  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Dynamic Supply Current per  
Channel8  
Input  
IDDI (D)  
0.19  
0.05  
mA/  
Mbps  
mA/  
Output  
IDDO (D)  
Mbps  
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present.  
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.  
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.  
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is  
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.  
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output  
load within the recommended operating conditions.  
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of  
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with  
inputs on opposing sides of the isolation barrier.  
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD2. CML is the maximum common-mode voltage slew rate  
that can be sustained while maintaining VOx < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The  
transient magnitude is the range over which the common mode is slewed.  
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate.  
Rev. B | Page 4 of 16  
 
 
 
 
 
 
 
 
Data Sheet  
ADuM1200-EP  
ELECTRICAL CHARACTERISTICS—3 V OPERATION  
All voltages are relative to their respective ground; 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V; all minimum/maximum specifications apply  
over the entire recommended operating range, unless otherwise noted; all typical specifications are at TA = 25°C, VDD1 = VDD2 = 3 V.  
Table 2.  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
DC SPECIFICATIONS  
Input Supply Current per Channel,  
Quiescent  
IDDI (Q)  
0.26  
0.11  
0.35  
0.20  
mA  
mA  
Output Supply Current per Channel,  
Quiescent  
Total Supply Current, Two Channels1  
IDDO (Q)  
DC to 2 Mbps  
VDD1 Supply Current  
VDD2 Supply Current  
10 Mbps  
IDD1 (Q)  
IDD2 (Q)  
0.6  
0.2  
1.0  
0.6  
mA  
mA  
DC to 1 MHz logic signal frequency  
DC to 1 MHz logic signal frequency  
VDD1 Supply Current  
VDD2 Supply Current  
25 Mbps  
IDD1 (Q)  
IDD2 (Q)  
2.2  
0.7  
3.4  
1.1  
mA  
mA  
5 MHz logic signal frequency  
5 MHz logic signal frequency  
VDD1 Supply Current  
VDD2 Supply Current  
Input Currents  
IDD1 (Q)  
IDD2 (Q)  
IIA, IIB  
VIH  
5.2  
7.7  
mA  
mA  
µA  
V
12.5 MHz logic signal frequency  
12.5 MHz logic signal frequency  
1.5  
2.0  
−10  
+0.01  
+10  
Logic High Input Threshold  
Logic Low Input Threshold  
Logic High Output Voltages  
0.7 (VDD1 or VDD2)  
VIL  
0.3 (VDD1 or VDD2  
)
V
VOAH, VOBH  
(VDD1 or VDD2) − 0.1 3.0  
(VDD1 or VDD2) − 0.5 2.8  
0.0  
V
IOx = −20 µA, VIx = VIxH  
IOx = −4 mA, VIx = VIxH  
IOx = 20 µA, VIx = VIxL  
IOx = 400 µA, VIx = VIxL  
IOx = 4 mA, VIx = VIxL  
V
Logic Low Output Voltages  
VOAL, VOBL  
0.1  
0.1  
0.4  
V
0.04  
V
0.2  
V
SWITCHING SPECIFICATIONS  
Minimum Pulse Width2  
Maximum Data Rate3  
PW  
20  
50  
40  
ns  
25  
20  
Mbps  
ns  
Propagation Delay4  
tPHL, tPLH  
PWD  
55  
3
4
Pulse Width Distortion, |tPLH − tPHL  
Propagation Delay Skew5  
Channel-to-Channel Matching6  
Output Rise/Fall Time (10% to 90%)  
Common-Mode Transient Immunity  
Logic High Output7  
|
ns  
tPSK  
16  
3
ns  
tPSKCD/tPSKOD  
tR/tF  
ns  
2.5  
ns  
|CMH|  
|CML|  
fr  
25  
25  
35  
35  
1.1  
kV/µs  
kV/µs  
Mbps  
VIx = VDD1, VDD2, VCM = 1000 V,  
transient magnitude = 800 V  
Logic Low Output7  
VIx = 0 V, VCM = 1000 V,  
transient magnitude = 800 V  
Refresh Rate  
Dynamic Supply Current per Channel8  
Input  
IDDI (D)  
0.10  
0.03  
mA/  
Mbps  
Output  
IDDO (D)  
mA/  
Mbps  
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present.  
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.  
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.  
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is  
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.  
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output  
load within the recommended operating conditions.  
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of  
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with  
inputs on opposing sides of the isolation barrier.  
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD2. CML is the maximum common-mode voltage slew rate  
that can be sustained while maintaining VOx < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The  
transient magnitude is the range over which the common mode is slewed.  
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate.  
Rev. B | Page 5 of 16  
 
 
 
 
ADuM1200-EP  
Data Sheet  
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3 V OR 3 V/5 V OPERATION  
All voltages are relative to their respective ground; 5 V/3 V operation: 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V. 3 V/5 V operation: 3.0 V  
≤ VDD1 ≤ 3.6 V, 4.5 V ≤ VDD2 ≤ 5.5 V; all minimum/maximum specifications apply over the entire recommended operating range, unless  
otherwise noted; all typical specifications are at TA = 25°C, VDD1 = 3.0 V, VDD2 = 5.0 V; or VDD1 = 5.0 V, VDD2 = 3.0 V.  
Table 3.  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
DC SPECIFICATIONS  
Input Supply Current per Channel,  
Quiescent  
IDDI (Q)  
5 V/3 V Operation  
3 V/5 V Operation  
0.50  
0.26  
0.6  
mA  
mA  
0.35  
Output Supply Current per Channel,  
Quiescent  
IDDO (Q)  
5 V/3 V Operation  
3 V/5 V Operation  
Total Supply Current, Two Channels1  
DC to 2 Mbps  
0.11  
0.19  
0.20  
0.25  
mA  
mA  
VDD1 Supply Current  
5 V/3 V Operation  
3 V/5 V Operation  
VDD2 Supply Current  
5 V/3 V Operation  
3 V/5 V Operation  
10 Mbps  
IDD1 (Q)  
1.1  
0.6  
1.4  
1.0  
mA  
mA  
DC to 1 MHz logic signal frequency  
DC to 1 MHz logic signal frequency  
IDD2 (Q)  
0.2  
0.5  
0.6  
0.8  
mA  
mA  
DC to 1 MHz logic signal frequency  
DC to 1 MHz logic signal frequency  
VDD1 Supply Current  
5 V/3 V Operation  
3 V/5 V Operation  
VDD2 Supply Current  
5 V/3 V Operation  
3 V/5 V Operation  
25 Mbps  
IDD1 (Q)  
4.3  
2.2  
5.5  
3.4  
mA  
mA  
5 MHz logic signal frequency  
5 MHz logic signal frequency  
IDD2 (Q)  
0.7  
1.3  
1.1  
2.0  
mA  
mA  
5 MHz logic signal frequency  
5 MHz logic signal frequency  
VDD1 Supply Current  
5 V/3 V Operation  
3 V/5 V Operation  
VDD2 Supply Current  
5 V/3 V Operation  
3 V/5 V Operation  
Input Currents  
IDD1 (Q)  
10  
13  
mA  
mA  
12.5 MHz logic signal frequency  
12.5 MHz logic signal frequency  
5.2  
7.7  
IDD2 (Q)  
1.5  
2.0  
mA  
mA  
µA  
V
12.5 MHz logic signal frequency  
12.5 MHz logic signal frequency  
2.8  
3.4  
IIA ,IIB  
VIH  
−10  
+0.01  
+10  
Logic High Input Threshold  
Logic Low Input Threshold  
Logic High Output Voltages  
0.7 (VDD1 or VDD2)  
VIL  
0.3 (VDD1 or VDD2  
)
V
VOAH, VOBH  
(VDD1 or VDD2) − 0.1 3.0  
(VDD1 or VDD2) − 0.5 2.8  
0.0  
V
IOx = −20 µA, VIx = VIxH  
IOx = −4 mA, VIx = VIxH  
IOx = 20 µA, VIx = VIxL  
IOx = 400 µA, VIx = VIxL  
IOx = 4 mA, VIx = VIxL  
V
Logic Low Output Voltages  
VOAL, VOBL  
0.1  
0.1  
0.4  
V
0.04  
V
0.2  
V
SWITCHING SPECIFICATIONS  
Minimum Pulse Width2  
Maximum Data Rate3  
PW  
20  
50  
40  
ns  
25  
20  
Mbps  
ns  
Propagation Delay4  
tPHL, tPLH  
PWD  
50  
3
4
Pulse Width Distortion, |tPLH − tPHL  
|
ns  
Propagation Delay Skew5  
Channel-to-Channel Matching6  
Output Rise/Fall Time (10% to 90%)  
5 V/3 V Operation  
tPSK  
15  
3
ns  
tPSKCD/tPSKOD  
tR/tF  
ns  
3.0  
2.5  
ns  
ns  
3 V/5 V Operation  
Rev. B | Page 6 of 16  
 
Data Sheet  
ADuM1200-EP  
Parameter  
Symbol  
Min  
Typ  
Max  
Unit  
Test Conditions  
Common-Mode Transient Immunity  
Logic High Output7  
|CMH|  
|CML|  
fr  
25  
25  
35  
35  
kV/µs  
kV/µs  
VIx = VDD1, VDD2, VCM = 1000 V,  
transient magnitude = 800 V  
Logic Low Output7  
VIx = 0 V, VCM = 1000 V,  
transient magnitude = 800 V  
Refresh Rate  
5 V/3 V Operation  
3 V/5 V Operation  
1.2  
1.1  
Mbps  
Mbps  
Input Dynamic Supply Current per  
Channel8  
IDDI (D)  
5 V/3 V Operation  
0.19  
0.10  
mA/  
Mbps  
3 V/5 V Operation  
mA/  
Mbps  
Output Dynamic Supply Current per  
Channel8  
IDDO(D)  
5 V/3 V Operation  
0.03  
0.05  
mA/  
Mbps  
3 V/5 V Operation  
mA/  
Mbps  
1 The supply current values are for both channels combined when running at identical data rates. Output supply current values are specified with no output load present.  
2 The minimum pulse width is the shortest pulse width at which the specified pulse width distortion is guaranteed.  
3 The maximum data rate is the fastest data rate at which the specified pulse width distortion is guaranteed.  
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is  
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.  
5 tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH that is measured between units at the same operating temperature, supply voltages, and output  
load within the recommended operating conditions.  
6 Codirectional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of  
the isolation barrier. Opposing directional channel-to-channel matching is the absolute value of the difference in propagation delays between any two channels with  
inputs on opposing sides of the isolation barrier.  
7 CMH is the maximum common-mode voltage slew rate that can be sustained while maintaining VOx > 0.8 VDD2. CML is the maximum common-mode voltage slew rate  
that can be sustained while maintaining VOx < 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode voltage edges. The  
transient magnitude is the range over which the common mode is slewed.  
8 Dynamic supply current is the incremental amount of supply current required for a 1 Mbps increase in the signal data rate.  
Rev. B | Page 7 of 16  
 
 
 
 
 
 
 
ADuM1200-EP  
Data Sheet  
PACKAGE CHARACTERISTICS  
Table 4.  
Parameter  
Symbol  
RI-O  
CI-O  
CI  
θJCI  
Min  
Typ  
1012  
1.0  
4.0  
46  
Max  
Unit  
pF  
pF  
°C/W  
Test Conditions  
Resistance (Input-to-Output)1  
Capacitance (Input-to-Output)1  
Input Capacitance  
f = 1 MHz  
IC Junction-to-Case Thermal Resistance, Side 1  
Thermocouple located at  
center of package underside  
IC Junction-to-Case Thermal Resistance, Side 2  
θJCO  
41  
°C/W  
1 The device is considered a 2-terminal device; Pin 1, Pin, 2, Pin 3, and Pin 4 are shorted together, and Pin 5, Pin 6, Pin 7, and Pin 8 are shorted together.  
REGULATORY INFORMATION  
The ADuM1200-EP is approved by the organizations listed in Table 5. See Table 10 for details regarding recommended maximum  
working voltages for specific cross-isolation waveforms and insulation levels.  
Table 5.  
UL  
CSA  
VDE  
Recognized Under 1577 Component  
Recognition Program1  
Approved under CSA Component Acceptance  
Notice #5A  
Certified according to DIN V VDE  
V 0884-10 (VDE V 0884-10): 2006-122  
Single/Basic 2500 V rms Isolation Voltage  
Basic insulation per CSA 60950-1-03 and  
IEC 60950-1, 400 V rms (566 peak) maximum  
working voltage  
Reinforced insulation, 560 V peak  
Functional insulation per CSA 60950-1-03 and  
IEC 60950-1, 800 V rms (1131 V peak) maximum  
working voltage  
File E214100  
File 205078  
File 2471900-4880-0001  
1 In accordance with UL 1577, each ADuM1200UR-EP is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second (current leakage detection  
limit = 5 µA).  
2 In accordance with DIN V VDE V 0884-10, each ADuM1200UR-EP is proof tested by applying an insulation test voltage ≥1050 V peak for 1 second (partial discharge  
detection limit = 5 pC). The * marking branded on the component designates DIN V VDE V 0884-10 approval.  
INSULATION AND SAFETY-RELATED SPECIFICATIONS  
Table 6.  
Parameter  
Symbol Value  
Unit  
Conditions  
Rated Dielectric Insulation Voltage  
Clearance in the Plane of the PCB  
2500  
4.5  
V rms  
1 minute duration  
CLPCB  
mm min Measured from input terminals to output terminals,  
shortest line of sight distance through air in the  
plane of the PCB  
Minimum External Air Gap (Clearance)  
Minimum External Tracking (Creepage)  
L(I01)  
L(I02)  
4.0  
4.0  
mm min Measured from input terminals to output terminals,  
shortest distance through air  
mm min Measured from input terminals to output terminals,  
shortest distance path along body  
Minimum Internal Gap (Internal Clearance)  
Tracking Resistance (Comparative Tracking Index)  
Isolation Group  
0.017  
>400  
II  
mm min Insulation distance through insulation  
CTI  
V
DIN IEC 112/VDE 0303 Part 1  
Material Group (DIN VDE 0110, 1/89, Table 1)  
Rev. B | Page 8 of 16  
 
 
 
 
 
 
Data Sheet  
ADuM1200-EP  
DIN V VDE V 0884-10 (VDE V 0884-10): 2006-12 INSULATION CHARACTERISTICS  
This isolator is suitable for reinforced isolation within the safety limit data only. Maintenance of the safety data is ensured by protective  
circuits. Note that the * marking on the package denotes DIN V VDE V 0884-10 approval for a 560 V peak working voltage.  
Table 7.  
Description  
Conditions  
Symbol  
Characteristic Unit  
Installation Classification per DIN VDE 0110  
For Rated Mains Voltage ≤ 150 V rms  
For Rated Mains Voltage ≤ 300 V rms  
For Rated Mains Voltage ≤ 400 V rms  
Climatic Classification  
Pollution Degree per DIN VDE 0110, Table 1  
Maximum Working Insulation Voltage  
Input-to-Output Test Voltage, Method B1  
I to IV  
I to III  
I to II  
40/125/21  
2
VIORM  
VPR  
560  
1050  
V peak  
V peak  
VIORM × 1.875 = VPR, 100% production test,  
tm = 1 second, partial discharge < 5 pC  
Input-to-Output Test Voltage, Method A  
VIORM × 1.6 = VPR, tm = 60 seconds,  
partial discharge < 5 pC  
VPR  
After Environmental Tests Subgroup 1  
After Input and/or Safety Test Subgroup 2  
and Subgroup 3  
896  
672  
V peak  
V peak  
VIORM × 1.2 = VPR, tm = 60 seconds,  
partial discharge < 5 pC  
Highest Allowable Overvoltage  
Safety-Limiting Values  
Transient overvoltage, tTR = 10 seconds  
Maximum value allowed in the event of a failure  
(see Figure 2)  
VTR  
4000  
V peak  
Case Temperature  
Side 1 Current  
Side 2 Current  
TS  
IS1  
IS2  
RS  
150  
160  
170  
>109  
°C  
mA  
mA  
Insulation Resistance at TS  
VIO = 500 V  
RECOMMENDED OPERATING CONDITIONS  
200  
180  
160  
140  
Table 8.  
Parameter  
Rating  
Operating Temperature (TA)  
−55°C to +125°C  
3.0 V to 5.5 V  
1.0 ms  
SIDE 2  
SIDE 1  
1
Supply Voltages (VDD1, VDD2  
)
120  
100  
80  
60  
40  
20  
0
Input Signal Rise and Fall Times  
1 All voltages are relative to their respective ground.  
0
50  
100  
150  
200  
CASE TEMPERATURE (°C)  
Figure 2. Thermal Derating Curve, Dependence of Safety-  
Limiting Values on Case Temperature per DIN V VDE V 0884-10  
Rev. B | Page 9 of 16  
 
 
 
 
ADuM1200-EP  
Data Sheet  
ABSOLUTE MAXIMUM RATINGS  
Ambient temperature = 25°C, unless otherwise noted.  
Stresses above those listed under Absolute Maximum Ratings  
may cause permanent damage to the device. This is a stress  
rating only; functional operation of the device at these or any  
other conditions above those indicated in the operational  
section of this specification is not implied. Exposure to absolute  
maximum rating conditions for extended periods may affect  
device reliability.  
Table 9.  
Parameter  
Rating  
Storage Temperature (TST)  
Ambient Operating Temperature (TA)  
−55°C to +150°C  
−55°C to +125°C  
−0.5 V to +7.0 V  
−0.5 V to VDDI + 0.5 V  
−0.5 V to VDDO + 0.5 V  
−11 mA to +11 mA  
1
Supply Voltages (VDD1, VDD2  
)
Input Voltages (VIA, VIB)1, 2  
Output Voltages (VOA, VOB)1, 2  
Average Output Current per Pin (IO)3  
ESD CAUTION  
Common-Mode Transients (CML, CMH)4 −100 kV/µs to +100 kV/µs  
1 All voltages are relative to their respective ground.  
2 VDDI and VDDO refer to the supply voltages on the input and output sides of a  
given channel, respectively.  
3 See Figure 2 for maximum rated current values for various temperatures.  
4 Refers to common-mode transients across the insulation barrier.  
Common-mode transients exceeding the absolute maximum ratings  
can cause latch-up or permanent damage.  
Table 10. Maximum Continuous Working Voltage1  
Parameter  
Max  
Unit  
Constraint  
AC Voltage,  
Bipolar Waveform  
Unipolar Waveform  
DC Voltage  
565  
1131  
1131  
VPEAK  
VPEAK  
VPEAK  
50-year minimum lifetime  
50-year minimum lifetime  
50-year minimum lifetime  
1Refers to continuous voltage magnitude imposed across the isolation barrier.  
Table 11. Truth Table (Positive Logic)  
VIA Input1 VIB Input1 VDD1 State  
VDD2 State  
Powered  
Powered  
Powered  
Powered  
Powered  
VOA Output1  
VOB Output1  
Notes  
H
L
H
L
Powered  
Powered  
Powered  
Powered  
Unpowered  
H
L
H
L
H
L
L
H
H
H
L
X
L
H
X
H
Outputs return to the input state within  
1 µs of VDDI power restoration.  
X
X
Powered  
Unpowered  
Indeterminate  
Indeterminate  
Outputs return to the input state within  
1 µs of VDDO power restoration.  
1 H = high, L = low, X = undetermined/not relevant.  
Rev. B | Page 10 of 16  
 
 
 
 
 
 
 
 
 
 
 
Data Sheet  
ADuM1200-EP  
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS  
1
2
3
4
8
7
6
5
V
V
V
V
DD1  
DD2  
OA  
OB  
ADuM1200-EP  
V
V
IA  
IB  
TOP VIEW  
(Not to Scale)  
GND  
GND  
2
1
Figure 3. Pin Configuration  
Table 12. Pin Function Descriptions  
Pin No.  
Mnemonic  
Description  
1
2
3
4
5
6
7
8
VDD1  
VIA  
VIB  
GND1  
GND2  
VOB  
VOA  
VDD2  
Supply Voltage for Isolator Side 1.  
Logic Input A.  
Logic Input B.  
Ground 1. Ground reference for Isolator Side 1.  
Ground 2. Ground reference for Isolator Side 2.  
Logic Output B.  
Logic Output A.  
Supply Voltage for Isolator Side 2.  
Rev. B | Page 11 of 16  
 
ADuM1200-EP  
Data Sheet  
TYPICAL PERFORMANCE CHARACTERISTICS  
10  
20  
15  
10  
5
8
6
4
5V  
3V  
5V  
3V  
2
0
0
0
10  
20  
30  
30  
30  
0
10  
20  
30  
DATA RATE (Mbps)  
DATA RATE (Mbps)  
Figure 4. Typical Input Supply Current per Channel vs.  
Data Rate for 5 V and 3 V Operation  
Figure 7. Typical VDD1 Supply Current vs.  
Data Rate for 5 V and 3 V Operation  
4
3
2
1
0
4
3
2
1
0
5V  
3V  
5V  
3V  
0
10  
20  
0
10  
20  
30  
DATA RATE (Mbps)  
DATA RATE (Mbps)  
Figure 5. Typical Output Supply Current per Channel vs.  
Data Rate for 5 V and 3 V Operation (No Output Load)  
Figure 8. Typical VDD2 Supply Current vs.  
Data Rate for 5 V and 3 V Operation  
4
3
2
1
0
5V  
3V  
0
10  
20  
DATA RATE (Mbps)  
Figure 6. Typical Output Supply Current per Channel vs.  
Data Rate for 5 V and 3 V Operation (15 pF Output Load)  
Rev. B | Page 12 of 16  
 
Data Sheet  
ADuM1200-EP  
OUTLINE DIMENSIONS  
5.00 (0.1968)  
4.80 (0.1890)  
8
1
5
4
6.20 (0.2441)  
5.80 (0.2284)  
4.00 (0.1574)  
3.80 (0.1497)  
0.50 (0.0196)  
0.25 (0.0099)  
1.27 (0.0500)  
BSC  
45°  
1.75 (0.0688)  
1.35 (0.0532)  
0.25 (0.0098)  
0.10 (0.0040)  
8°  
0°  
0.51 (0.0201)  
0.31 (0.0122)  
COPLANARITY  
0.10  
1.27 (0.0500)  
0.40 (0.0157)  
0.25 (0.0098)  
0.17 (0.0067)  
SEATING  
PLANE  
COMPLIANT TO JEDEC STANDARDS MS-012-AA  
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS  
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR  
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.  
Figure 9. 8-Lead Standard Small Outline Package [SOIC_N]  
Narrow Body (R-8)  
Dimensions shown in millimeters (inches)  
ORDERING GUIDE  
Number  
Number  
Maximum  
Maximum  
Maximum  
of Inputs,  
of Inputs, Data Rate  
Propagation  
Delay, 5 V (ns)  
Pulse Width  
Distortion (ns)  
Temperature  
Range  
Package  
Description  
Package  
Option  
Model  
V
2
2
DD1 Side  
V
0
0
DD2 Side  
(Mbps)  
25  
ADuM1200UR-EP  
ADuM1200UR-EP-RL7  
45  
45  
3
3
−55°C to +125°C  
−55°C to +125°C  
8-Lead SOIC_N  
8-Lead SOIC_N  
R-8  
R-8  
25  
Rev. B | Page 13 of 16  
 
 
ADuM1200-EP  
NOTES  
Data Sheet  
Rev. B | Page 14 of 16  
Data Sheet  
NOTES  
ADuM1200-EP  
Rev. B | Page 15 of 16  
ADuM1200-EP  
NOTES  
Data Sheet  
©2010–2014 Analog Devices, Inc. All rights reserved. Trademarks and  
registered trademarks are the property of their respective owners.  
D09201-0-2/14(B)  
Rev. B | Page 16 of 16  

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