ADM8832ACP [ADI]
Charge Pump Regulator for Color TFT Panel; 电荷泵稳压器为彩色TFT面板
| 型号： | ADM8832ACP |
| 厂家： | 
ADI |
| 描述： | Charge Pump Regulator for Color TFT Panel |
| 文件： | 总12页 (文件大小：198K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Charge Pump Regulator
for Color TFT Panel
ADM8832
FEATURES
FUNCTIONAL BLOCK DIAGRAM
3 output voltages (+5.1 V, +15.3 V, −10.2 V) from one 3 V
input supply
C5
2.2µF
V
CC
Power efficiency optimized for use with TFT in mobile
phones
Low quiescent current
Low shutdown current (<1 µA)
Fast transient response
Shutdown function
C1+
ADM8832
VOLTAGE
DOUBLER
C1
2.2µF
C1–
VOUT
LDO IN
OSCILLATOR
CLKIN
C6
2.2µF
LDO
VOLTAGE
REGULATOR
SCAN/
BLANK
+5VOUT
+5VIN
CONTROL
LOGIC
Power saving during blanking period
Option to use external ldo
+5.1V
C7
2.2µF
LDO_ON/
OFF
C2+
DOUBLE
TRIPLE
C2
1µF
C2–
C3+
C3–
APPLICATIONS
Handheld instruments
TFT LCD panels
C3
1µF
TIMING
GENERATOR
+15VOUT
VOLTAGE
TRIPLER
+15.3V
C8
1µF
C4+
C4
C4–
Cellular phones
VOLTAGE
INVERTER
1µF
SHUTDOWN
CONTROL
DISCHARGE
SHDN
–10VOUT
–10.2V
C9
1µF
GND
Figure 1.
GENERAL DESCRIPTION
mode where the current is highest. During blanking periods, the
ADM8832 switches to an external, lower frequency clock. This
allows the user to vary the frequency and maximize power
efficiency during blanking periods. The tolerances on the output
voltages are seamlessly maintained when switching from scan-
ning mode to blanking mode or vice versa.
The ADM8832 is a charge pump regulator used for color thin
film transistor (TFT) liquid crystal displays (LCD). Using charge
pump technology, the device can be used to generate three
output voltages (+5.1 V 2ꢀ, +15.3 V, −10.2 V) from a single
3 V input supply. These outputs are then used to provide
supplies for the LCD controller (+5.1 V) and the gate drives for
the transistors in the panel (+15.3 V and −10.2 V). Only a few
external capacitors are needed for the charge pumps. An
efficient low dropout voltage regulator also ensures that the
power efficiency is high and provides a low ripple 5.1 V output.
This LDO can be shut down and an external LDO used to
regulate the 5 V doubler output and drive the input to the
charge pump section, which generates the +15.3 V and −10.2 V
outputs if so required by the user.
The ADM8832 power saving features include low power
shutdown and reduced quiescent current consumption during
the blanking periods. The 5.1 V output consumes the most
power, so power efficiency is also maximized on this output
with an oscillator enabling scheme (Green Idle™). This
effectively senses the load current that is flowing and turns on
the charge pump only when charge needs to be delivered to the
5 V pump doubler output.
The ADM8832 has an internal 100 kHz oscillator for use in
scanning mode, but the part must be clocked by an external
clock source in blanking (low current) mode. The internal
oscillator is used to clock the charge pumps during scanning
The ADM8832 is fabricated using CMOS technology for minimal
power consumption. The part is packaged in a 20-lead LFCSP
(lead frame chip scale package).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
ADM8832
TABLE OF CONTENTS
Specifications..................................................................................... 3
Theory of Operation...................................................................... 10
Scanning and Blanking.............................................................. 10
Power Sequencing ...................................................................... 10
Transient Response .................................................................... 10
External Clock ............................................................................ 10
Outline Dimensions....................................................................... 11
Ordering Guide .......................................................................... 11
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
Thermal Characteristics .............................................................. 5
ESD Caution.................................................................................. 5
Pin Configuration and Function Descriptions............................. 6
Typical Performance Characteristics ............................................. 7
REVISION HISTORY
4/04—Changed from Rev. 0 to Rev. A
Changes to Outline Dimensions................................................... 11
Updated Ordering Guide............................................................... 11
7/03—Revision 0: Initial Version
Rev. A | Page 2 of 12
ADM8832
SPECIFICATIONS
VCC = 2.6 V to 3.6 V, TA = −40°C to +85°C, unless otherwise noted; C1, C5, C6, C7 = 2.2 µF, C2, C3, C4, C8, C9 = 1 µF, CLKIN = 1 kHz in
blanking mode.
Table 1.
Parameter
Min
Typ
Max
3.6
400
140
1
Unit
V
Test Conditions
INPUT VOLTAGE, VCC
SUPPLY CURRENT, ICC
2.6
150
70
µA
µA
µA
Unloaded, Scanning Period
Unloaded, Blanking Period
Shutdown Mode, TA = 25°C
+5.1 V OUTPUT
Output Voltage
Output Current
5.0
5.1
4
5
50
80
70
10
5
5.2
5
8
V
IL = 10 µA to 8 mA
Scanning Period
mA
mA
µA
%
%
mV p-p
µs
Scanning Period, VCC > 2.7 V
Blanking Period
VCC = 3 V, IL = 5 mA (Scanning)
VCC = 3 V, IL = 200 µA (Blanking)
8 mA Load
200
Power Efficiency
Output Ripple
Transient Response
+15.3 V OUTPUT
Output Voltage
Output Current
IL Stepped from 10 µA to 8 mA
14.4
15.3
50
1
15.6
100
10
V
µA
µA
mV p-p
IL = 1 µA to 100 µA
Scanning Period
Blanking Period
IL = 100 µA
Output Ripple
−10.2 V OUTPUT
Output Voltage
Output Current
50
−10.4
−100
−10
−10.2
−50
−1
−9.6
V
µA
µA
IL = –1 µA to −100 µA
Scanning Period
Blanking Period
Output Ripple
50
mV p-p
%
%
IL = –100 µA
POWER EFFICIENCY
(+15.3 V and −10.2 V Outputs)
CHARGE PUMP FREQUENCY
CONTROL PINS
90
80
Relative to 5.1 V Output, IL = 100 µA (Scanning)
Relative to 5.1 V Output, IL = 10 µA (Blanking)
Scanning Period
60
100
140
kHz
SHDN
Input Voltage, VSHDN
0.3 VCC
V
SHDN Low = Shutdown Mode
SHDN High = Normal Mode
0.7 VCC
V
Digital Input Current
Digital Input Capacitance1
SCAN/BLANK
1
10
µA
pF
Input Voltage
0.3 VCC
V
Low = BLANK Period
High = SCAN Period
0.7 VCC
V
Digital Input Current
Digital Input Capacitance1
LDO_ON/OFF
1
10
µA
pF
Input Voltage
0.3 VCC
V
V
Low = External LDO
High = Internal LDO
0.7 VCC
Digital Input Current
Digital Input Capacitance1
Footnotes after table.
1
10
µA
pF
Rev. A | Page 3 of 12
ADM8832
Parameter
Min
Typ
Max
Unit
Test Conditions
CLKIN
Minimum Frequency
0.9
1
kHz
Duty Cycle = 50%, Rise/Fall Times = 20 ns
Input Voltage
VIL
0.3 VCC
V
VIH
0.7 VCC
V
Digital Input Current
Digital Input Capacitance1
1
10
µA
pF
1 Guaranteed by design. Not 100% production tested.
Specifications are subject to change without notice.
TIMING SPECIFICATIONS
VCC = 2.6 V to 3.6 V, TA = –40°C to +85°C, unless otherwise noted; C1, C5, C6, C7 = 2.2 µF, C2, C3, C4, C8, C9 = 1 µF, CLKIN = 1 kHz in
blanking mode.
Table 2.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER-UP SEQUENCE
+5 V Rise Time, tR5V
300
8
12
3
µs
10% to 90%, Figure 17
10% to 90%, Figure 17
90% to 10%, Figure 17
Figure 17
+15 V Rise Time, tR15V
−10 V Fall Time, tF10V
Delay between −10 V Fall and +15 V, tDELAY
POWER-DOWN SEQUENCE
+5 V Fall Time, tF5V
ms
ms
ms
75
40
40
ms
ms
ms
90% to 10%, Figure 17
90% to 10%, Figure 17
10% to 90%, Figure 17
+15 V Fall Time, tF15V
−10 V Rise Time, tR10V
Rev. A | Page 4 of 12
ADM8832
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
THERMAL CHARACTERISTICS
20-Lead LFCSP:
θJA = 31°C/W
Parameter
Ratings
Supply Voltage
−0.3 V to +4.0 V
−0.3 V to +4.0 V
10 sec
Input Voltage to Digital Inputs
Output Short Circuit Duration to GND
Output Voltage
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those listed in the operational sections
of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
+5.1 V Output
−10.2 V Output
+15.3 V Output
Operating Temperature Range
Power Dissipation
(Derate 33 mW/°C above 25°C)
−0.3 V to +6 V
−12 V to +0.3 V
−0.3 V to +17 V
−40°C to +85°C
3.55 W
Storage Temperature Range
ESD
−65°C to +150°C
Class I
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 12
ADM8832
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
15 C4–
14 C2+
13 C2–
12 C3+
11 C3–
V
1
2
3
4
5
PIN 1
CC
INDICATOR
VOUT
LDO_IN
+5VOUT
+5VIN
ADM8832
TOP VIEW
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No. Mnemonic Function
1
2
VCC
VOUT
Positive Supply Voltage Input. Connect this pin to 3 V supply with a 2.2 µF decoupling capacitor.
Voltage Doubler Output. This is derived by doubling the 3 V supply. A 2.2 µF capacitor to ground is required on
this pin.
3
4
LDO_IN
+5VOUT
Voltage Regulator Input. The user has the option to bypass this circuit using the LDO_ON/OFF pin.
+5.1 V Output Pin. This is derived by doubling and regulating the +3 V supply. A 2.2 µF capacitor to ground is
required on this pin to stabilize the regulator.
5
6
+5VIN
+5.1 V Input Pin. This is the input to the voltage tripler and doubler inverter charge pump circuits.
LDO_ON/OFF Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage
doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the
use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into
the voltage tripler and doubler/inverter circuits of the ADM8832.
7
8
SHDN
Digital Input. 3 V CMOS logic. Active low shutdown control. This pin shuts down the timing generator and
enables the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V.
SCAN/BLANK Drive Mode Input. 3 V CMOS logic. A logic high places the part in scan (high current) mode, and the charge
pump is driven by the internal oscillator. A logic low places the part in blanking (low current) mode, and the
charge pump is driven by the (slower) external oscillator. This is a power saving feature on the ADM8832.
9
CLKIN
External CLOCK Input. During a blanking period, the oscillator circuit selects this pin to drive the charge pump
circuit. This is at a lower frequency than the internal oscillator, resulting in lower quiescent current
consumption, thus saving power.
10
+15VOUT
+15.3 V Output Pin. This is derived by tripling the +5.1 V regulated output. A 1 µF capacitor is required on
this pin.
11, 12
13, 14
15, 16
17
C3−, C3+
C2−, C2+
C4−, C4+
−10VOUT
External capacitor C3 is connected between these pins. A 1 µF capacitor is recommended.
External capacitor C2 is connected between these pins. A 1 µF capacitor is recommended.
External capacitor C4 is connected between these pins. A 1 µF capacitor is recommended.
−10.2 V Output Pin. This is derived by doubling and inverting the +5.1 V regulated output. A 1 µF capacitor is
required on this pin.
18
GND
Device Ground Pin.
19, 20
C1−, C1+
External capacitor C1 is connected between these pins. A 2.2 µF capacitor is recommended.
Rev. A | Page 6 of 12
ADM8832
TYPICAL PERFORMANCE CHARACTERISTICS
90
85
84
83
82
81
80
79
78
70
60
50
40
30
20
10
10
30
50
70
90
110 130 150 170 190
0
1
2
3
4
5
6
7
8
OUTPUT CURRENT (µA)
OUTPUT CURRENT (mA)
Figure 3. LDO Efficiency in Blanking Mode with VCC = 3 V
Figure 6. LDO Efficiency in Scanning Mode with VCC = 3 V
5.0752
5.0750
5.0748
5.0746
5.0744
5.0742
5.0740
5.0738
5.0736
5.0734
100
90
80
70
60
100
1000
10000
2
4
6
8
10
BLANKING FREQUENCY (Hz)
OUTPUT CURRENT (µA)
Figure 4. LDO Output Voltage (Unloaded) vs.
Blanking Mode Frequency
Figure 7. +15 V/−10 V Efficiency vs.
Output Current in Blanking Mode, VCC = 3 V
5.104
5.102
5.100
5.098
5.096
5.094
5.092
5.090
100
90
80
70
60
50
40
0
1
2
3
4
5
6
7
8
0
20
40
60
80
100
I
(mA)
OUTPUT CURRENT (µA)
LOAD
Figure 8. +15 V/−10 V Efficiency vs.
Output Current in Scanning Mode, VCC = 3 V
Figure 5. LDO O/P Voltage vs.
Load Current in Scanning Mode, VCC = 3.3 V
Rev. A | Page 7 of 12
ADM8832
5.30
5.25
5.20
5.15
TEK STOP: SINGLE SEQ 10.0MS/s
[
]
T
LOAD ENABLE
T
T
DEVICE 1 @ +85°C
2
1
DEVICE 1 @ +25°C
5.10
5.05
5.00
4.95
4.90
DEVICE 1 @ –40°C
5V OUTPUT
2.6
2.7
2.8
2.9
3.0
3.1
(V)
3.2
3.3
3.4
3.5
3.6
V
CC
CH1 20.0mV
CH2 2.00V
M5.00µs CH2
1.20V
Figure 9. LDO Variation over Supply and Temperature
Figure 12. 5 V Output Transient Response for Max load Current
300
250
200
150
100
50
TEK STOP: SINGLE SEQ 10.0MS/s
[
]
T
T
LOAD DISABLE
2
1
ICC (SCAN)
5V OUTPUT
T
ICC (BLANK)
0
2.6
2.7
2.8
2.9
3.0
3.1
(V)
3.2
3.3
3.4
3.5
3.6
V
CC
CH1 20.0mV
CH2 2.00V
M5.00µs CH2
1.20V
Figure 10. Supply Current vs. Voltage
Figure 13. 5 V Output Transient Response, Load Disconnected
TEK STOP: 2.50MS/s
[
23 ACQS
T
TEK STOP: SINGLE SEQ 5.00KS/s
]
[
]
T
V
+15V OUTPUT
OUT
T
2
5V OUTPUT RIPPLE
T
1
3
T
T
2
T
V
RIPPLE
CC
–10V OUTPUT
T
5VOUT
CH2 5.00V
1
CH1 20.0mV
CH3 50.0mV
CH2 100mV
M20.0µs CH1
–2.8mV
CH1
CH3
5.00V
5.00V
M10.0ms CH2
1.3V
Figure 11. Output Ripple on LDO (5 V Output)
Figure 14. +15 V and −10 V Outputs at Power-Up
Rev. A | Page 8 of 12
ADM8832
TEK STOP: 500S/s
5 ACQS
T
20.1
20.0
19.9
19.8
19.7
19.6
19.5
19.4
[
]
+15V OUTPUT
T
1
–10V OUTPUT
5VOUT
T
T
–40
–20
0
20
40
60
90
2
TEMPERATURE (°C)
CH1
CH3
5.00V
5.00V
CH2 5.00V
M10.0ms CH1
0V
Figure 16. Power Dissipation over Temperature, VCC = 3.6 V, Scanning Mode
with All O/Ps at Maximum Load
Figure 15. +15 V and −10 V Outputs at Power-Down (Unloaded)
Rev. A | Page 9 of 12
ADM8832
THEORY OF OPERATION
SCANNING AND BLANKING
TRANSIENT RESPONSE
A TFT LCD panel is made up of a bank of capacitors, each
representing a pixel in the display. These capacitors store
different levels of charge, depending on the amount of
luminescence required for a given pixel. When a picture is
displayed on the panel, a scan of all the pixel capacitors is
performed, placing different levels of charge on each in order to
create the image. The process of updating the display like this is
called scanning. Once scanned, an image is held by pixel
capacitance, and the controller and source line drivers can be
put into a low power mode. This low power mode is referred to
as the blanking mode on the ADM8832. Over a finite period of
time, this pixel charge will leak and the capacitors will need to
be refreshed in order to maintain the image.
The ADM8832 features extremely fast transient response,
making it very suitable for fast image updates on TFT LCD
panels. This means that even under changing load conditions
there is still very effective regulation of the 5 V output. Figure 12
and Figure 13 show how the 5.1 V output responds when a
maximum load is dynamically connected and disconnected.
Note that the output settles within 5 µs to less than 1ꢀ of the
output level.
EXTERNAL CLOCK
The ADM8832 has an internal 100 kHz oscillator, but an
external clock source can also be used to clock the part. This
clock source must be applied to the CLKIN pin. Power is saved
during blanking periods by disabling the internal oscillator and
by switching to the lower frequency external clock source. To
achieve optimum performance of the charge pump circuitry, it
is important that the duty cycle of the external clock source is
50ꢀ and that the rise and fall times are less than 20 ns.
The ADM8832 uses scanning and blanking modes, as follows.
When the TFT LCD panel is in scanning mode, a logic high on
the SCAN/
input places the device in high current
BLANK
power mode, providing extra power (extra current) to the LCD
controller and the source line drivers. If the panel continues to
be updated (as when a moving picture is being displayed), the
ADM8832 can be continually operated in scanning mode. If the
same image is kept on the panel, a logic low is applied to the
90%
SCAN/
input, and the ADM8832 enters blanking (low
BLANK
current) mode. Depending on how often the image is updated,
the ADM8832 can be operated with a variable SCAN/
10%
BLANK
tR
tF
tR: RISE TIME
tF: FALL TIME
tH
duty cycle. This helps to maximize power efficiency and,
therefore, extends the battery life.
tH
@ 100% = DUTY CYCLE
tT
tT
POWER SEQUENCING
Figure 18. Duty Cycle of External Clock
The gate drive supplies must be sequenced such that the −10 V
supply is up before the +15 V supply for the TFT panel to power
on correctly. The ADM8832 controls this sequence. When the
0.280
0.400
device is turned on (a logic high on
), the ADM8832
SHDN
allows the −10 V output to ramp immediately, but holds off the
+15 V output. It continues to do this until the negative output
reaches −3 V. At this point, the positive output is enabled and
allowed to ramp up to +15 V. This sequence is shown in Figure 17.
VCC
SHDN
tR5V
90%
tF5V
10%
+5V
tR15V
tF15V
+15V
tR15V
–10V
0.875
0.200
0.250
–3V
90%
tR10V
SOLDER MASK
BOARD METALLIZATION
10%
tF10V
LOAD
Figure 19. Suggested LFCSP 4 mm × 4mm 20 Lead Land Pattern
SCAN/BLANK
EXTERNAL
CLOCK
Figure 17. Power Sequence
Rev. A | Page 10 of 12
ADM8832
OUTLINE DIMENSIONS
0.60
MAX
4.00
BSC SQ
0.60
MAX
16
15
20
1
PIN 1
INDICATOR
2.25
2.10 SQ
1.95
EXPOSED
PAD
TOP
VIEW
3.75
BCS SQ
(BOTTOM VIEW)
11
10
5
0.75
0.55
0.35
6
0.25 MIN
0.80 MAX
0.65 TYP
0.30
0.23
0.18
12° MAX
0.90
0.85
0.80
0.05 MAX
0.02 NOM
0.20
REF
COPLANARITY
0.08
SEATING
PLANE
0.50
BSC
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1
Figure 20. 20-Lead Lead Frame Chip Scale Package [LFCSP]
4 mm × 4 mm Body
(CP-20)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADM8832ACP
ADM8832ACP-REEL
ADM8832ACP-REEL7
ADM8832ACPZ1
ADM8832ACPZ-REEL1
ADM8832ACPZ-REEL71
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
Package Option
Lead Frame Chip Scale Package
Lead Frame Chip Scale Package
Lead Frame Chip Scale Package
Lead Frame Chip Scale Package
Lead Frame Chip Scale Package
Lead Frame Chip Scale Package
CP-20
CP-20
CP-20
CP-20
CP-20
CP-20
1 Z = Pb-free part.
Rev. A | Page 11 of 12
ADM8832
NOTES
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C03759–0–5/04(A)
Rev. A | Page 12 of 12
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