ADM8839ACP [ROCHESTER]
SWITCHED CAPACITOR REGULATOR, 140 kHz SWITCHING FREQ-MAX, QCC20, 4 X 4 MM, MO-220VGGD-1, LFCSP-20;
| 型号： | ADM8839ACP |
| 厂家： | 
Rochester Electronics |
| 描述： | SWITCHED CAPACITOR REGULATOR, 140 kHz SWITCHING FREQ-MAX, QCC20, 4 X 4 MM, MO-220VGGD-1, LFCSP-20 开关 |
| 文件： | 总13页 (文件大小：1125K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Charge Pump Regulator
for Color TFT Panels
ADM8839
FUNCTIONAL BLOCK DIAGRAM
C5, 2.2µF
FEATURES
3 voltages (+5 V, +15 V, −15 V) from a single 3 V supply
Power efficiency optimized for use with TFT in mobile
phones
Low quiescent current
Low shutdown current (<5 μA)
Shutdown function
V
CC
C1+
ADM8839
VOLTAGE
DOUBLER
C1, 2.2µF
C1–
VOUT
LDO_IN
OSCILLATOR
Option to use external LDO
LDO
VOLTAGE
REGULATOR
C6, 2.2µF
CONTROL
LOGIC
+5VOUT
+5VIN
LDO_ON/OFF
APPLICATIONS
Hand-held instruments
TFT LCD panels
+5V
C7, 2.2µF
C2+
DOUBLE
C2, 0.22µF
VOLTAGE
TRIPLER
C2–
C3+
Cellular phones
TRIPLE
C3, 0.22µF
TIMING
GENERATOR
C3–
+15VOUT
C4+
+15V
C8, 0.22µF
VOLTAGE
SHUTDOWN
CONTROL
INVERTER
C4, 0.22µF
SHDN
C4–
DISCHARGE
GND
–15VOUT
–15V
C9, 0.22µF
Figure 1.
GENERAL DESCRIPTION
The ADM8839 is a charge pump regulator used for color thin
film transistor (TFT) liquid crystal displays (LCDs). Using
charge pump technology, the device can be used to generate
three voltages (+5 V ꢀ2, +ꢁ5 V, −ꢁ5 V) from a single 3 V
supply. These voltages are then used to provide supplies for the
LCD controller (5 V) and the gate drives for the transistors in
the panel (+ꢁ5 V and −ꢁ5 V). Only a few external capacitors are
needed for the charge pumps. An efficient low dropout (LDO)
voltage regulator ensures that the power efficiency is high, and
provides a low ripple 5 V output. This LDO can be shut down
and an external LDO can be used to regulate the 5 V doubler
output and drive the input to the charge pump section that
generates the +ꢁ5 V and −ꢁ5 V outputs, if required by the user.
The ADM8839 has a power save shutdown feature. The 5 V
output consumes the most power, so power efficiency is also
maximized on this output with an oscillator-enabling scheme
(Green Idle™). This effectively senses the load current that is
flowing and turns on the charge pump only when charge needs
to be delivered to the 5 V pump doubler output.
The ADM8839 is fabricated using CMOS technology for
minimal power consumption. The part is packaged in a ꢀ0-lead
LFCSP (lead frame chip scale package).
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights ofthird parties that may result fromits use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ADM8839
TABLE OF CONTENTS
Features .............................................................................................. ꢁ
ESD Caution...................................................................................4
Pin Configuration and Function Descriptions..............................5
Typical Performance Characteristics ..............................................6
Theory of Operation .........................................................................8
Power Sequencing .........................................................................8
Transient Response .......................................................................8
Boosting the Current Drive of the ꢁ5 V Supply .....................8
Outline Dimensions....................................................................... ꢁ0
Ordering Guide .......................................................................... ꢁ0
Applications....................................................................................... ꢁ
Functional Block Diagram .............................................................. ꢁ
General Description......................................................................... ꢁ
Revision History ............................................................................... ꢀ
Specifications..................................................................................... 3
Timing Specifications .................................................................. 3
Absolute Maximum Ratings............................................................ 4
Thermal Characteristics .............................................................. 4
REVISION HISTORY
7/06—Rev. B to Rev. C
7/05—Rev. A to Rev. B
Updated Ordering Guide .................................................................3
Updated Format..................................................................Universal
Changes to Table ꢁ............................................................................ 3
Changes to Table 5............................................................................ 5
Changes to Ordering Guide .......................................................... ꢁ0
Updated Outline Dimension......................................................... ꢁ0
2/03—Rev. 0 to Rev. A
Changed Specifications.....................................................................ꢀ
Updated Outline Dimensions..........................................................8
Rev. C | Page 2 of 12
ADM8839
SPECIFICATIONS
VCC = 3 V (+402/−ꢁ02); TA = −40°C to +85°C; Cꢁ, C5, C6, C7 = ꢀ.ꢀ μF; Cꢀ, C3, C4, C8, C9 = 0.ꢀꢀ μF; unless otherwise noted.
Table 1.
Parameter
Test Conditions
Min
Typ
Max
4.2
500
5
Unit
V
INPUT VOLTAGE, VCC
SUPPLY CURRENT, ICC
2.7
Unloaded
Shutdown mode, TA = 25°C
250
μA
μA
+5 V OUTPUT
Output Voltage
Output Current
Output Ripple
Transient Response
+15 V OUTPUT
IL = 10 μA to 20 mA
4.9
5.0
5
10
5
5.1
20
V
mA
mV p-p
μs
8 mA load
IL stepped from 10 μA to 8 mA
Output Voltage
Output Current
Output Ripple
IL = 1 μA to 150 μA
IL = 100 μA
14.0
15.0
1
50
16.0
150
V
μA
mV p-p
−15 V OUTPUT
Output Voltage
Output Current
Output Ripple
IL = −1 μA to −150 μA
−16.0
−150
−15.0
−1
50
−14.0
V
μA
mV p-p
%
IL = −100 μA
POWER EFFICIENCY
CHARGE PUMP FREQUENCY
CONTROL PINS, SHDN
Input Voltage, V SHDN
R5 VOUT load = 5 mA, 15 V load = 150 μA, VCC = 3.0 V
82
60
100
140
kHz
SHDN low = shutdown mode
SHDN high = normal mode
0.3 × VCC
V
0.7 × VCC
V
Digital Input Current
Digital Input Capacitance1
LDO_ON/OFF
1
10
μA
pF
Input Voltage
Low = External LDO
High = Internal LDO
0.3 × VCC
V
V
0.7 × VCC
Digital Input Current
Digital Input Capacitance1
1
10
μA
pF
1 Guaranteed by design. Not 100% production tested.
TIMING SPECIFICATIONS
VCC = 3 V, TA = ꢀ5°C; Cꢁ, C5, C6, C7 = ꢀ.ꢀ μF; Cꢀ, C3, C4, C8, C9 = 0.ꢀꢀ μF.
Table 2.
Parameter
Test Conditions/Comments
Min
Typ
Max
Unit
POWER-UP SEQUENCE
+5 V Rise Time, tR5V
10% to 90%, see Figure 14
10% to 90%, see Figure 14
90% to 10%, see Figure 14
See Figure 14
250
3
3
μs
+15 V Rise Time, tR15V
−15 V Fall Time, tFM15V
Delay Between −15 V Fall and +15 V, tDELAY
POWER-DOWN SEQUENCE
+5 V Fall Time, tF5V
ms
ms
μs
600
90% to 10%, see Figure 14
90% to 10%, see Figure 14
10% to 90%, see Figure 14
35
10
20
ms
ms
ms
+15 V Fall Time, tF15V
−15 V Rise Time, tRM15V
Rev. C | Page 3 of 12
ADM8839
ABSOLUTE MAXIMUM RATINGS
TA = ꢀ5°C, unless otherwise noted.
Table 3.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Parameter
Rating
Supply Voltage
−0.3 V to +6.0 V
−0.3 V to +6.0 V
10 sec
Input Voltage on Digital Inputs
Output Short-Circuit Duration to GND
Output Voltage
+5 V Output
–15 V Output
+15 V Output
Operating Temperature Range
Power Dissipation
Storage Temperature Range
ESD
0 V to 7.0 V
THERMAL CHARACTERISTICS
−17 V to +0.3 V
−0.3 V to +17 V
−40°C to +85°C
50 mW
−65°C to +150°C
Class I
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA
Unit
20-Lead LFCSP_VQ
31°C
°C/W
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 4 of 12
ADM8839
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
15 C4–
14 C2+
13 C2–
12 C3+
11 C3–
V
1
CC
INDICATOR
VOUT 2
LDO_IN 3
+5VOUT 4
+5VIN 5
ADM8839
TOP VIEW
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
1
VCC
Positive Supply Voltage Input. Connect this pin to the 3 V supply with a 2.2 μF decoupling capacitor. Must be
electrically tied together with Pin 8 by a PCB trace.
2
VOUT
Voltage Doubler Output. This is derived by doubling the 3 V supply. A 2.2 μF capacitor to ground is required
on this pin.
3
4
LDO_IN
+5VOUT
Voltage Regulator Input. The user can bypass this circuit by using the LDO_ON/OFF pin.
5 V Output. This is derived by doubling and regulating the 3 V supply. A 2.2 μF capacitor to ground is required
on this pin to stabilize the regulator.
5
6
+5VIN
5 V Input. This is the input to the voltage tripler and inverter charge pump circuits.
LDO_ON/OFF Control Logic Input. 3 V CMOS logic. A logic high selects the internal LDO for regulation of the 5 V voltage
doubler output. A logic low isolates the internal LDO from the rest of the charge pump circuits. This allows the
use of an external LDO to regulate the 5 V voltage doubler output. The output of this LDO is then fed back into
the voltage tripler and inverter circuits of the ADM8839.
7
SHDN
Digital Input. 3 V CMOS logic. Active low shutdown control. This shuts down the timing generator and enables
the discharge circuit to dissipate the charge on the voltage outputs, thus driving them to 0 V.
8
VCC
Connect this pin to VCC. Must be electrically tied with Pin 1 by a PCB trace.
9
GND
Connect this pin to GND. Must be electrically tied with Pin 18 by a PCB trace.
10
+15VOUT
C3−, C3+
C2−, C2+
C4−, C4+
−15VOUT
15 V Output. This is derived by tripling the 5 V regulated output. A 0.22 μF capacitor is required on this pin.
External Capacitor C3 is connected between these pins. A 0.22 μF capacitor is recommended.
External Capacitor C2 is connected between these pins. A 0.22 μF capacitor is recommended.
External Capacitor C4 is connected between these pins. A 0.22 μF capacitor is recommended.
−15 V Output. This is derived by tripling and inverting the 5 V regulated output. A 0.22 μF capacitor is required
on this pin.
11, 12
13, 14
15, 16
17
18
GND
Device Ground. Must be electrically tied with Pin 9 by a PCB trace.
19, 20
C1−, C1+
External Capacitor C1 is connected between these pins. A 2.2 μF capacitor is recommended.
Rev. C | Page 5 of 12
ADM8839
TYPICAL PERFORMANCE CHARACTERISTICS
84
83
5.10
DEVICE AT +25°C
DEVICE AT +85°C
5.05
5.00
4.95
4.90
4.85
4.80
4.75
4.70
82
81
80
79
78
77
76
75
DEVICE AT –40°C
1
2
3
4
5
6
7
8
2.7
2.9
3.1
3.3
3.5
3.7
3.9
4.1 4.2
SUPPLY VOLTAGE (V)
LOAD CURRENT (mA)
Figure 3. LDO O/P Voltage Variation over Temperature and Supply
Figure 6. LDO Power Efficiency vs. Load Current, VCC = 3 V
5.020
400
5.015
5.010
5.005
5.000
4.995
350
300
250
200
150
0
1
2
3
4
5
6
7
8
2.7
2.9
3.1
3.3
3.5
3.7
3.9
4.1 4.2
I
(mA)
SUPPLY VOLTAGE (V)
LOAD
Figure 7. Supply Current vs. Supply Voltage
Figure 4. LDO O/P Voltage vs. Load Current
15.1
15.0
14.9
14.8
14.7
14.6
14.5
14.4
14.3
14.2
14.1
100
90
80
70
60
50
40
30
+15V AT 25°C
–15V AT 25°C
0
50
100
(µA)
150
200
10
20
30
40
50
60
70
80
90
100
I
I
(µA)
LOAD
LOAD
Figure 8. +15 V/−15 V Output Voltage vs. Load Current, Typical Configuration
Figure 5. +15 V/−15 V Power Efficiency vs. Load Current
Rev. C | Page 6 of 12
ADM8839
LOAD ENABLE
+15V OUTPUT
5V OUTPUT
–15V OUTPUT
5VOUT
Figure 12. Output Transient Response for Maximum Load Current
Figure 9. +15 V and −15 V Outputs at Power-Up
V
RIPPLE (DOUBLER OUTPUT RIPPLE)
+15V OUTPUT
OUT
LDO OUTPUT RIPPLE
V
RIPPLE
CC
–15V OUTPUT
5VOUT
Figure 10. Output Ripple on LDO (5 V Output)
Figure 13. +15 V and −15 V Outputs at Power-Down
LOAD DISABLE
5V OUTPUT
Figure 11. 5 V Output Transient Response, Load Disconnected
Rev. C | Page 7 of 12
ADM8839
THEORY OF OPERATION
POWER SEQUENCING
BOOSTING THE CURRENT DRIVE OF THE 15 V
SUPPLY
For the TFT panel to power up correctly, the gate drive supplies
must be sequenced such that the −ꢁ5 V supply is up before the
+ꢁ5 V supply. The ADM8839 controls this sequence. When the
The ADM8839 ꢁ5 V output can deliver ꢁ50 μA of current in
the typical configuration, as shown in Figure ꢁ5. It is also
possible to draw ꢁ00 μA from the +ꢁ5 V output and ꢀ00 μA
from the −ꢁ5 V output, or vice versa. It is possible to draw a
maximum of only 300 μA combined from the +ꢁ5 V and the
−ꢁ5 V outputs at any time (see Figure ꢁ6). In this configuration,
+5VOUT (Pin 4) is connected to +5VIN (Pin 5), as shown in
the functional block diagram (see Figure ꢁ).
SHDN
device is turned on (a logic high on
), the ADM8839
allows the −ꢁ5 V output to ramp immediately but holds off the
+ꢁ5 V output. It continues to do this until the negative output
has reached −3 V. At this point, the positive output is enabled
and allowed to ramp to +ꢁ5 V. This sequence is highlighted in
Figure ꢁ4.
C5, 2.2µF
V
CC
V
CC
C1+
ADM8839
VOLTAGE
DOUBLER
C1, 2.2µF
SHDN
+5V
C1–
VOUT
LDO_IN
tR5V
90%
10%
OSCILLATOR
LDO
VOLTAGE
REGULATOR
C6, 2.2µF
tF5V
CONTROL
LOGIC
+5VOUT
+5VIN
LDO_ON/OFF
+5V
tR15V
C7, 2.2µF
C2+
90%
10%
DOUBLE
C2, 0.22µF
tF15V
+15V
–15V
VOLTAGE
TRIPLER
C2–
C3+
tDELAY
TRIPLE
C3, 0.22µF
TIMING
GENERATOR
C3–
–3V
90%
10%
+15VOUT
+15V
tRM15V
C8, 0.22µF
C4+
tFM15V
VOLTAGE
C4, 0.22µF
SHUTDOWN
CONTROL
INVERTER
SHDN
C4–
DISCHARGE
GND
Figure 14. Power Sequence
–15VOUT
–15V
TRANSIENT RESPONSE
C9, 0.22µF
The ADM8839 features extremely fast transient response,
making it very suitable for fast image updates on TFT LCD
panels. This means that even under changing load conditions,
there is still very effective regulation of the 5 V output. Figure ꢁꢁ
and Figure ꢁꢀ show how the 5 V output responds when a
maximum load is dynamically connected and disconnected.
Note that the output settles within 5 μs to less than ꢁ2 of the
output level.
Figure 15. Typical Configuration
15.1
15.0
14.9
14.8
14.7
14.6
14.5
14.4
14.3
14.2
14.1
+15V AT 25°C
–15V AT 25°C
0
50
100
(µA)
150
200
I
LOAD
Figure 16. +15 V/−15 V Output Voltage vs. Load Current,
Typical Configuration
Rev. C | Page 8 of 12
ADM8839
The configuration in Figure ꢁ7 can supply up to 400 μA of
It is possible to configure the ADM8839 to supply up to 400 μA
on the ꢁ5 V outputs by changing its configuration slightly, as
shown in Figure ꢁ7.
current on both the +ꢁ5 V and the −ꢁ5 V outputs. If the load on
the ꢁ5 V does not draw any current, the voltage on the ꢁ5 V
outputs can rise up to ꢁ6.5 V (see Figure ꢁ8). In this
configuration, VOUT (Pin ꢀ) is connected to +5VIN (Pin 5).
C5, 2.2µF
V
CC
17.0
C1+
ADM8839
VOLTAGE
DOUBLER
C1, 2.2µF
C1–
16.5
CURRENT BOOST
CONFIGURATION
CONNECTION
+15V AT 25°C
VOUT
LDO_IN
OSCILLATOR
LDO
VOLTAGE
REGULATOR
C6, 2.2µF
16.0
CONTROL
LOGIC
+5VOUT
+5VIN
–15V AT 25°C
+5V
LDO_ON/OFF
15.5
C7, 2.2µF
C2+
DOUBLE
C2, 0.22µF
15.0
14.5
14.0
VOLTAGE
TRIPLER
C2–
C3+
TRIPLE
C3, 0.22µF
TIMING
GENERATOR
C3–
+15VOUT
+15V
C8, 0.22µF
C4+
0
100
200
I
300
(µA)
400
500
VOLTAGE
INVERTER
C4, 0.22µF
SHUTDOWN
CONTROL
C4–
LOAD
DISCHARGE
GND
SHDN
Figure 18. +15 V/−15 V Output Voltage vs. Load Current,
Current Boost Configuration
–15VOUT
–15V
C9, 0.22µF
Figure 17. Current Boost Configuration
Rev. C | Page 9 of 12
ADM8839
OUTLINE DIMENSIONS
0.60
4.00
PIN 1
MAX
BSC SQ
INDICATOR
0.60
MAX
20
1
16
15
PIN 1
INDICATOR
2.25
TOP
VIEW
3.75
BCS SQ
2.10 SQ
1.95
11
10
5
6
0.75
0.55
0.35
0.25 MIN
0.80 MAX
0.65 TYP
0.30
0.23
0.18
12° MAX
1.00
0.85
0.80
0.05 MAX
0.02 NOM
0.20
REF
SEATING
PLANE
COPLANARITY
0.08
0.50
BSC
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-1
Figure 19. 20-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
4 mm × 4 mm Body, Very Thin Quad
(CP-20-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADM8839ACP
ADM8839ACP-REEL
ADM8839ACP-REEL7
ADM8839ACPZ1
ADM8839ACPZ-REEL1
ADM8839ACPZ-REEL71
EVAL-ADM8839EB
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Ordering Quantity
Package Description
20-Lead LFCSP_VQ
20-Lead LFCSP_VQ
20-Lead LFCSP_VQ
20-Lead LFCSP_VQ
20-Lead LFCSP_VQ
20-Lead LFCSP_VQ
Evaluation Board
Package Option
CP-20-1
CP-20-1
CP-20-1
CP-20-1
75
5,000
1,500
75
5,000
1,500
CP-20-1
CP-20-1
1 Z = Pb-free part.
Rev. C | Page 10 of 12
ADM8839
NOTES
Rev. C | Page 11 of 12
ADM8839
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C03075-0-7/06(C)
Rev. C | Page 12 of 12
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