ADL5542 [ADI]
50 MHz to 6 GHz RF/IF Gain Block; 50 MHz至6 GHz的RF / IF增益模块
| 型号： | ADL5542 |
| 厂家： | 
ADI |
| 描述： | 50 MHz to 6 GHz RF/IF Gain Block |
| 文件： | 总12页 (文件大小：265K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
50 MHz to 6 GHz
RF/IF Gain Block
ADL5542
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Fixed gain of 20 dB
Operation up to 6 GHz
INPUT
OUTPUT
MATCH
1
2
3
4
8
7
6
5
RFIN
GND
GND
CB
RFOUT
GND
MATCH
Input/output internally matched to 50 Ω
Integrated bias control circuit
Output IP3
46 dBm at 500 MHz
40 dBm at 900 MHz
BIAS CONTROL
GND
ADL5542
VPOS
Output 1 dB compression: 20.6 dB at 900 MHz
Noise figure of 3 dB at 900 MHz
Single 5 V power supply
Figure 1.
Small footprint 8-lead LFCSP
Pin compatible with 15 dB gain ADL5541
1 kV ESD (Class 1C)
GENERAL DESCRIPTION
The ADL5542 is a broadband 20 dB linear amplifier that
operates at frequencies up to 6 GHz. The device can be used in
a wide variety of CATV, cellular, and instrumentation equipment.
The ADL5542 is fabricated on an InGaP HBT process and has
an ESD rating of 1 kV (Class 1C). The device is packaged in a
3 mm × 3 mm LFCSP that uses an exposed paddle for excellent
thermal impedance.
The ADL5542 provides a gain of 20 dB that is stable over
frequency, temperature, power supply, and from device to
device. The device is internally matched to 50 Ω with an input
return loss of 10 dB or better, up to 6 GHz. Only input/output
ac coupling capacitors, power supply decoupling capacitors, and
an external inductor are required for operation.
The ADL5542 consumes 93 mA on a single 5 V supply and is
fully specified for operation from −40°C to +85°C.
A fully populated RoHS-compliant evaluation board is
available.
The ADL5541 is a companion part that offers a gain of 15 dB in
a pin-compatible package.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2007 Analog Devices, Inc. All rights reserved.
ADL5542
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................8
Basic Connections.......................................................................... 10
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Typical Scattering Parameters..................................................... 5
Absolute Maximum Ratings............................................................ 6
ESD Caution.................................................................................. 6
Pin Configuration and Function Descriptions............................. 7
Soldering Information and Recommended
PCB Land Pattern....................................................................... 10
Evaluation Board ............................................................................ 11
Outline Dimensions....................................................................... 12
Ordering Guide .......................................................................... 12
REVISION HISTORY
10/07—Rev. 0 to Rev. A
7/07—Revision 0: Initial Version
Changes to Figure 4.......................................................................... 8
Change to Basic Connections Section ......................................... 10
Changes to Table 5.......................................................................... 10
Change to Table 6 ........................................................................... 11
Deleted Notes from Ordering Guide Section ............................. 12
Rev. A | Page 2 of 12
ADL5542
SPECIFICATIONS
VPOS = 5 V and TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
OVERALL FUNCTION
Frequency Range
Gain (S21)
Input Return Loss (S11)
Output Return Loss (S22)
Reverse Isolation (S12)
FREQUENCY = 100 MHz
Gain
50
6000
MHz
dB
dB
dB
dB
900 MHz
Frequency 500 MHz to 5 GHz
Frequency 500 MHz to 5 GHz
19.7
−15
−10
−22
20.2
19.6
38
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
dBm
dBm
dB
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
2.7
FREQUENCY = 500 MHz
Gain
18.4
19.2
18
19.5
0.15
0.1
0.02
20.6
46
2.8
20.8
dB
dB
dB
dB
dBm
dBm
dB
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 3 dBm per tone
3.2
FREQUENCY = 900 MHz
Gain
19.7
0.03
0.14
0.02
20.6
20.8
dB
dB
dB
dB
dBm
dBm
dB
vs. Frequency
vs. Temperature
vs. Supply
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
50 MHz
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
40
3.0
3.3
FREQUENCY = 2000 MHz
Gain
18.7
19.4
dB
vs. Frequency
50 MHz
0.05
dB
vs. Temperature
vs. Supply
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
0.23
0.04
dB
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
18
39
3.2
dBm
dBm
dB
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
3.6
FREQUENCY = 2400 MHz
Gain
17.7
18.3
18.9
dB
vs. Frequency
50 MHz
0.05
dB
vs. Temperature
vs. Supply
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
0.24
0.04
dB
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
16.8
38
3.5
dBm
dBm
dB
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
3.8
Rev. A | Page 3 of 12
ADL5542
Parameter
Conditions
Min
Typ
Max
Unit
FREQUENCY = 3500 MHz
Gain
15.9
17.5
18.8
dB
vs. Frequency
50 MHz
0.04
dB
vs. Temperature
vs. Supply
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
0.31
0.04
dB
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
13.7
33
3.7
dBm
dBm
dB
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
4.3
FREQUENCY = 5800 MHz
Gain
11.2
12.7
14.4
dB
vs. Frequency
50 MHz
0.03
dB
vs. Temperature
vs. Supply
−40°C ≤ TA ≤ +85°C
4.75 V to 5.25 V
1.2
0.04
dB
dB
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
6.8
24.2
5.7
dBm
dBm
dB
Δf = 1 MHz, output power (POUT) = 0 dBm per tone
Pin VPOS
6.3
POWER INTERFACE
Supply Voltage (VPOS)
Supply Current
vs. Temperature
Power Dissipation
4.5
5
5.5
115
V
93
15
0.5
mA
mA
W
−40°C ≤ TA ≤ +85°C
VPOS = 5 V
Rev. A | Page 4 of 12
ADL5542
TYPICAL SCATTERING PARAMETERS
VPOS = 5 V and TA = 25°C, the effects of the test fixture have been de-embedded up to the pins of the device.
Table 2.
Freq. (MHz) Magnitude (dB) Angle (°)
Magnitude (dB) Angle (°)
Magnitude (dB) Angle (°)
+170.5022 −23.0076
+170.3216 −22.6572
Magnitude (dB) Angle (°)
50
100
500
900
−23.9427
−29.6174
−34.5211
−37.74
−33.8877
−24.7749
−17.038
−127.394
−153.6
+19.99577 20.23355
+147.4543 20.07428
+131.3191 20.07369
20.77572
20.51771
+3.044077 −23.9476
−132.996
−124.454
−129.115
−159.271
−160.866
+168.1644
+164.7149
+150.6577
+128.7323
+90.37487
+8.899607
−73.4032
−106.102
−111.644
−57.0274
+1.38839
−10.9886
−21.2573
−23.7005
−35.6482
−48.9813
−60.9072
−76.3162
−91.6973
−103.208
−120.789
−136.697
−153.753
−170.25
−32.4194
−26.2358
−20.2616
−20.323
+152.6774 −22.5262
+132.0556 −22.4939
+127.0206 −22.4386
+101.2591 −22.3087
+76.03876 −21.9922
+49.85321 −21.6433
1000
1500
2000
2500
3000
3500
4000
4500
5000
5500
6000
−152.311
19.80607
−16.2712
−12.759
+178.4399 19.5708
+153.1961 19.26227
+128.6464 18.82098
+103.6543 18.18117
+96.79933 17.38515
+156.5961 17.57137
+173.0378 16.39804
−9.60208
−8.00289
−7.91011
−12.816
−9.74244
−8.77595
−10.5739
−13.1628
−7.31571
−6.22666
−9.89228
−10.7825
+24.3132
−1.63173
−26.2863
−52.0317
−77.6904
−102.402
−125.082
−21.0921
−21.2002
−20.7711
−20.0291
−19.9498
−19.8825
−20.3196
−17.625
−12.8458
−10.9468
−5.69808
−154.419
−150.164
15.13047
13.48849
Rev. A | Page 5 of 12
ADL5542
ABSOLUTE MAXIMUM RATINGS
Table 3.
ESD CAUTION
Parameter
Rating
Supply Voltage, VPOS
6.5 V
Input Power (re: 50 Ω)
10 dBm
Internal Power Dissipation (Paddle Soldered)
θJC (Junction to Paddle)
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
650 mW
28.5°C/W
150°C
−40°C to +85°C
−65°C to +150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. A | Page 6 of 12
ADL5542
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
RFIN
GND
GND
CB
1
2
3
4
8
7
6
5
RFOUT
GND
INDICATOR
ADL5542
GND
TOP VIEW
(Not to Scale)
VPOS
Figure 2. Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
RFIN
RF Input. Requires a dc blocking capacitor.
2, 3, 6, 7
GND
Ground. Connect these pins to a low impedance ground plane.
4
5
8
CB
VPOS
RFOUT
Low Frequency Bypass. A 1 μF capacitor should be connected between this pin and ground.
Power Supply for Bias Controller. Connect directly to external power supply.
RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is tied to the
external power supply. RF path requires a dc blocking capacitor.
Exposed Paddle
Exposed Paddle. Internally connected to GND. Solder to a low impedance ground plane.
Rev. A | Page 7 of 12
ADL5542
TYPICAL PERFORMANCE CHARACTERISTICS
45
50
45
40
35
30
25
20
15
10
5
40
OIP3 (0dBm)
35
OIP3 (+25°C)
30
25
OIP3 (–40°C)
OIP3 (+85°C)
20
15
10
5
GAIN
P1dB (+85°C)
P1dB
P1dB (+25°C)
NF
P1dB (–40°C)
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
0.5 0.9 1.3 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 5.7
FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 3. Gain, P1dB, OIP3, and Noise Figure vs. Frequency
Figure 6. OIP3 and P1dB vs. Frequency and Temperature
50
20
19
45
40
35
30
25
20
15
500MHz
2GHz
18
–40°C
900MHz
17
16
+85°C
2.4GHz
15
+25°C
14
3.5GHz
13
12
11
10
–3
0
3
6
9
12
15
18
0.5 0.9 1.3 1.7 2.1 2.5 2.9 3.3 3.7 4.1 4.5 4.9 5.3 5.7
P
(dBm)
FREQUENCY (GHz)
OUT
Figure 4. Gain vs. Frequency and Temperature
Figure 7. OIP3 vs. Output Power (POUT) and Frequency
8
7
6
0
–5
S22
–10
–15
–20
–25
–30
–35
–40
–45
–50
5
S12
+85°C
4
3
2
+25°C
–40°C
S11
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
FREQUENCY (GHz)
0
1
2
3
4
5
6
FREQUENCY (GHz)
Figure 8. Noise Figure vs. Frequency and Temperature
Figure 5. Input Return Loss (S11), Output Return Loss (S22), and
Reverse Isolation (S12) vs. Frequency
Rev. A | Page 8 of 12
ADL5542
50
40
30
20
10
0
40
30
20
10
0
38.0
39.2
40.4
41.6
19.5
19.6
19.7
19.8
19.9
OIP3 (dBm)
GAIN (dB)
Figure 9. OIP3 Distribution at 900 MHz
Figure 11. Gain Distribution at 900 MHz
40
35
30
25
20
15
10
5
25
20
15
10
5
0
0
2.40 2.52 2.64 2.76 2.88 3.00 3.12 3.24 3.36 3.48
20.3
20.4
20.5
20.6
20.7
20.8
20.9
NOISE FIGURE (dB)
P1dB (dBm)
Figure 12. Noise Figure Distribution at 900 MHz
Figure 10. P1dB Distribution at 900 MHz
Rev. A | Page 9 of 12
ADL5542
BASIC CONNECTIONS
4.0
3.5
3.0
2.5
2.0
1.5
The basic connections for operating the ADL5542 are shown in
Figure 13. Recommended components are listed in Table 5. The
input and output should be ac-coupled with appropriately sized
capacitors (device characterization was performed with 33 pF
capacitors). A 5 V dc bias is supplied to the amplifier via VPOS
(Pin 5) and through a biasing inductor connected to RFOUT
(Pin 8). The bias voltage should be decoupled using a 1 μF
capacitor, a 1.2 nF capacitor, and two 68 pF capacitors.
VCC
C6
1µF
C5
1.2nF
C4
68pF
L1
47nH
ADL5542
C1
33pF
C2
33pF
50
100
150
200
250
300
350
400
450
500
RFIN
1 RFIN RFOUT 8
RFOUT
FREQUENCY (MHz)
2 GND
3 GND
4 CB
GND 7
GND 6
GND
Figure 15. Noise Figure vs. Frequency
VPOS 5
VCC
SOLDERING INFORMATION AND RECOMMENDED
PCB LAND PATTERN
C3
1µF
C7
68pF
Figure 16 shows the recommended land pattern for the ADL5542.
To minimize thermal impedance, the exposed paddle on the
package underside should be soldered down to a ground plane
along with Pin 2, Pin 3, Pin 6, and Pin 7. If multiple ground
layers exist, they should be stitched together using vias (a
minimum of five vias is recommended). For more information
on land pattern design and layout, refer to Application Note
AN-772, A Design and Manufacturing Guide for the Lead Frame
Chip Scale Package (LFCSP).
Figure 13. Basic Connections
For operation between 50 MHz and 500 MHz, a larger biasing
choke and ac coupling capacitors are necessary (see Table 5).
Figure 14 shows a plot of the input return loss, the output
return loss, and the gain with these components. At 100 MHz,
the ADL5542 achieves an OIP3 of 38 dBm (POUT = 0 dBm per
tone). The noise figure performance for operation from 50 MHz
to 500 MHz is shown in Figure 15. When operating below
50 MHz, the ADL5542 exhibits gain peaking, and the input
and output match degrade significantly.
2.03mm
PIN 1
PIN 8
21.0
20.5
20.0
19.5
19.0
18.5
18.0
10
0
0.5mm
1.85mm
1.78mm
S21
–10
–20
–30
–40
–50
PIN 4
PIN 5
S11
S22
1.53mm
0.71mm
Figure 16. Recommended Land Pattern
50
100
150
200
250
300
350
400
450
500
FREQUENCY (MHz)
Figure 14. Input Return Loss (S11), Output Return Loss (S22), and
Gain (S21) vs. Frequency
Table 5. Recommended Components for Basic Connections
Frequency
C1
C2
C3
L1
C4
C5
C6
C7
50 MHz to 500 MHz
500 MHz to 6000 MHz
0.1 μF 0.1 μF 1 μF 470 nH (Coilcraft 0603LS-471NXJL_ or equivalent)
68 pF 1.2 nF 1 μF 68 pF
68 pF 1.2 nF 1 μF 68 pF
33 pF
33 pF
1 μF 47 nH (Coilcraft 0603CS-47NXJL_ or equivalent)
Rev. A | Page 10 of 12
ADL5542
EVALUATION BOARD
W1
Figure 19 shows the schematic for the ADL5542 evaluation
board. The board is powered by a single 5 V supply.
The components used on the board are listed in Table 6. Power
can be applied to the board through clip-on leads (VCC and
GND) or through a 2-pin header (W1).
VCC
C6
1µF
C5
C4
68pF
1.2nF
L1
47nH
ADL5542
C1
33pF
C2
33pF
RFIN
1 RFIN RFOUT 8
RFOUT
2 GND
3 GND
4 CB
GND 7
GND 6
GND
VPOS 5
C3
1µF
C7
68pF
C8
OPEN
C9
OPEN
DUT1
VCC
Figure 19. Evaluation Board Schematic
Figure 17. Evaluation Board Layout (Bottom)
Figure 18. Evaluation Board Layout (Top)
Table 6. Evaluation Board Configuration Options
Component
Function
Default Value
DUT1
Gain block
ADL5542
C1, C2
C3
AC coupling capacitors
Low frequency bypass capacitor
33 pF, 0402
1 μF, 0805
C4, C5, C6, C7, C8, C9 Power supply decoupling capacitors
C4, C7 = 68 pF, 0603
C5 = 1.2 nF, 0603
C6 = 1 μF, 0805
C8, C9 = open
L1
DC bias inductor
47 nH, 0603 (Coilcraft 0603CS-47NXJL_ or equivalent)
VCC and GND
W1
Clip-on terminals for power supply
2-pin header for connection of ground and supply via cable
Rev. A | Page 11 of 12
ADL5542
OUTLINE DIMENSIONS
3.25
3.00 SQ
2.75
0.60 MAX
5
0.50
BSC
0.60 MAX
8
2.95
2.75 SQ
2.55
1.60
1.45
1.30
EXPOSED
PAD
TOP
VIEW
PIN 1
INDICATOR
(BOTTOM VIEW)
4
1
PIN 1
INDICATOR
0.50
0.40
0.30
1.89
1.74
1.59
12° MAX
0.70 MAX
0.65TYP
0.90 MAX
0.85 NOM
0.05 MAX
0.01 NOM
0.30
0.23
0.18
SEATING
PLANE
0.20 REF
Figure 20. 8-Lead Lead Frame Chip Scale Package [LFCSP_VD]
3 mm × 3 mm Body, Very Thin, Dual Lead
(CP-8-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model
ADL5542ACPZ-R71
ADL5542-EVALZ1
Temperature Range
Package Description
8-Lead LFCSP_VD, Tape and Reel
Evaluation Board
Package Option
Branding
−40°C to +85°C
CP-8-2
Q15
1 Z = RoHS Compliant Part.
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06879-0-10/07(A)
Rev. A | Page 12 of 12
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