ADL5534_08 [ADI]
20 MHz to 500 MHz IF Amplifier; 20 MHz至500 MHz的IF放大器
| 型号： | ADL5534_08 |
| 厂家： | 
ADI |
| 描述： | 20 MHz to 500 MHz IF Amplifier |
| 文件： | 总9页 (文件大小：660K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
20 MHz to 500 MHz
IF Amplifier
Preliminary Technical Data
ADL5534
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Fixed gain of 20 dB
Operation up to 500 MHz
Input/output internally matched to 50 Ω
Integrated bias control circuit
OIP3 of 40.4 dBm at 70 MHz
P1dB of 20.4 dBm at 70 MHz
Noise Figure of 2.6 dB at 70 MHz
Single 5 V power supply
Power supply current of 90 mA per amplifier
ADL5531 20 dB gain single-channel version
+ 1 kV ESD (Class 1C)
12 CLIN1
11 NC
1
2
3
4
NC
NC
NC
NC
Bias
ADL5534
10 NC
Bias
9
NC
Figure 1. Block Diagram
GENERAL DESCRIPTION
The ADL5534 contains two independent broadband, fixed-gain,
linear amplifiers that operates at frequencies up to 500 MHz.
The device can be used in a wide variety of applications
including cellular, satellite, broadband, and instrumentation
equipment.
The ADL5534 is fabricated on a GaAs HBT process, and has an
ESD rating of + 1 kV (Class 1C). The device is packaged in a 16-
lead 5mm x 5mm LFCSP that uses an exposed paddle for
excellent thermal impedance.
The ADL5534 consumes 90 mA per channel on a single +5 V
supply and is fully specified for operation from −40°C to
+85°C.
The ADL5534 has a fixed gain 20 dB and is stable over
frequency, temperature, power supply and from device to
device. The ADL5534 is single-ended and internally matched
to 50 Ω. Only input/output ac-coupling capacitors, power
supply decoupling capacitors, and an external bias inductor is
required for operation for each channel.
The ADL5531 is the 20 dB gain single-channel version, and
fully populated evaluation boards for each IFA are available.
Rev. PrE 2/08
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2008 Analog Devices, Inc. All rights reserved.
ADL5534
Preliminary Technical Data
TABLE OF CONTENTS
Features .............................................................................................. 1
ESD Caution...................................................................................4
Pin Configuration and Function Descriptions..............................5
Typical Performance Characteristics ..............................................6
EVALUATION BOARD ...................................................................7
OUTLINE DIMENSIONS ...............................................................9
ORDERING GUIDE.....................................................................9
Functional Block Diagram .............................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Absolute Maximum Ratings............................................................ 4
REVISION HISTORY
2/08—Rev. PrE: Preliminary Version
Rev. PrE | Page 2 of 9
Preliminary Technical Data
ADL5534
SPECIFICATIONS
VCC = 5 V, T = 25°C, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
OVERALL FUNCTION
Frequency Range
Gain vs. Frequency
Input Return Loss (S11)
Output Return Loss (S22)
20
500
MHz
dB
dB
50 MHz. Center Frequency = 190 MHz or 380 MHz
30 MHz to 500 MHz
30 MHz to 500 MHz
0.2
-10
-10
dB
Isolation (RFIN1 to RFOUT2 and RFIN2 Frequency = 200 MHz
to RFOUT1)
-36.5
dB
Isolation (RFIN1 to RFOUT2 and RFIN2 Frequency = 500 MHz
to RFOUT1)
-30.6
dB
FREQUENCY = 70 MHz
Gain
vs. Temperature
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
21.0
.25
20.4
40.4
2.6
dB
dB
dBm
dBm
dB
−40°C ≤ TA ≤ +85°C
∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone)
FREQUENCY = 190 MHz
Gain
vs. Temperature
20.4
.25
dB
dB
−40°C ≤ TA ≤ +85°C
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
20.6
38.9
2.8
dBm
dBm
dB
∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone)
FREQUENCY = 380 MHz
Gain
vs. Temperature
19.8
.25
dB
dB
−40°C ≤ TA ≤ +85°C
Output 1 dB Compression Point
Output Third-Order Intercept
Noise Figure
20.4
36.3
3.0
dBm
dBm
dB
∆f = 1 MHz, Output Power (POUT) = 0 dBm (per tone)
Pins RFOUT, Vcc
POWER INTERFACE
Supply Voltage
Supply Current
vs. Temperature
Power Dissipation
4.75
5
90
104
450
5.25
V
mA
mA
Current Consumption is Specified Per Amplifier
−40°C ≤ TA ≤ +85°C (Specified Per Amplifier)
mW
VPOS = 5V (Specified Per Amplifier)
Rev. PrE | Page 3 of 9
ADL5534
Preliminary Technical Data
ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter
Supply Voltage, VPOS
Input Power Per Amplifier(re: 50 Ω)
Internal Power Dissipation Per Amplifier
(Paddle Soldered)
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rating
5.5 V
+12 dBm
650 mW
θJA (Paddle Soldered)
TBD °C/W
150 °C
−40°C to +85°C
−65°C to +150°C
240°C
Maximum Junction Temperature
Operating Temperature Range
Storage Temperature Range
(Soldering 60 sec)
ESD CAUTION
Rev. PrE | Page 4 of 9
Preliminary Technical Data
ADL5534
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
12 CLIN1
1
2
3
4
NC
NC
NC
NC
11 NC
10 NC
ADL5534
TOP VIEW
(Not to Scale)
9
NC
Figure 2.
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 2, 3, 4, 6, 9,
10, 11, 14, 15
NC
No connect.
5, 16
8, 13
RFIN2, RFIN1
RFOUT2,
RFOUT1
RF Input: Requires a DC blocking capacitor. Use a 10 nF capacitor for normal operation.
RF Output and Bias: DC bias is provided to this pin through an inductor. A 470 nH inductor is
recommended for normal operation. RF path requires a DC blocking capacitor. Use a 10 nF capacitor for
normal operation.
7, 12
CLIN2, CLIN1
A 1 nF capacitor connected between 7 and ground an Pin12 and ground provides decoupling for the on
board linearizer.
Exposed
Paddle
Internally connected to GND. Solder to a low impedance ground plane
Rev. PrE | Page 5 of 9
ADL5534
Preliminary Technical Data
TYPICAL PERFORMANCE CHARACTERISTICS
0
-5
45
40
35
30
25
-10
-15
-20
-25
-30
-35
-40
-45
-50
-55
S11
S22
S12
20
Gain
NF
15
10
5
OIP3
P1dB
0
0
50
100
150
200
250
300
350
400
450
500
0
100
200
300
400
500
600
Freq (MHz)
Freq (MHz)
Figure 3 ADL5534 Gain, Noise Figure, OIP3 and P1dB vs Frequency
Figure 5 ADL5534 Input / Output Return Loss and Reverse Isolation vs
Frequency
48
46
44
42
40
38
36
34
32
30
28
26
24
22
-10
-20
-30
-40
-50
-60
20 MHz
70 MHz
190 MHz
380 MHz
500 Mhz
-70
RFIN2 to RF1OUT
RFIN1 to RF2OUT
-80
-90
-6
-4
-2
0
2
4
6
8
10
12
14
16
18
20
-100
Pout (dBm)
0
50
100
150
200
250
300
350
400
450
500
Freq (MHz)
Figure 4 ADL5534 OIP3 vs Pout and Frequency
Figure 6. ADL5534 Input to alternate Output Isolation
Rev. PrE | Page 6 of 9
Preliminary Technical Data
EVALUATION BOARD
ADL5534
Applying 5 V toVpos1 will bias the amplifier corresponding to
RFIN2 – RFOUT2 To bias both amplifiers from a single supply,
connect 5V to Vpos or Vpos1 and attach a jumper across W3
Figure 7 shows the schematic for the ADL5534 evaluation
board. The board is powered by a single 5 V supply. The
components used on the board are listed in. Table 4
Transformers, T1 and T2 are provided so the ADL5534 maybe
configured as a balanced amplifier. Applying 5V to Vpos will
bias the amplifier corresponding to RFIN1 - RFOUT2.
Vpos
W1
Gnd
C9
C7
10 nF
1 uF
L1
470 nH
C2
10nF
C1
RFIN1
10nF
C11
C5
1 nF
R2
R1
R5
C13
Open
open
CLIN1
12
open
Open
Open
1
2
3
4
NC
1
C15
T1
11
Z1
NC
NC
NC
NC
NC
R6
ADT2-1T-1P
T2
R7
ADL5534
Open
C12
ADT2-1T-1P
Open
10
9
open
Open
1
R8 Open
C16
open
NC
R3
RFIN2
open
R4
Open
C14
Open
C3
10nF
C4
10nF
C6
1 nF
L2
470 nH
Vpos1
Vpos1
W3
Vpos
W2
C10
1 uF
C8
10 nF
Gnd
Figure 7. Evaluation Board Schematic
Table 4. Evaluation Board Configuration Options
Component
C1, C2, C3, C4
C5, C6
R1, R2, R3, R4, R5,
R6, R7 R8
Function
Default Value
10 nF 0402
1 nF 0603
AC-coupling capacitors.
Provides decoupling for the on board linearizer.
Optional components used for Configuring ADL5534 as a balanced amplifier.
Open 0603
MiniCircuits ADT2-1T-1P
T1, T2
T1 and T2 are 50 Ω t o100 Ω impedance transformers used to configure the ADL5534
as a balanced amplifier. T1 and T2 are used to present a 100 Ω differential impedance
to the ADL5534.
C11, C12, C13, C14, Optional components used for Configuring ADL5534 as a balanced amplifier.
C15, C16
C11-C14: Open 0402
C15,C16: Open 0402
C9, C10
C7, C8
L1, L2
Power Supply decoupling capacitors capacitor.
Power Supply decoupling capacitors capacitor.
DC bias inductor.
1 uF 0603
10 nF 0603
470 nH 1008CS
VCC & GND
Clip-on terminals for power supply.
VCC Red
GND Black
W1,W2
W3
2-pin jumper for connection of ground and supply via cable.
2-pin jumper use to connect Vpos to Vpos1
Open
Rev. PrE | Page 7 of 9
ADL5534
Preliminary Technical Data
Figure 9. Evaluation Board Layout (Bottom)
Figure 8. Evaluation Board Layout (Top)
Rev. PrE | Page 8 of 9
Preliminary Technical Data
ADL5534
OUTLINE DIMENSIONS
16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
5 x 5 mm Body, Very Thin Quad
(CP-16-6)
a
Dimensions shown in millimeters
5.00
BSC SQ
0.60 MAX
16
0.60 MAX
0.80 BSC
PIN 1
INDICATOR
13
12
1
PIN 1
INDICATOR
3.25
3.10 SQ
2.95
TOP
VIEW
EXPOSED
4.75
BSC SQ
PAD
(BOTTOM VIEW)
0.75
0.60
0.50
4
9
8
5
0.25 MIN
2.40 BSC
0.80 MAX
0.65 TYP
12° MAX
0.05 MAX
0.02 NOM
1.00
0.85
0.80
0.35
0.30
0.25
0.20 REF
COPLANARITY
0.08
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MO-220-VHHB
Figure 10. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
5mm × 5 mm Body, Very Thin, Quad Lead
CP-16-6
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
CP-16-6
Branding
Ordering
Quantity
ADL5534ACPZ-R71
ADL5534-EVALZ1
−40°C to +85°C
8-Lead LFCSP_VQ, Tape and Reel
Evaluation Board
1 Z = RoHS Compliant part.
©2008 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
PR06836-0-2/08(PrE)
Rev. PrE | Page 9 of 9
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ADI
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