ADA4853-2YCPZ-R7 [ADI]
IC 1 CHANNEL, VIDEO AMPLIFIER, QCC16, 3 X 3 MM, LEAD FREE, MO-220VEED-2, LFCSP-16, Audio/Video Amplifier;型号: | ADA4853-2YCPZ-R7 |
厂家: | ADI |
描述: | IC 1 CHANNEL, VIDEO AMPLIFIER, QCC16, 3 X 3 MM, LEAD FREE, MO-220VEED-2, LFCSP-16, Audio/Video Amplifier 放大器 |
文件: | 总16页 (文件大小:425K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Low Power, Rail-to-Rail Output,
Video Op Amp with Ultralow Power Disable
ADA4853-1/ADA4853-2
FEATURES
PIN CONFIGURATION
Ultralow power-down current: 0.1 μA
Low quiescent current: 1.4 mA/amplifier
Ideal for standard definition video
High speed
ADA4853-1
V
1
2
3
6
5
4
+V
S
OUT
–V
S
POWER DOWN
–IN
+IN
100 MHz, −3 dB bandwidth
120 V/μs slew rate
0.5 dB flatness: 22 MHz
TOP VIEW
(Not to Scale)
Figure 1. 6-Lead SC70
Differential gain: 0.20%
Differential phase: 0.10°
Single-supply operation
Output swings to within 200 mV of either rail
Rail-to-rail output
Low voltage offset: 2 mV
Wide supply range: 2.65 V to 5 V
ADA4853-2
V
1
1
12 +V
OUT
S
–IN1
+IN1
2
3
4
11
V
2
OUT
10 –IN2
+IN2
–V
S
9
APPLICATIONS
Portable multimedia players
Video cameras
Digital still cameras
Consumer video
NC = NO CONNECT
Figure 2. Dual 16-Lead LFCSP_VQ
GENERAL DESCRIPTION
The ADA4853-1/ADA4853-2 are low power, low cost, high
speed, rail-to-rail output op amps with ultralow power disable
that are ideal for portable consumer electronics. Despite their
low price, the ADA4853-1/ADA4853-2 provide excellent overall
performance and versatility. The 100 MHz, −3 dB bandwidth
and 120 V/μs slew rate make these amplifiers well-suited for
many general-purpose, high speed applications.
With their combination of low price, excellent differential gain
(0.2%), differential phase (0.10°), and 0.5 dB flatness out to
22 MHz, these amplifiers are ideal for video applications.
The ADA4853-1 is available in a 6-lead SC70 package. The
ADA4853-2 is available in a 16-lead LFCSP_VQ. The
ADA4853-1 works in the extended industrial temperature range
(−40°C to +85°C), and the ADA4853-2 works in the automotive
temperature range (−40°C to +105°C).
The ADA4853-1/ADA4853-2 voltage feedback op amps are
designed to operate at supply voltages as low as 2.65 V and up to
5 V using only 1.4 mA of supply current per amplifier. To further
reduce power consumption, the amplifiers are equipped with a
power-down mode that lowers the supply current to less than
1.5 μA max, making them ideal in battery-powered applications.
6.5
0.1V p-p
V
R
= 5V
= 150Ω
S
L
6.4
6.3
G = +2
6.2
6.1
6.0
2.0V p-p
The ADA4853-1/ADA4853-2 provide users with a true single-
supply capability, allowing input signals to extend 200 mV
below the negative rail and to within 1.2 V of the positive rail.
On the output, the amplifiers can swing within 200 mV of
either supply rail.
5.9
5.8
5.7
5.6
5.5
0.1
1
10
40
FREQUENCY (MHz)
Figure 3. 0.5 dB Flatness Frequency Response
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registeredtrademarks arethe property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
www.analog.com
©2006 Analog Devices, Inc. All rights reserved.
ADA4853-1/ADA4853-2
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Circuit Description......................................................................... 13
Headroom Considerations........................................................ 13
Overload Behavior and Recovery ............................................ 13
Applications..................................................................................... 14
Single-Supply Video Amplifier................................................. 14
Power Supply Bypassing............................................................ 14
Layout .......................................................................................... 14
Outline Dimensions....................................................................... 15
Ordering Guide .......................................................................... 15
Applications....................................................................................... 1
Pin Configuration............................................................................. 1
General Description......................................................................... 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Specifications with 3 V Supply ................................................... 3
Specifications with 5 V Supply ................................................... 4
Absolute Maximum Ratings............................................................ 5
Thermal Resistance ...................................................................... 5
ESD Caution.................................................................................. 5
REVISION HISTORY
Changes to Figure 31 through Figure 35..................................... 10
Changes to Figure 37, Figure 39 through Figure 42 .................. 11
Inserted Figure 43 and Figure 46.................................................. 12
Inserted Figure 47........................................................................... 13
Changes to Circuit Description Section...................................... 13
Changes to Headroom Considerations Section ......................... 13
Changes to Figure 48...................................................................... 14
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide.......................................................... 15
7/06—Rev. 0 to Rev. A
Added ADA4853-2.............................................................Universal
Changes to Features and General Description ............................. 1
Changes to Table 1............................................................................ 3
Changes to Table 2............................................................................ 4
Changes to Table 3............................................................................ 5
Changes to Figure 7,......................................................................... 6
Changes to Figure 11 Caption, Figure 12, Figure 13,
and Figure 16..................................................................................... 7
Changes to Figure 17 and Figure 19............................................... 8
Inserted Figure 21; Renumbered Sequentially.............................. 8
Inserted Figure 25; Renumbered Sequentially.............................. 9
Changes to Figure 28........................................................................ 9
1/06—Revision 0: Initial Version
Rev. A | Page 2 of 16
ADA4853-1/ADA4853-2
SPECIFICATIONS
SPECIFICATIONS WITH 3 V SUPPLY
TA = 25°C, RF = 1 kΩ, RG = 1 kΩ for G = +2, RL = 150 Ω, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth
G = +1, VO = 0.1 V p-p
G = +2, VO = 2 V p-p
G = +2, VO = 2 V p-p, RL = 150 Ω
VO = 2 V step
90
32
22
45
MHz
MHz
MHz
ns
Bandwidth for 0.5 dB Flatness
Settling Time to 0.1%
Slew Rate
G = +2, VO = 2 V step
88
100
V/μs
NOISE/DISTORTION PERFORMANCE
Differential Gain
Differential Phase
Input Voltage Noise
Input Current Noise
Crosstalk
RL = 150 Ω
RL = 150 Ω
f = 100 kHz
f = 100 kHz
0.20
0.10
22
2.2
−66
%
Degrees
nV/√Hz
pA/√Hz
dB
G = +2, VO = 2 V p-p, RL = 150 Ω, f = 5 MHz
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Bias Current Drift
Input Bias Offset Current
Open-Loop Gain
2
3.3
1.6
mV
μV/°C
μA
nA/°C
nA
dB
1.6
1.0
4
50
80
VO = 0.5 V to 2.5 V
72
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Differential/common mode
0.5/20
0.6
−0.2 to +VCC − 1.2
MΩ
pF
V
Input Common-Mode Voltage Range
Input Overdrive Recovery Time (Rise/Fall) VIN = −0.5 V to +3.5 V, G = +1
40
−85
ns
dB
Common-Mode Rejection Ratio
POWER-DOWN
VCM = 0.5 V
−70
Power-Down Input Voltage
Turn-Off Time
Turn-On Time
Power-down
1.2
1.4
120
V
μs
ns
Power-Down Bias Current
Enabled
Power-Down
Power-down = 3.0 V
Power-down = 0 V
25
0.01
30
μA
μA
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
Output Voltage Swing
Short-Circuit Current
POWER SUPPLY
VIN = −0.25 to +1.75 V, G = +2
RL = 150 Ω
Sinking/sourcing
70
ns
V
mA
0.3 to 2.7 0.15 to 2.88
150/120
Operating Range
Quiescent Current
Quiescent Current (Power-Down)
Positive Power Supply Rejection
Negative Power Supply Rejection
2.65
1.3
5
1.5
1.5
V
mA/amplifier
Power-down = low
+VS = +1.5 V to +2.5 V, −VS = −1.5 V
−VS = −1.5 V to −2.5 V, +VS = +1.5 V
0.1
μA
dB
dB
−76
−79
−86
−88
Rev. A | Page 3 of 16
ADA4853-1/ADA4853-2
SPECIFICATIONS WITH 5 V SUPPLY
TA = 25°C, RF = 1 kΩ, RG = 1 kΩ for G = +2, RL = 150 Ω, unless otherwise noted.
Table 2.
Parameter
Conditions
Min
Typ
Max Unit
DYNAMIC PERFORMANCE
−3 dB Bandwidth
G = +1, VO = 0.1 V p-p
G = +2, VO = 2 V p-p
G = +2, VO = 2 V p-p
VO = 2 V step
100
35
22
54
120
MHz
MHz
MHz
ns
Bandwidth for 0.5 dB Flatness
Settling Time to 0.1%
Slew Rate
G = +2, VO = 2 V step
93
V/μs
NOISE/DISTORTION PERFORMANCE
Differential Gain
Differential Phase
Input Voltage Noise
Input Current Noise
Crosstalk
RL = 150 Ω
RL = 150 Ω
f = 100 kHz
f = 100 kHz
0.22
0.10
22
2.2
−66
%
Degrees
nV/√Hz
pA/√Hz
dB
G = +2, VO = 2 V p-p, RL = 150 Ω, f = 5 MHz
DC PERFORMANCE
Input Offset Voltage
Input Offset Voltage Drift
Input Bias Current
Input Bias Current Drift
Input Bias Offset Current
Open-Loop Gain
2
3.3
1.6
mV
μV/°C
μA
nA/°C
nA
dB
1.6
1.0
4
60
80
VO = 0.5 V to 4.5 V
72
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
Differential/common mode
0.5/20
0.6
−0.2 to
MΩ
pF
V
Input Common-Mode Voltage Range
+VCC − 1.2
Input Overdrive Recovery Time (Rise/Fall)
Common-Mode Rejection Ratio
POWER-DOWN
VIN = −0.5 V to +5.5 V, G = +1
VCM = 0.5 V
40
−88
ns
dB
−72
Power-Down Input Voltage
Turn-Off Time
Turn-On Time
Power-down
1.2
1.5
120
V
μs
ns
Power-Down Bias Current
Enabled
Power-Down
Power-down = 5 V
Power-down = 0 V
40
0.01
50
μA
μA
OUTPUT CHARACTERISTICS
Output Overdrive Recovery Time
Output Voltage Swing
Short-Circuit Current
VIN = −0.25 V to +2.75 V, G = +2
RL = 75 Ω
Sinking/sourcing
55
0.1 to 4.8
160/120
ns
V
mA
0.55 to 4.5
2.65
POWER SUPPLY
Operating Range
5
V
Quiescent Current
1.4
0.1
−80
−80
1.6
1.5
mA/amplifier
Quiescent Current (Power-Down)
Positive Power Supply Rejection
Negative Power Supply Rejection
Power-down = low
+VS = +2.5 V to +3.5 V, −VS = −2.5 V
−VS = −2.5 V to −3.5 V, +VS = +2.5 V
μA
dB
dB
−75
−75
Rev. A | Page 4 of 16
ADA4853-1/ADA4853-2
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
The power dissipated in the package (PD) for a sine wave and a
resistor load is the total power consumed from the supply
minus the load power.
Rating
Supply Voltage
Power Dissipation
5.5 V
See Figure 4
−VS − 0.2 V to +VS − 1.2 V
VS
−65°C to +125°C
PD = Total Power Consumed − Load Power
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
6-Lead SC70
16-Lead LFCSP_VQ
Lead Temperature
Junction Temperature
2
VOUT
PD =
VSUPPLY VOLTAGE × ISUPPLY CURRENT
)
–
RL
RMS output voltages should be considered.
−40°C to +85°C
−40°C to +105°C
JEDEC J-STD-20
150°C
Airflow increases heat dissipation, effectively reducing θJA.
In addition, more metal directly in contact with the package
leads and through holes under the device reduces θJA.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the 6-lead SC70
(430°C/W) and for the 16-lead LFCSP_VQ (63°C/W) on a
JEDEC standard 4-layer board. θJA values are approximations.
2.5
2.0
THERMAL RESISTANCE
LFCSP-16
θJA is specified for the worst-case conditions, that is, θJA is
specified for device soldered in circuit board for surface-mount
packages.
1.5
1.0
Table 4. Thermal Resistance
SC70-6
Package Type
θJA
430
63
Unit
°C/W
°C/W
6-Lead SC70
16-Lead LFCSP_VQ
0.5
0
Maximum Power Dissipation
–55
–35
–15
5
25
45
65
85
105
125
AMBIENT TEMPERATURE (°C)
The maximum safe power dissipation for the ADA4853-1/
ADA4853-2 is limited by the associated rise in junction
temperature (TJ) on the die. At approximately 150°C, which is
the glass transition temperature, the plastic changes its properties.
Even temporarily exceeding this temperature limit can change
the stresses that the package exerts on the die, permanently
shifting the parametric performance of the amplifiers. Exceeding
a junction temperature of 150°C for an extended period can
result in changes in silicon devices, potentially causing
degradation or loss of functionality.
Figure 4. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. A | Page 5 of 16
ADA4853-1/ADA4853-2
TYPICAL PERFORMANCE CHARACTERISTICS
2
5
4
V
R
V
= 5V
= 150ꢀ
C = 10pF/25ꢀ SNUB
L
S
G = –1
L
C
= 10pF
L
1
= 0.1V p-p
OUT
3
G = +1
C
= 5pF
L
0
2
G = +2
1
–1
–2
G = +10
0
C
= 0pF
L
–1
–2
–3
–4
–5
–6
–3
–4
R
SNUB
V
R
= 5V
= 150ꢀ
= 0.1V p-p
S
–5
–6
C
R
L
L
L
V
OUT
0.1
1
10
FREQUENCY (MHz)
100 200
0.1
1
10
100 200
FREQUENCY (MHz)
Figure 8. Small Signal Frequency Response for Various Capacitive Loads
Figure 5. Small Signal Frequency Response for Various Gains
6.5
3
V
R
= 5V
= 150ꢀ
0.1V p-p
S
L
V
= 5V
R = 75ꢀ
L
S
6.4
6.3
G = +1
= 0.1V p-p
2
1
G = +2
V
OUT
6.2
6.1
6.0
0
R
= 1kꢀ
L
–1
2.0V p-p
R
= 150ꢀ
L
–2
–3
–4
5.9
5.8
5.7
5.6
5.5
–5
–6
0.1
1
10
40
0.1
1
10
100 200
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 6. Small Signal Frequency Response for Various Loads
Figure 9. 0.5 dB Flatness Response for Various Output Voltages
4
1
V
= 3V
S
G = +1
= 150ꢀ
G = –1
3
2
1
R
L
0
V
= 0.1V p-p
OUT
G = +2
G = +10
–1
V
= 5V
S
0
–2
–3
–4
–1
–2
–3
–4
V
R
V
= 5V
= 150ꢀ
–5
–6
S
–5
–6
L
= 2V p-p
OUT
0.1
1
10
100 200
0.1
1
10
100 200
FREQUENCY (MHz)
FREQUENCY (MHz)
Figure 10. Large Signal Frequency Response for Various Gains
Figure 7. Small Signal Frequency Response for Various Supplies
Rev. A | Page 6 of 16
ADA4853-1/ADA4853-2
7
250
200
150
100
50
V
R
= 5V
= 150ꢀ
S
L
G = +2
6
5
4
3
2
R = 75ꢀ
L
NEGATIVE SLEW RATE
R = 1kꢀ
L
R = 150ꢀ
L
POSITIVE SLEW RATE
V
V
= 5V
1
0
S
= 2V p-p
OUT
G = +2
0
0.1
1
10
FREQUENCY (MHz)
100 200
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
OUTPUT VOLTAGE STEP (V)
Figure 11. Large Signal Frequency Response for Various Loads
Figure 14. Slew Rate vs. Output Voltage
5
140
0
V
R
= 3V
= 150ꢀ
= 0.1V p-p
V = 5V
S
+85°C
S
R
= 150ꢀ
4
L
L
+25°C
120
100
80
–30
V
OUT
G = +1
3
2
–60
PHASE
GAIN
1
0
–90
–40°C
–120
–150
–180
–210
–240
60
–1
–2
40
–3
–4
–5
–6
20
0
–20
100
0.1
1
10
100 200
1k
10k
100k
1M
10M
100M
FREQUENCY (MHz)
FREQUENCY (Hz)
Figure 12. Small Signal Frequency Response for Various Temperatures
Figure 15. Open-Loop Gain and Phase vs. Frequency
4
–20
V
R
V
= 5V
= 150ꢀ
+85°C
S
V = 5V
S
L
3
2
+25°C
= 0.1V p-p
OUT
–30
–40
–50
–60
–70
–80
–90
G = +1
1
0
–40°C
–1
–2
–3
–4
–5
–6
0.1
1
10
FREQUENCY (MHz)
100 200
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 13. Small Signal Frequency Response for Various Temperatures
Figure 16. Common-Mode Rejection vs. Frequency
Rev. A | Page 7 of 16
ADA4853-1/ADA4853-2
0
–40
–50
V
= 5V
G = +2
S
V
V
= 3V
S
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
= 2V p-p
OUT
R
= 150ꢀ HD2
L
–PSR
R
= 150ꢀ HD3
L
–60
–70
–80
–90
R
= 1kꢀ HD3
L
+PSR
R
= 1kꢀ HD2
L
–100
–110
0.1
1
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (MHz)
FREQUENCY (Hz)
Figure 17. Power Supply Rejection vs. Frequency
Figure 20. Harmonic Distortion vs. Frequency
1000
100
10
–40
–50
V
= 5V
G = +2
S
G = +1
V
V
= 5V
S
R
= 150ꢀ HD3
L
= 2V p-p
OUT
–60
–70
R
= 150ꢀ HD2
L
R
= 1kꢀ HD3
L
–80
1
–90
R
= 1kꢀ HD2
L
–100
–110
–120
0.1
0.01
0.1
1
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (MHz)
FREQUENCY (Hz)
Figure 18. Output Impedance vs. Frequency Enabled
Figure 21. Harmonic Distortion vs. Frequency
10M
1M
–40
–50
–60
–70
–80
–90
V
= 5V
G = +1
= 5V
OUT
S
V
V
G = +1
S
= 2V p-p
R
= 150ꢀ HD3
L
R
= 150ꢀ HD2
L
100k
10k
1k
R
= 75ꢀ HD2
L
R
= 75ꢀ HD3
L
–100
–110
–120
R
= 1kꢀ HD2
L
100
10
R
= 1kꢀ HD3
L
0.1
1
10
100
1k
10k
100k
1M
10M
100M
FREQUENCY (MHz)
FREQUENCY (Hz)
Figure 22. Harmonic Distortion vs. Frequency
Figure 19. Output Impedance vs. Frequency Disabled
Rev. A | Page 8 of 16
ADA4853-1/ADA4853-2
–30
–40
–50
–60
–70
–80
–90
–100
2.60
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
2.40
G = +2
= 2V p-p
V
OUT
= 75ꢀ
R
L
G = +1; C = 5pF
L
V
= 3V HD3
G = +2; C = 0pF, 5pF, 10pF
L
S
V
= 5V HD2
S
V
= 3V HD2
S
V
= 5V HD3
S
V
R
= 5V
= 150ꢀ
S
L
25ns/DIV
0.1
1
10
FREQUENCY (MHz)
Figure 26. Small Signal Pulse Response for Various Capacitive Loads
Figure 23. Harmonic Distortion vs. Frequency
–40
–50
–60
–70
–80
–90
3.75
G = +1
G = +2
V
R
= 5V
= 150ꢀ
5V
S
L
R
= 150ꢀ
3.50
3.25
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
L
25ns/DIV
V
= 3V, 5V
S
f = 100kHz
2V
GND
–100
–110
–120
HD2
HD3
0
1
2
3
4
V
(V p-p)
OUT
Figure 24. Harmonic Distortion for Various Output Voltages
Figure 27. Large Signal Pulse Response for Various Supplies
2.60
3.75
G = +2
G = +2
R
= 150ꢀ
2.58
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.42
2.40
L
V
= 5V
3.50
3.25
3.00
2.75
2.50
2.25
2.00
1.75
1.50
1.25
S
25ns/DIV
V
= 3V
R
= 150ꢀ
S
L
25ns/DIV
C
= 0pF, 20pF
L
V
= 5V
S
Figure 25. Small Signal Pulse Response for Various Supplies
Figure 28. Large Signal Pulse Response for Various Capacitive Loads
Rev. A | Page 9 of 16
ADA4853-1/ADA4853-2
100
10
1
5.5
V
= 5V
S
2 × INPUT
G = +2
= 150ꢀ
R
L
4.5
f = 1MHz
OUTPUT
3.5
2.5
1.5
0.5
–0.5
10
100
1k
10k
100k
1M
10M
100ns/DIV
FREQUENCY (Hz)
Figure 29. Output Overdrive Recovery
Figure 32. Current Noise vs. Frequency
5.5
4.5
20
18
16
14
12
10
8
V
= 5V
V
= 5V
S
INPUT
S
G = +1
= 150ꢀ
N = 155
x = –0.370mV
σ = 0.782
R
L
f = 1MHz
OUTPUT
3.5
2.5
1.5
6
4
0.5
2
–0.5
0
–4
–3
–2
–1
0
1
2
3
4
100ns/DIV
V
(mV)
OFFSET
Figure 33. VOS Distribution
Figure 30. Input Overdrive Recovery
–0.6
–0.8
1000
V
= 5V
S
–1.0
–1.2
100
–1.4
–1.6
–1.8
–2.0
10
10
–1.0 –0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
(V)
100
1k
10k
100k
1M
10M
V
CM
FREQUENCY (Hz)
Figure 31. Voltage Noise vs. Frequency
Figure 34. VOS vs. Common-Mode Voltage
Rev. A | Page 10 of 16
ADA4853-1/ADA4853-2
3.0
2.8
2.6
1.5
V
= 5V, T = +85°C
S
V
= 3V
S
LOAD RESISTANCE TIED
TO MIDSUPPLY
POSITIVE SWING
V
= 5V, T = –40°C
S
V
= 5V, T = +25°C
S
1.0
0.5
0
V
= 3V, T = –40°C
S
V
= 3V, T = +25°C
S
2.4
0.6
V
= 3V, T = +85°C
S
0.4
0.2
0
NEGATIVE SWING
10
0
0.5
1.0
1.5
2.0 2.5
3.0
3.5
4.0 4.5
5.0
1
100
1k
10k
POWER DOWN VOLTAGE (V)
LOAD RESISTANCE (ꢀ)
POWER DOWN
Figure 35. Supply Current vs.
Voltage
Figure 38. Output Voltage vs. Load Resistance
5.0
4.8
4.6
–0.6
–0.7
V
= 5V
S
LOAD RESISTANCE TIED
TO MIDSUPPLY
POSITIVE SWING
V
= 5V
S
V
= 3V
S
4.4
0.6
–0.8
–0.9
–1.0
0.4
0.2
0
NEGATIVE SWING
100
–50
–25
0
25
50
75
100
10
1k
10k
TEMPERATURE (°C)
LOAD RESISTANCE (ꢀ)
Figure 36. Input Offset Voltage vs. Temperature
Figure 39. Output Voltage vs. Load Resistance
–0.50
–0.52
–0.54
–0.56
–0.58
–0.60
–0.62
–0.64
–0.66
–0.68
3.0
V
= 3V
S
2.9
2.8
2.7
2.6
POSITIVE SWING
V
= 5V
S
2.5
0.5
+I
B
0.4
0.3
0.2
0.1
0
V
= 3V
S
NEGATIVE SWING
–I
B
–40
–20
0
20
40
60
80
0
5
10
15
20
25
30
35
40
45
50
TEMPERATURE (°C)
LOAD CURRENT (mA)
Figure 37. Input Bias Current vs. Temperature
Figure 40. Output Voltage vs. Load Current
Rev. A | Page 11 of 16
ADA4853-1/ADA4853-2
5.0
4.9
6
5
4
3
2
1
3
2
V
= 5V
S
POWER DOWN
G = +2
V
= 5V
S
IN
f
= 100kHz
4.8
POSITIVE SWING
4.7
V
4.6
OUT
4.5
0.5
1
0
0.4
0.3
NEGATIVE SWING
0.2
0
0.1
0
–1
0
1
2
3
4
5
6
7
8
9
10
0
5
10
15
20
25
30
35
40
45
50
TIME (µs)
LOAD CURRENT (mA)
Figure 41. Output Voltage vs. Load Current
Figure 44. Enable/Disable Time
0.25
–40
R
= 150ꢀ
V
= 5V
L
S
G = +2
R
= 150ꢀ
= 2V p-p
+V
L
SAT
–50
–60
V
0.20
0.15
0.10
0.05
0
OUT
V
= 5V
S
V
2 TO V 1
OUT
OUT
–70
V
1 TO V 2
OUT
OUT
–V
V
= 3V
SAT
S
–80
–90
–100
100k
–40
–20
0
20
40
60
80
1M
10M
FREQUENCY (Hz)
100M 200M
TEMPERATURE (°C)
Figure 45. Crosstalk vs. Frequency
Figure 42. Output Saturation Voltage vs. Temperature for Various Supplies
0
3.0
V
R
= 5V
= 150ꢀ
= 2V p-p
S
V
OUTPUT
V
= 5V
S
L
3.1
2.9
2.8
2.7
2.6
2.5
L
R
= 150ꢀ
V
OUT
G = +2
–20
–40
2V
INPUT
+0.001
(+0.1%)
2V
V
INPUT – OUTPUT
–0.001
(–0.1%)
2.4
2.3
2.2
–60
–80
2.1
2.0
1.9
–100
0.1
1
10
100 200
0
10 20 30 40 50 60 70 80 90 100 110 120 130 140 150
TIME (ns)
FREQUENCY (MHz)
Figure 46. Input-to-Output Isolation, Chip Disabled
Figure 43. 0.1% Settling Time
Rev. A | Page 12 of 16
ADA4853-1/ADA4853-2
CIRCUIT DESCRIPTION
The ADA4853-1/ADA4853-2 feature a high slew rate input
stage that is a true single-supply topology capable of sensing
signals at or below the minus supply rail. The rail-to-rail output
stage can pull within 100 mV of either supply rail when driving
light loads and within 200 mV when driving 150 Ω. High speed
performance is maintained at supply voltages as low as 2.65 V.
For signals approaching the minus supply and inverting gain
and high positive gain configurations, the headroom limit is the
output stage. The ADA4853-1/ADA4853-2 use a common
emitter output stage. This output stage maximizes the available
output range, limited by the saturation voltage of the output
transistors. The saturation voltage increases with the drive
current that the output transistor is required to supply due to
the output transistor’s collector resistance.
HEADROOM CONSIDERATIONS
The ADA4853-1/ADA4853-2 are designed for use in low
voltage systems. To obtain optimum performance, it is useful to
understand the behavior of the amplifiers as input and output
signals approach their headroom limits. The amplifiers’ input
common-mode voltage range extends from the negative supply
voltage (actually 200 mV below this) to within 1.2 V of the
positive supply voltage.
As the saturation point of the output stage is approached, the
output signal shows increasing amounts of compression and
clipping. As in the input headroom case, higher frequency
signals require a bit more headroom than the lower frequency
signals. Figure 24 illustrates this point by plotting the typical
distortion vs. the output amplitude.
OVERLOAD BEHAVIOR AND RECOVERY
Input
Exceeding the headroom limits is not a concern for any
inverting gain on any supply voltage, as long as the reference
voltage at the amplifiers’ positive input lies within the
amplifiers’ input common-mode range.
The specified input common-mode voltage of the ADA4853-1/
ADA4853-2 is 200 mV below the negative supply to within
1.2 V of the positive supply. Exceeding the top limit results in
lower bandwidth and increased rise time. Pushing the input
voltage of a unity-gain follower to less than 1.2 V from the
positive supply leads to an increasing amount of output error as
well as increased settling time. The recovery time from input
voltages 1.2 V or closer to the positive supply is approximately
40 ns; this is limited by the settling artifacts caused by
transistors in the input stage coming out of saturation.
The input stage is the headroom limit for signals approaching
the positive rail. Figure 47 shows a typical offset voltage vs. the
input common-mode voltage for the ADA4853-1/ADA4853-2
on a 5 V supply. Accurate dc performance is maintained from
approximately 200 mV below the minus supply to within 1.2 V
of the positive supply. For high speed signals, however, there are
other considerations. As the common-mode voltage gets within
1.2 V of positive supply, the amplifier responds well but the
bandwidth begins to drop as the common-mode voltage
approaches the positive supply. This can manifest itself in
increased distortion or settling time. Higher frequency signals
require more headroom than the lower frequencies to maintain
distortion performance.
The amplifiers do not exhibit phase reversal, even for input
voltages beyond the voltage supply rails. Going more than
0.6 V beyond the power supplies turns on protection diodes
at the input stage, greatly increasing the current draw of the
devices.
–0.6
V
= 5V
S
–0.8
–1.0
–1.2
–1.4
–1.6
–1.8
–2.0
–1.0 –0.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
(V)
V
CM
Figure 47. VOS vs. Common-Mode Voltage, VS = 5 V
Rev. A | Page 13 of 16
ADA4853-1/ADA4853-2
APPLICATIONS
SINGLE-SUPPLY VIDEO AMPLIFIER
LAYOUT
With low differential gain and phase errors and wide 0.5 dB
flatness, the ADA4853-1/ADA4853-2 are ideal solutions for
portable video applications. Figure 48 shows a typical video
driver set for a noninverting gain of +2, where RF = RG = 1 kΩ.
The video amplifier input is terminated into a shunt 75 Ω
resistor. At the output, the amplifier has a series 75 Ω resistor
for impedance matching to the video load.
As is the case with all high speed applications, careful attention
to printed circuit board (PCB) layout details prevents associated
board parasitics from becoming problematic. The ADA4853-1/
ADA4853-2 can operate up to 100 MHz; therefore, proper RF
design techniques must be employed. The PCB should have a
ground plane covering all unused portions of the component
side of the board to provide a low impedance return path.
Removing the ground plane on all layers from the area near and
under the input and output pins reduces stray capacitance.
Signal lines connecting the feedback and gain resistors should
be kept as short as possible to minimize the inductance and
stray capacitance associated with these traces. Termination
resistors and loads should be located as close as possible to their
respective inputs and outputs. Input and output traces should
be kept as far apart as possible to minimize coupling (crosstalk)
through the board. Adherence to microstrip or stripline design
techniques for long signal traces (greater than 1 inch) is
recommended. For more information on high speed board
layout, go to: www.analog.com to view A Practical Guide to
High-Speed Printed-Circuit-Board Layout.
When operating in low voltage, single-supply applications, the
input signal is only limited by the input stage headroom.
R
F
C1
2.2µF
+V
S
+
P
D
C2
0.01µF
R
G
75ꢀ CABLE
V
75ꢀ
OUT
U1
V
V
75ꢀ
IN
Figure 48. Video Amplifier
POWER SUPPLY BYPASSING
Attention must be paid to bypassing the power supply pins of
the ADA4853-1/ADA4853-2. High quality capacitors with low
equivalent series resistance (ESR), such as multilayer ceramic
capacitors (MLCCs), should be used to minimize supply voltage
ripple and power dissipation. A large, usually tantalum, 2.2 μF
to 47 μF capacitor located in proximity to the ADA4853-1/
ADA4853-2 is required to provide good decoupling for lower
frequency signals. The actual value is determined by the circuit
transient and frequency requirements. In addition, 0.1 μF MLCC
decoupling capacitors should be located as close to each of the
power supply pins as is physically possible, no more than
⅛ inch away. The ground returns should terminate immediately
into the ground plane. Locating the bypass capacitor return
close to the load return minimizes ground loops and improves
performance.
Rev. A | Page 14 of 16
ADA4853-1/ADA4853-2
OUTLINE DIMENSIONS
2.20
2.00
1.80
2.40
2.10
1.80
6
1
5
2
4
3
1.35
1.25
1.15
PIN 1
1.30 BSC
0.65 BSC
1.00
0.90
0.70
0.40
0.10
1.10
0.80
0.46
0.36
0.26
0.30
0.15
0.22
0.08
0.10 MAX
SEATING
PLANE
0.10 COPLANARITY
COMPLIANT TO JEDEC STANDARDS MO-203-AB
Figure 49. 6-Lead Thin Shrink Small Outline Transistor Package [SC70]
(KS-6)
Dimensions shown in millimeters
0.50
0.40
0.30
3.00
BSC SQ
0.60 MAX
PIN 1
INDICATOR
*
1.65
13
12
16
1
0.45
1.50 SQ
1.35
PIN 1
INDICATOR
2.75
BSC SQ
TOP
VIEW
EXPOSED
PAD
(BOTTOM VIEW)
4
9
8
5
0.50
BSC
0.25 MIN
1.50 REF
0.80 MAX
12° MAX
0.65 TYP
0.90
0.85
0.80
0.05 MAX
0.02 NOM
SEATING
PLANE
0.30
0.23
0.18
0.20 REF
*
COMPLIANT TO JEDEC STANDARDS MO-220-VEED-2
EXCEPT FOR EXPOSED PAD DIMENSION.
Figure 50. 16-Lead Lead Frame Chip Scale Package [LFCSP_VQ]
3 mm × 3 mm Body, Very Thin Quad
(CP-16-3)
Dimensions shown in millimeters
ORDERING GUIDE
Temperature
Range
Ordering Package
Quantity Option
Model
Package Description
Branding
HEC
HEC
ADA4853-1AKSZ-R21 –40°C to +85°C
6-LeadThin Shrink Small OutlineTransistor Package (SC70)
6-LeadThin Shrink Small OutlineTransistor Package (SC70)
6-LeadThin Shrink Small OutlineTransistor Package (SC70)
250
KS-6
ADA4853-1AKSZ-R71
ADA4853-1AKSZ-RL1
ADA4853-2YCPZ-R21
ADA4853-2YCPZ-RL1
ADA4853-2YCPZ-R71
–40°C to +85°C
–40°C to +85°C
3,000
10,000
KS-6
KS-6
HEC
–40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_VQ)
–40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_VQ)
–40°C to +105°C 16-Lead Lead Frame Chip Scale Package (LFCSP_VQ)
CP-16-3
CP-16-3
CP-16-3
1 Z = Pb-free part.
Rev. A | Page 15 of 16
ADA4853-1/ADA4853-2
NOTES
©2006 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D05884-0-7/06(A)
Rev. A | Page 16 of 16
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