AD829AQ [ADI]
High Speed, Low Noise Video Op Amp; 高速，低噪声视频运算放大器
| 型号： | AD829AQ |
| 厂家： | 
ADI |
| 描述： | High Speed, Low Noise Video Op Amp |
| 文件： | 总16页 (文件大小：275K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Speed, Low Noise
Video Op Amp
AD829
FEATURES
High Speed
120 MHz Bandwidth, Gain = –1
230 V/s Slew Rate
CONNECTION DIAGRAMS
8-Lead
PDIP(N), Cerdip (Q), and SOIC (R) Packages
90 ns Settling Time to 0.1%
Ideal for Video Applications
0.02% Differential Gain
0.04؇ Differential Phase
Low Noise
1
2
3
4
8
7
6
5
OFFSET NULL
OFFSET NULL
AD829
+V
S
–IN
+IN
OUTPUT
TOP VIEW
(Not to Scale)
C
–V
S
COMP
1.7 nV/√Hz Input Voltage Noise
1.5 pA/√Hz Input Current Noise
Excellent DC Precision
20-Lead LCC Pinout
1 mV Max Input Offset Voltage (Over Temp)
0.3 mV/؇C Input Offset Drift
Flexible Operation
3
2
1 20 19
Specified for ؎5 V to ؎15 V Operation
؎3 V Output Swing into a 150 ⍀ Load
External Compensation for Gains 1 to 20
5 mA Supply Current
Available in Tape and Reel in Accordance with
EIA-481A Standard
18 NC
+V
4
5
6
7
8
NC
–IN
NC
+IN
NC
17
16 NC
AD829
TOP VIEW
(Not to Scale)
OUTPUT
15
14 NC
9
10 11 12 13
GENERAL DESCRIPTION
The AD829 is a low noise (1.7 nV/√Hz), high speed op amp
with custom compensation that provides the user with gains of
1 to 20 while maintaining a bandwidth greater than 50 MHz.
The AD829’s 0.04° differential phase and 0.02% differential
gain performance at 3.58 MHz and 4.43 MHz, driving reverse-
terminated 50 Ω or 75 Ω cables, makes it ideally suited for
professional video applications. The AD829 achieves its 230 V/µs
uncompensated slew rate and 750 MHz gain bandwidth while
requiring only 5 mA of current from power supplies.
NC = NO CONNECT
Operating as a traditional voltage feedback amplifier, the AD829
provides many of the advantages a transimpedance amplifier
offers. A bandwidth greater than 50 MHz can be maintained for
a range of gains through the replacement of the external com-
pensation capacitor. The AD829 and the transimpedance
amplifier are both unity gain stable and provide similar voltage
noise performance (1.7 nV/√Hz); however, the current noise of
the AD829 (1.5 pA/√Hz) is less than 10% of the noise of
transimpedance amps. The inputs of the AD829 are symmetrical.
The AD829’s external compensation pin gives it exceptional
versatility. For example, compensation can be selected to
optimize the bandwidth for a given load and power supply voltage.
As a gain-of-two line driver, the –3 dB bandwidth can be increased
to 95 MHz at the expense of 1 dB of peaking. The AD829’s
output can also be clamped at its external compensation pin.
PRODUCT HIGHLIGHTS
1. Input voltage noise of 2 nV/√Hz, current noise of 1.5 pA/√Hz,
and 50 MHz bandwidth, for gains of 1 to 20, make the AD829
an ideal preamp.
The AD829 exhibits excellent dc performance. It offers a mini-
mum open-loop gain of 30 V/mV into loads as low as 500 Ω,
low input voltage noise of 1.7 nV/√Hz, and a low input offset
voltage of 1 mV maximum. Common-mode rejection and power
supply rejection ratios are both 120 dB.
2. Differential phase error of 0.04° and a 0.02% differential
gain error, at the 3.58 MHz NTSC and 4.43 MHz PAL and
SECAM color subcarrier frequencies, make the op amp an
outstanding video performer for driving reverse-terminated
50 Ω and 75 Ω cables to 1 V (at their terminated end).
This op amp is also useful in multichannel, high speed data
conversion where its fast (90 ns to 0.1%) settling time is impor-
tant. In such applications, the AD829 serves as an input buffer
for 8-bit to 10-bit A/D converters and as an output I/V con-
verter for high speed DACs.
3. The AD829 can drive heavy capacitive loads.
4. Performance is fully specified for operation from 5 V to
15 V supplies.
5. The AD829 is available in plastic, CERDIP, and small outline
packages. Chips and MIL-STD-883B parts are also available.
The SOIC-8 package is available for the extended tempera-
ture range of –40°C to +125°C.
REV. G
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
(@ TA = 25؇C and VS = ؎15 V dc, unless otherwise noted.)
AD829–SPECIFICATIONS
AD829JR
AD829AR
AD829AQ/S
Model
Conditions
VS
5 V, 15 V
Min Typ Max Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE
0.2
1
1
0.2
1
1
0.1
0.5
0.5
mV
TMIN to TMAX
mV
Offset Voltage Drift
5 V, 15 V
5 V, 15 V
0.3
3.3
0.3
3.3
0.3
3.3
µV/°C
INPUT BIAS CURRENT
7
8.2
7
9.5
7
9.5
µA
µA
TMIN to TMAX
INPUT OFFSET CURRENT
5 V, 15 V
50
500
500
50
500
500
50
500
500
nA
nA
T
MIN to TMAX
Offset Current Drift
OPEN-LOOP GAIN
5 V, 15 V
5 V
0.5
0.5
0.5
nA/°C
VO
LOAD = 500 Ω
TMIN to TMAX
LOAD = 150 Ω
VOUT 10 V
RLOAD = 1 kΩ
MIN to TMAX
=
2.5 V
R
30
20
65
30
20
65
30
20
65
V/mV
V/mV
V/mV
R
40
40
40
=
15 V
50
20
100
85
50
20
100
85
50
20
100
85
V/mV
V/mV
V/mV
T
RLOAD = 500 Ω
DYNAMIC PERFORMANCE
Gain Bandwidth Product
5 V
15 V
600
750
600
750
600
750
MHz
MHz
Full Power Bandwidth1, 2
VO = 2 V p-p
RLOAD = 500 Ω
VO = 20 V p-p
RLOAD = 1 kΩ
RLOAD = 500 Ω
RLOAD = 1 kΩ
AV = –19
5 V
25
25
25
MHz
15 V
5 V
15 V
3.6
150
230
3.6
150
230
3.6
150
230
MHz
V/µs
V/µs
Slew Rate2
Settling Time to 0.1%
–2.5 V to +2.5 V
10 V Step
CLOAD = 10 pF
5 V
15 V
15 V
65
90
65
90
65
90
ns
ns
Phase Margin2
RLOAD = 1 kΩ
60
60
60
Degrees
%
DIFFERENTIAL GAIN ERROR3
DIFFERENTIAL PHASE ERROR3
COMMON-MODE REJECTION
RLOAD = 100 Ω
CCOMP = 30 pF
15 V
15 V
0.02
0.02
0.04
0.02
RLOAD = 100 Ω
CCOMP = 30 pF
0.04
0.04
Degrees
VCM
VCM
TMIN to TMAX
=
=
2.5 V
12 V
5 V
15 V
100
100
96
120
120
100
100
96
120
120
100
100
96
120
120
dB
dB
dB
POWER SUPPLY REJECTION
VS 4.5 V to 18 V
TMIN to TMAX
=
98
94
120
98
94
120
98
94
120
dB
dB
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
f = 1 kHz
15 V
15 V
1.7
1.5
2
1.7
2
1.7
1.5
2
nV/√Hz
pA/√Hz
f = 1 kHz
1.5
INPUT COMMON-MODE
VOLTAGE RANGE
5 V
+4.3
–3.8
+14.3
–13.8
+4.3
–3.8
+14.3
–13.8
+4.3
–3.8
+14.3
–13.8
V
V
V
V
15 V
OUTPUT VOLTAGE SWING
RLOAD = 500 Ω
RLOAD = 150 Ω
RLOAD = 50 Ω
RLOAD = 1 kΩ
RLOAD = 500 Ω
5 V
5 V
5 V
15 V
15 V
5 V, 15 V
3.0
2.5
3.6
3.0
1.4
13.3
12.2
32
3.0
2.5
3.6
3.0
1.4
13.3
12.2
3.0
2.5
3.6
3.0
1.4
13.3
12.2
32
V
V
V
V
V
mA
12
10
12
10
12
10
Short Circuit Current
32
INPUT CHARACTERISTICS
Input Resistance (Differential)
Input Capacitance (Differential)4
Input Capacitance (Common Mode)
13
5
1.5
13
5
1.5
13
5
1.5
kΩ
pF
pF
CLOSED-LOOP OUTPUT
RESISTANCE
AV = +1, f = 1 kHz
2
2
2
mΩ
–2–
REV. G
AD829
AD829JR
Typ
AD829AR
Min Typ Max
AD829AQ/S
Model
Conditions
VS
Min
Max
Min
Typ
Max
Unit
POWER SUPPLY
Operating Range
Quiescent Current
4.5
18
6.5
8.0
6.8
8.3
4.5
18
6.5
8.0
6.8
9.0
4.5
18
6.5
8.2/8.7 mA
V
mA
15 V
15 V
5
5
5
T
MIN to TMAX
5.3
5.3
5.3 6.8
mA
TMIN to TMAX
8.5/9.0 mA
TRANSISTOR COUNT
NOTES
Number of Transistors
46
46
46
1Full Power Bandwidth = Slew Rate/2 π VPEAK
.
2Tested at Gain = +20, CCOMP = 0 pF.
33.58 MHz (NTSC) and 4.43 MHz (PAL and SECAM).
4Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair.
Specifications subject to change without notice.
REV. G
–3–
AD829
ABSOLUTE MAXIMUM RATINGS1
METALLIZATION PHOTO
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Internal Power Dissipation2
PDIP (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3 W
SOIC (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.9 W
CERDIP (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.3 W
LCC (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.8 W
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . . . . 6 V
Output Short Circuit Duration . . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (Q, E) . . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD829J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
AD829A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +125°C
AD829S . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . . 300°C
NOTES
1 Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; the functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2 Maximum internal power dissipation is specified so that TJ does not exceed
150°C at an ambient temperature of 25°C.
SUBSTRATE CONNECTED TO +VS
2.5
2.0
1.5
1.0
0.5
0
PDIP
Thermal characteristics:
LCC
8-lead PDIP package: θJA = 100°C/W (derate at 8.7 mW/°C)
8-lead CERDIP package: θJA = 110°C/W (derate at 8.7 mW/°C)
20-lead LCC package: θJA = 77°C/W
8-lead SOIC package: θJA = 125°C/W (derate at 6 mW/°C).
3 If the differential voltage exceeds 6 V, external series protection resistors should
be added to limit the input current.
CERDIP
SOIC
–55–45–35–25–15 –5
5 15 25 35 45 55 65 75 85 95 105 115 125
AMBIENT TEMPERATURE (؇C)
Figure 1. Maximum Power Dissipation vs. Temperature
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although the
AD829 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended
to avoid performance degradation or loss of functionality.
–4–
REV. G
AD829
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option
AD829AR
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
–40°C to +125°C
0°C to 70°C
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic PDIP
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead Plastic SOIC
8-Lead CERDIP
8-Lead CERDIP
8-Lead CERDIP
8-Lead CERDIP
20-Lead LCC
R-8
R-8
R-8
R-8
R-8
R-8
N-8
R-8
R-8
AD829AR-REEL
AD829AR-REEL7
AD829ARZ*
AD829ARZ-REEL*
AD829ARZ-REEL7*
AD829JN
AD829JR
0°C to 70°C
AD829JR-REEL
AD829JR-REEL7
AD829AQ
0°C to 70°C
0°C to 70°C
R-8
–40°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Q-8
Q-8
Q-8
Q-8
E-20A
E-20A
AD829SQ
AD829SQ/883B
5962-9312901MPA
AD829SE/883B
5962-9312901M2A
AD829JCHIPS
AD829SCHIPS
20-Lead LCC
Die
Die
*Z = Pb-free part.
REV. G
–5–
AD829–Typical Performance Characteristics
20
15
10
5
30
25
20
15
20
15
10
5
؎15 V
SUPPLIES
+V
OUT
+V
OUT
–V
OUT
–V
OUT
10
5
؎5 V
SUPPLIES
R
= 1k⍀
LOAD
0
10
0
0
0
5
10
15
20
0
5
10
15
20
1k
100
LOAD RESISTANCE (⍀)
10k
SUPPLY VOLTAGE (؎V)
SUPPLY VOLTAGE ( V)
TPC 2. Output Voltage Swing
vs. Supply Voltage
TPC 3. Output Voltage Swing
vs. Resistive Load
TPC 1. Input Common-Mode
Range vs. Supply Voltage
6.0
5.5
5.0
4.5
4.0
–5
100
10
1
A
= +20
V
C
= 0pF
–
4
COMP
V
= ؎5V, ؎15V
S
0.1
–
3
A
C
= +1
V
= 68pF
COMP
0.01
–2
–60 –40 –20
0.001
0
5
10
15
20
1k
10k
100k
1M
10M
100M
0
20 40 60 80 100
140
120
SUPPLY VOLTAGE (؎V)
TEMPERATURE (؇C)
FREQUENCY (Hz)
TPC 4. Quiescent Current vs.
Supply Voltage
TPC 5. Input Bias Current vs.
Temperature
TPC 6. Closed-Loop Output
Impedance vs. Frequency
7
6
5
40
35
30
25
65
60
55
V
A
C
=
15V
S
NEGATIVE
CURRENT LIMIT
= +20
V
= 0pF
COMP
V
= ؎15V
S
POSITIVE
CURRENT LIMIT
V
= ؎5V
S
V
= ؎5V
S
4
3
50
45
20
15
–60 –40 –20
0
20 40 60 80 100
140
120
–60 –40 –20
0
20 40 60 80 100
140
120
–60 –40 –20
0
20 40 60 80 100
140
120
TEMPERATURE (؇C)
TEMPERATURE (؇C)
AMBIENT TEMPERATURE (؇C)
TPC 7. Quiescent Current vs.
Temperature
TPC 8. Short-Circuit Current
Limit vs. Temperature
TPC 9. –3 dB Bandwidth vs.
Temperature
–6–
REV. G
AD829
120
100
80
105
100
100
120
100
80
+
PHASE
SUPPLY
80
60
V
= ؎15V
S
GAIN
؎15V
95
90
85
80
75
SUPPLIES
1k⍀ LOAD
–SUPPLY
V
S
= ؎5V
60
40
20
GAIN
؎5V
60
SUPPLIES
500⍀ LOAD
40
20
0
C
= 0pF
COMP
40
20
0
C
= 0pF
COMP
–20
10M 100M
1k
10k
100k
1M
10M
100M
1k
10
100
10k
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
LOAD RESISTANCE (⍀)
TPC 12. Power Supply Rejection
Ratio (PSRR) vs. Frequency
TPC 10. Open-Loop Gain and
Phase Margin vs. Frequency
TPC 11. Open-Loop Gain vs.
Resistive Load
10
8
30
25
20
15
120
6
100
80
V
= 15V
S
4
R
A
= 1k⍀
= +20
L
V
2
ERROR
C
= 0pF
1% 0.1%
COMP
A
= –19
0
– 2
– 4
– 6
– 8
–10
V
V
=
5V
1%
0.1%
C
= 0pF
S
COMP
60
R
A
= 500⍀
= +20
L
V
10
C
= 0pF
100k
COMP
40
20
C
= 0pF
5
0
COMP
1k
10k
1M
10M
100M
0
20
40
60 80 100 120 140 160
1
10
INPUT FREQUENCY (MHz)
100
SETTLING TIME (ns)
FREQUENCY (Hz)
TPC 15. Output Swing and Error vs.
Settling Time
TPC 13. Common-Mode
Rejection Ratio vs. Frequency
TPC 14. Large Signal Frequency
Response
–20
–70
–75
–80
–85
–90
–95
–100
5
4
V
= 3V RMS
= –1
IN
THIRD HARMONIC
V
= 2.24V RMS
= –1
A
C
C
IN
V
A
R
C
C
= 30pF
= 100pF
–30
–40
–50
V
COMP
LOAD
= 250⍀
L
= 0
= 30pF
LOAD
COMP
R
= 500⍀
3
2
1
0
L
SECOND HARMONIC
–60
–70
R
= 2k⍀
L
–105
–110
0
500k
FREQUENCY (Hz)
1.5M
1.0M
2.0M
100
300
1k
3k
10k
30k
100k
10
100
1k
10k
100k
1M
10M
FREQUENCY (Hz)
FREQUENCY (Hz)
TPC 16. Total Harmonic
Distortion (THD) vs. Frequency
TPC 17. Second and Third
Harmonic Distortion vs.
Frequency
TPC 18. Input Voltage Noise
Spectral Density
REV. G
–7–
AD829
400
350
300
250
200
0.03
0.02
0.01
C
COMP
A
= +20
V
0.1F
(EXTERNAL)
SLEW RATE 10% to 90%
+V
S
RISE
DIFF GAIN
FALL
RISE
FALL
AD829
V
= ؎15V
S
0.043؇
DIFF PHASE
0.05
0.1F
20k⍀
0.04
0.03
150
100
V
= ؎5V
S
OFFSET
NULL
ADJUST
–60 –40 –20
0
20 40 60 80 100
140
120
؎5
؎10
SUPPLY VOLTAGE (V)
؎15
–V
S
TEMPERATURE (؇C)
TPC 19. Slew Rate vs. Temperature
TPC 20. Differential Gain and Phase
vs. Supply
Figure 2. Offset Null and
External Shunt Compensation
Connections
C
15pF
COMP
+15V
0.1F
50⍀
CABLE
HP8130A
50⍀
5ns RISE TIME
CABLE
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
AD829
50⍀
50⍀
5pF
300⍀
0.1F
–15V
300⍀
Figure 3a. Follower Connection. Gain = +2
Figure 3c. Gain-of-2 Follower Small
Signal Pulse Response
Figure 3b. Gain-of-2 Follower
Large Signal Pulse Response
–8–
REV. G
AD829
+15V
0.1F
50⍀
CABLE
100⍀
45⍀
HP8130A
FET PROBE
5ns RISE TIME
TEKTRONIX
TYPE 7A24
PREAMP
AD829
5⍀
2k⍀
1pF
0.1F
–15V
C
= 0pF
COMP
105⍀
Figure 4a. Follower Connection. Gain = +20
Figure 4b. Gain-of-20 Follower
Large Signal Pulse Response
Figure 4c. Gain-of-20 Follower
Small Signal Pulse Response
5pF
300⍀
+15V
0.1F
50⍀
CABLE
300⍀
HP8130A
50⍀
5ns RISE TIME
CABLE
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
AD829
50⍀
C
15pF
COMP
50⍀
0.1F
–15V
Figure 5a. Unity Gain Inverter Connection
Figure 5b. Unity Gain Inverter
Large Signal Pulse Response
Figure 5c. Unity Gain Inverter
Small Signal Pulse Response
REV. G
–9–
AD829
THEORY OF OPERATION
+V
S
The AD829 is fabricated on Analog Devices’ proprietary comple-
mentary bipolar (CB) process, which provides PNP and NPN
transistors with similar fTs of 600 MHz. As shown in Figure 6,
the AD829 input stage consists of an NPN differential pair in
which each transistor operates at 600 µA collector current. This
gives the input devices a high transconductance, which in turn
15⍀
15⍀
OUTPUT
gives the AD829 a low noise figure of 2 nV/√Hz @ 1 kHz.
R
500⍀
C
12.5pF
The input stage drives a folded cascode that consists of a fast
pair of PNP transistors. These PNPs drive a current mirror that
provides a differential-input-to-single-ended-output conversion.
The high speed PNPs are also used in the current-amplifying
output stage, which provides high current gain of 40,000. Even
under conditions of heavy loading, the high fTs of the NPN and
PNPs, produced using the CB process, permits cascading two
stages of emitter followers while maintaining 60° phase margin
at closed-loop bandwidths greater than 50 MHz.
+IN
–IN
1.2mA
–V
S
C
COMP
OFFSET NULL
Two stages of complementary emitter followers also effectively
buffer the high impedance compensation node (at the CCOMP pin)
from the output so the AD829 can maintain a high dc open-loop
gain, even into low load impedances: 92 dB into a 150 Ω load and
100 dB into a 1 kΩ load. Laser trimming and PTAT biasing
ensure low offset voltage and low offset voltage drift, enabling
the user to eliminate ac coupling in many applications.
Figure 6. Simplified Schematic
Shunt Compensation
Figures 7 and 8 show that shunt compensation has an external
compensation capacitor, CCOMP, connected between the com-
pensation pin and ground. This external capacitor is tied in
parallel with approximately 3 pF of internal capacitance at the
compensation node. In addition, a small capacitance, CLEAD
in parallel with resistor R2, compensates for the capacitance at
the amplifier’s inverting input.
,
For added flexibility, the AD829 provides access to the internal
frequency compensation node. This allows the user to customize
frequency response characteristics for a particular application.
Unity gain stability requires a compensation capacitance of 68 pF
(Pin 5 to ground), which will yield a small signal bandwidth of
66 MHz and slew rate of 16 V/µs. The slew rate and gain band-
width product will vary inversely with compensation capacitance.
Table I and Figure 8 show the optimum compensation capacitance
and the resulting slew rate for a desired noise gain. For gains
between 1 and 20, CCOMP can be chosen to keep the small signal
bandwidth relatively constant. The minimum gain that will still
provide stability depends on the value of external compensation
capacitance.
R2
C
LEAD
+V
S
0.1F
50⍀
COAX
CABLE
R1
V
IN
V
AD829
OUT
50⍀
1k⍀
C
COMP
An RC network in the output stage (Figure 6) completely
removes the effect of capacitive loading when the amplifier is
compensated for closed-loop gains of 10 or higher. At low frequen-
cies, and with low capacitive loads, the gain from the compensation
node to the output is very close to unity. In this case, C is
bootstrapped and does not contribute to the compensation
capacitance of the device. As the capacitive load is increased, a
pole is formed with the output impedance of the output stage
this reduces the gain, and subsequently, C is incompletely boot-
strapped. Therefore, some fraction of C contributes to the
compensation capacitance, and the unity gain bandwidth falls. As
the load capacitance is further increased, the bandwidth continues
to fall and the amplifier remains stable.
0.1F
–V
S
Figure 7. Inverting Amplifier Connection Using External
Shunt Compensation
+V
S
0.1F
50⍀
CABLE
V
IN
V
AD829
OUT
50⍀
R2
1k⍀
C
COMP
Externally Compensating the AD829
0.1F
C
LEAD
The AD829 is stable with no external compensation for noise
gains greater than 20. For lower gains, two different methods of
frequency compensating the amplifier can be used to achieve
closed-loop stability: shunt and current feedback compensation.
–V
S
R1
Figure 8. Noninverting Amplifier Connection Using
External Shunt Compensation
–10–
REV. G
AD829
Table I. Component Selection for Shunt Compensation
Slew
Follower
Gain
Inverter
Gain
R1
(⍀)
R2
(⍀)
CL
CCOMP
Rate
(V/s)
–3 dB Small Signal
Bandwidth (MHz)
(pF) (pF)
1
2
5
10
20
25
100
Open
1 k
100
1 k
2.0 k
2.05 k
2 k
0
5
1
0
0
0
0
68
25
7
3
0
16
38
90
130
230
230
230
66
71
76
65
55
39
7.5
–1
–4
–9
–19
–24
–99
511
226
105
105
20
2.49
2 k
0
0
then
Table I gives the recommended CCOMP and CLEAD values, as
well as the corresponding slew rates and bandwidth. The capacitor
values were selected to provide a small signal frequency response
with less than 1 dB of peaking and less than 10% overshoot. For
this table, supply voltages of 15 V should be used. Figure 9 is
a graphical extension of the table that shows the slew rate/gain
trade-off for lower closed-loop gains, when using the shunt
compensation scheme.
Slew Rate
kT
q
= 4 π
fT
This shows that the slew rate will be only 0.314 V/µs for every
MHz of bandwidth. The only way to increase slew rate is to
increase the fT, and that is difficult because of process limitations.
Unfortunately, an amplifier with a bandwidth of 10 MHz can
only slew at 3.1 V/µs, which is barely enough to provide a full
power bandwidth of 50 kHz.
1k
100
10
1
The AD829 is especially suited to a new form of compensation
that allows for the enhancement of both the full power band-
width and slew rate of the amplifier. The voltage gain from the
inverting input pin to the compensation pin is large; therefore, if
a capacitance is inserted between these pins, the amplifier’s
bandwidth becomes a function of its feedback resistor and the
capacitance. The slew rate of the amplifier is now a function of
its internal bias (2I) and the compensation capacitance.
SLEW RATE
C
COMP
100
Since the closed-loop bandwidth is a function of RF and CCOMP
(Figure 10), it is independent of the amplifier closed-loop gain,
as shown in Figure 12. To preserve stability, the time constant
of RF and CCOMP needs to provide a bandwidth of less than
65 MHz. For example, with CCOMP = 15 pF and RF = 1 kΩ, the
small signal bandwidth of the AD829 is 10 MHz. Figure 11 shows
that the slew rate is in excess of 60 V/µs. As shown in Figure 12,
the closed-loop bandwidth is constant for gains of –1 to –4; this is
a property of current feedback amplifiers.
V
= ؎15V
S
10
100
1
10
NOISE GAIN
Figure 9. Value of CCOMP and Slew Rate vs. Noise Gain
Current Feedback Compensation
Bipolar, nondegenerated, single pole, and internally compensated
amplifiers have their bandwidths defined as
R
F
1
I
C
COMP
fT
=
=
2 π re CCOMP
kT
q
2 π
CCOMP
0.1F
+V
S
50⍀
COAX
where
CABLE
R1
V
fT is the unity gain bandwidth of the amplifier.
I is the collector current of the input transistor.
COMP is the compensation capacitance.
IN
C *
1
V
AD829
IN4148
OUT
50⍀
C
R
1k⍀
L
0.1F
re is the inverse of the transconductance of the input transistors.
kT/q approximately equals 26 mV @ 27°C.
*RECOMMENDED VALUE
–V
S
OF C
FOR C
COMP
1
C
SHOULD NEVER EXCEED
<7pF
7pF
0pF
15pF
COMP
15pF FOR THIS CONNECTION
Since both fT and slew rate are functions of the same variables,
the dynamic behavior of an amplifier is limited. Since
Figure 10. Inverting Amplifier Connection Using Current
Feedback Compensation
2I
Slew Rate =
CCOMP
REV. G
–11–
AD829
Figure 11. Large Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation,
CCOMP = 15 pF, C1 = 15 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 13. Large Signal Pulse Response of the Inverting
Amplifier Using Current Feedback Compensation,
C
COMP = 1 pF, RF = 3 kΩ, R1 = 3 kΩ
15
GAIN = –4
12
–3dB @ 8.2MHz
9
GAIN = –2
6
–3dB @ 9.6MHz
3
GAIN = –1
0
–3dB @ 10.2MHz
–3
V
V
R
R
C
C
= –30dBM
= ؎15V
= 1k⍀
IN
–6
–9
S
L
F
= 1k⍀
= 15pF
–12
–15
COMP
= 15pF
1
100k
1M
10M
FREQUENCY (Hz)
100M
Figure 14. Small Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation,
CCOMP = 4 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 12. Closed-Loop Gain vs. Frequency for the Circuit
of Figure 9
Figure 13 is an oscilloscope photo of the pulse response of a
unity gain inverter that has been configured to provide a small
signal bandwidth of 53 MHz and a subsequent slew rate of
180 V/µs; resistor RF = 3 kΩ and capacitor CCOMP = 1 pF. Figure 14
shows the excellent pulse response as a unity gain inverter, this
using component values of RF = 1 kΩ and CCOMP = 4 pF.
15
C
= 2pF
= 3pF
= 4pF
GAIN = –4
GAIN = –2
COMP
12
9
C
COMP
6
3
Figures 15 and 16 show the closed-loop frequency response of the
AD829 for different closed-loop gains and different supply voltages.
GAIN = –1
C
COMP
0
–3
–6
–9
–12
–15
If a noninverting amplifier configuration using current feedback
compensation is needed, the circuit of Figure 17 is recommended.
This circuit provides a slew rate twice that of the shunt com-
pensated noninverting amplifier of Figure 18 at the expense of
gain flatness. Nonetheless, this circuit delivers 95 MHz bandwidth
with 1 dB flatness into a back terminated cable, with a differ-
ential gain error of only 0.01% and a differential phase error of
only 0.015° at 4.43 MHz.
V
= ؎15V
= 1k⍀
= 1k⍀
S
R
R
V
L
F
= –30dBM
IN
1
10
FREQUENCY (MHz)
100
Figure 15. Closed-Loop Frequency Response for the
Inverting Amplifier Using Current Feedback Compensation
–12–
REV. G
AD829
+15V
–17
–20
–23
0.1F
50⍀
COAX
CABLE
50⍀
COAX
V
؎5V
IN
CABLE
–26
–29
–32
–35
–38
–41
–44
–47
50⍀
2k⍀
AD829
V
OUT
؎15V
50⍀
50⍀
3pF
C
–15V
0.1F
COMP
V
R
R
= –20dBM
= 1k⍀
= 1k⍀
IN
L
2k⍀
F
GAIN = –1
= 4pF
C
COMP
Figure 17. Noninverting Amplifier Connection Using
Current Feedback Compensation
1
10
100
FREQUENCY (MHz)
+15V
Figure 16. Closed-Loop Frequency Response vs. Supply
for the Inverting Amplifier Using Current Feedback
Compensation
0.1F
75⍀
COAX
V
IN
CABLE
A Low Error Video Line Driver
75⍀
V
AD829
OUT
The buffer circuit shown in Figure 18 will drive a back-terminated
75 Ω video line to standard video levels (1 V p-p) with 0.1 dB
gain flatness to 30 MHz with only 0.04° and 0.02% differential
phase and gain at the 4.43 MHz PAL color subcarrier frequency.
This level of performance, which meets the requirements for high
definition video displays and test equipment, is achieved using
only 5 mA quiescent current.
75⍀
75⍀
0.1F
300⍀
OPTIONAL
2pF to 7pF
FLATNESS
TRIM
–15V
30pF
C
COMP
300⍀
A High Gain, Video Bandwidth, Three Op Amp In Amp
Figure 19 shows a three op amp instrumentation amplifier circuit
that provides a gain of 100 at video bandwidths. At a circuit gain
of 100, the small signal bandwidth equals 18 MHz into a FET
probe. Small signal bandwidth equals 6.6 MHz with a 50 Ω load.
The 0.1% settling time is 300 ns.
Figure 18. A Video Line Driver with a Flatness over
Frequency Adjustment
The input amplifiers operate at a gain of 20, while the output
op amp runs at a gain of 5. In this circuit, the main bandwidth
limitation is the gain/bandwidth product of the output amplifier.
Extra care should be taken while breadboarding this circuit, since
even a couple of extra picofarads of stray capacitance at the com-
pensation pins of A1 and A2 will degrade circuit bandwidth.
3pF
(G = 20)
2pF to 8pF
SETTLING TIME
AC CMR ADJUST
+V
IN
A1
AD829
1k⍀
2k⍀
1pF
200⍀
200⍀
AD848
R
G
A3
1pF
210⍀
INPUT
2k⍀
FREQUENCY CMRR
(G = 5)
2k⍀
100 Hz
1 MHz
10 MHz
64.6dB
44.7dB
23.9dB
3pF
970⍀
AD829
DC CMR
ADJUST
50⍀
+V
+15V
COMM
–15V
PIN 7
S
A2
10F
10F
1F
1F
0.1F
0.1F
0.1F
+V
IN
EACH
AMPLIFIER
(G = 20)
0.1F
3pF
4000⍀
G
CIRCUIT GAIN =
+ 1 5
(
(
R
–V
PIN 4
S
Figure 19. A High Gain, Video Bandwidth, Three Op Amp In Amp Circuit
REV. G
–13–
AD829
OUTLINE DIMENSIONS
8-Lead Standard Small Outline Package [SOIC]
8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(R-8)
(N-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in millimeters and (inches)
0.375 (9.53)
0.365 (9.27)
0.355 (9.02)
5.00 (0.1968)
4.80 (0.1890)
8
1
5
4
6.20 (0.2440)
5.80 (0.2284)
8
1
5
4.00 (0.1574)
3.80 (0.1497)
0.295 (7.49)
0.285 (7.24)
0.275 (6.98)
4
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.50 (0.0196)
0.25 (0.0099)
1.27 (0.0500)
BSC
0.100 (2.54)
BSC
؋
45؇ 0.150 (3.81)
0.135 (3.43)
0.120 (3.05)
1.75 (0.0688)
1.35 (0.0532)
0.25 (0.0098)
0.10 (0.0040)
0.015
(0.38)
MIN
0.180
(4.57)
MAX
8؇
0.51 (0.0201)
0.31 (0.0122)
0؇ 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
0.015 (0.38)
0.010 (0.25)
0.008 (0.20)
SEATING
PLANE
0.40 (0.0157)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
COMPLIANT TO JEDEC STANDARDS MS-012AA
0.060 (1.52)
0.050 (1.27)
0.045 (1.14)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-095AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20A)
8-Lead Ceramic Dual In-Line Package [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
Dimensions shown in inches and (millimeters)
0.005 (0.13) 0.055 (1.40)
0.200 (5.08)
0.075 (1.91)
MIN
MAX
REF
REF
0.100 (2.54)
0.064 (1.63)
0.100 (2.54) REF
0.095 (2.41)
0.075 (1.90)
8
5
0.015 (0.38)
MIN
0.310 (7.87)
0.220 (5.59)
3
19
18
20
4
PIN 1
0.028 (0.71)
0.022 (0.56)
1
0.358
0.358 (9.09)
0.342 (8.69)
SQ
1
4
0.011 (0.28)
0.007 (0.18)
R TYP
(9.09)
MAX
SQ
BOTTOM
VIEW
0.050 (1.27)
BSC
0.100 (2.54) BSC
0.405 (10.29) MAX
8
14
13
0.320 (8.13)
0.290 (7.37)
0.075 (1.91)
REF
9
0.060 (1.52)
0.015 (0.38)
45 TYP
0.088 (2.24)
0.054 (1.37)
0.055 (1.40)
0.045 (1.14)
0.200 (5.08)
MAX
0.150 (3.81)
BSC
0.150 (3.81)
0.200 (5.08)
0.125 (3.18)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
MIN
0.015 (0.38)
0.008 (0.20)
0.023 (0.58)
0.014 (0.36)
SEATING
PLANE
15
0
0.070 (1.78)
0.030 (0.76)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETERS DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
–14–
REV. G
AD829
Revision History
Location
Page
4/04—Data Sheet changed from REV. F to REV. G.
Added new Figure 1 and renumbered all figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Updated Table I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Updated Figure 15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Updated Figure 16 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2/03—Data Sheet changed from REV. E to REV. F.
Renumbered Figures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Universal
Changes made to PRODUCT HIGHLIGHTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Changes made to SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Changes made to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Changes made to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Updated OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
REV. G
–15–
–16–
相关型号：
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