AD829AR [ADI]
High-Speed, Low-Noise Video Op Amp; 高速，低噪声视频运算放大器
| 型号： | AD829AR |
| 厂家： | 
ADI |
| 描述： | High-Speed, Low-Noise Video Op Amp |
| 文件： | 总12页 (文件大小：322K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High-Speed, Low-Noise
Video Op Amp
a
AD829
CONNECTION DIAGRAMS
FEATURES
High Speed
120 MHz Bandwidth, Gain = –1
230 V/s Slew Rate
8-Lead Plastic Mini-DIP (N),
Cerdip (Q) and SOIC (R) Packages
90 ns Settling Time to 0.1%
Ideal for Video Applications
0.02% Differential Gain
0.04؇ Differential Phase
Low Noise
1
2
3
4
8
7
6
5
OFFSET NULL
OFFSET NULL
AD829
+V
S
–IN
+IN
OUTPUT
TOP VIEW
(Not to Scale)
C
–V
S
COMP
1.7 nV/√Hz Input Voltage Noise
1.5 pA/√Hz Input Current Noise
Excellent DC Precision
20-Lead LCC Pinout
1 mV max Input Offset Voltage (Over Temp)
0.3 V/؇C Input Offset Drift
Flexible Operation
Specified for ؎5 V to ؎15 V Operation
؎3 V Output Swing into a 150 ⍀ Load
External Compensation for Gains 1 to 20
5 mA Supply Current
3
2
1 20 19
18 NC
+V
4
5
6
7
8
NC
–IN
NC
+IN
NC
17
16 NC
AD829
TOP VIEW
Available in Tape and Reel in Accordance with
EIA-481A Standard
(Not to Scale)
OUTPUT
15
14 NC
PRODUCT DESCRIPTION
9
10 11 12 13
The AD829 is a low noise (1.7 nV/√Hz), high speed op amp
with custom compensation that provides the user with gains
from 1 to 20 while maintaining a bandwidth greater than
50 MHz. The AD829’s 0.04° differential phase and 0.02%
differential gain performance at 3.58 MHz and 4.43 MHz,
driving reverse-terminated 50 Ω or 75 Ω cables, makes it ideally
suited for professional video applications. The AD829 achieves
its 230 V/µs uncompensated slew rate and 750 MHz gain band-
width product while requiring only 5 mA of current from the
power supplies.
NC = NO CONNECT
The AD829 provides many of the same advantages that a trans-
impedance amplifier offers, while operating as a traditional
voltage feedback amplifier. A bandwidth greater than 50 MHz
can be maintained for a range of gains by changing the external
compensation capacitor. The AD829 and the transimpedance
amplifier are both unity gain stable and provide similar voltage
noise performance (1.7 nV/√Hz). However, the current noise of
the AD829 (1.5 pA/√Hz) is less than 10% of the noise of trans-
impedance amps. Furthermore, the inputs of the AD829 are
symmetrical.
The AD829’s external compensation pin gives it exceptional
versatility. For example, compensation can be selected to opti-
mize the bandwidth for a given load and power supply voltage.
As a gain-of-two line driver, the –3 dB bandwidth can be in-
creased to 95 MHz at the expense of 1 dB of peaking. In addi-
tion, the AD829’s output can also be clamped at its external
compensation pin.
PRODUCT HIGHLIGHTS
1. Input voltage noise of 2 nV/√Hz, current noise of 1.5 pA/
√Hz and 50 MHz bandwidth, for gains of 1 to 20, make the
AD829 an ideal preamp.
2. Differential phase error of 0.04° and a 0.02% differential
gain error, at the 3.58 MHz NTSC and 4.43 MHz PAL and
SECAM color subcarrier frequencies, make it an outstanding
video performer for driving reverse-terminated 50 Ω and
75 Ω cables to 1 V (at their terminated end).
3. The AD829 can drive heavy capacitive loads.
4. Performance is fully specified for operation from 5 V to
15 V supplies.
5. Available in plastic, cerdip, and small outline packages.
Chips and MIL-STD-883B parts are also available.
The AD829 has excellent dc performance. It offers a minimum
open-loop gain of 30 V/mV into loads as low as 500 Ω, low
input voltage noise of 1.7 nV/√Hz, and a low input offset volt-
age of 1 mV maximum. Common-mode rejection and power
supply rejection ratios are both 120 dB.
The AD829 is also useful in multichannel, high speed data
conversion where its fast (90 ns to 0.1%) settling time is of
importance. In such applications, the AD829 serves as an input
buffer for 8-to-10-bit A/D converters and as an output I/V con-
verter for high speed D/A converters.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
World Wide Web Site: http://www.analog.com
© Analog Devices, Inc., 2000
(@ TA = +25؇C and VS = ؎15 V dc, unless otherwise noted)
AD829–SPECIFICATIONS
AD829J/AR
AD829AQ/S
Model
Conditions
VS
5 V, 15 V
Min
Typ
Max
Min
Typ
Max
Units
INPUT OFFSET VOLTAGE
0.2
1
1
0.1
0.5
0.5
mV
mV
TMIN to TMAX
Offset Voltage Drift
5 V, 15 V
5 V, 15 V
0.3
3.3
0.3
3.3
µV/°C
INPUT BIAS CURRENT
7
7
9.5
µA
µA
TMIN to TMAX
8.2/9.5
INPUT OFFSET CURRENT
5 V, 15 V
50
500
500
50
500
500
nA
nA
T
MIN to TMAX
Offset Current Drift
OPEN-LOOP GAIN
5 V, 15 V
5 V
0.5
0.5
nA/°C
VO
= 2.5 V
R
T
LOAD = 500 Ω
30
20
65
30
20
65
V/mV
V/mV
V/mV
MIN to TMAX
RLOAD = 150 Ω
VOUT 10 V
40
40
=
15 V
R
LOAD = 1 kΩ
50
20
100
85
50
20
100
85
V/mV
V/mV
V/mV
TMIN to TMAX
RLOAD = 500 Ω
DYNAMIC PERFORMANCE
Gain Bandwidth Product
5 V
15 V
600
750
600
750
MHz
MHz
Full Power Bandwidth1, 2
VO = 2 V p-p
RLOAD = 500 Ω
VO = 20 V p-p
RLOAD = 1 kΩ
RLOAD = 500 Ω
RLOAD = 1 kΩ
AV = –19
5 V
25
25
MHz
15 V
5 V
15 V
3.6
150
230
3.6
150
230
MHz
V/µs
V/µs
Slew Rate2
Settling Time to 0.1%
–2.5 V to +2.5 V
10 V Step
CLOAD = 10 pF
RLOAD = 1 kΩ
5 V
15 V
15 V
65
90
65
90
ns
ns
Phase Margin2
60
60
Degrees
%
DIFFERENTIAL GAIN ERROR3
DIFFERENTIAL PHASE ERROR3
COMMON-MODE REJECTION
RLOAD = 100 Ω
CCOMP = 30 pF
15 V
15 V
0.02
0.02
RLOAD = 100 Ω
CCOMP = 30 pF
0.04
0.04
Degrees
VCM
VCM
=
=
2.5 V
12 V
5 V
15 V
100
100
96
120
120
100
100
96
120
120
dB
dB
dB
TMIN to TMAX
POWER SUPPLY REJECTION
VS = 4.5 V to 18 V
TMIN to TMAX
98
94
120
98
94
120
dB
dB
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
f = 1 kHz
f = 1 kHz
15 V
15 V
1.7
1.5
2
1.7
1.5
2
nV/√Hz
pA/√Hz
INPUT COMMON-MODE
VOLTAGE RANGE
5 V
+4.3
–3.8
+14.3
–13.8
+4.3
–3.8
+14.3
–13.8
V
V
V
V
15 V
OUTPUT VOLTAGE SWING
RLOAD = 500 Ω
RLOAD = 150 Ω
RLOAD = 50 Ω
RLOAD = 1 kΩ
RLOAD = 500 Ω
5 V
5 V
5 V
15 V
15 V
5 V, 15 V
3.0
2.5
3.6
3.0
1.4
13.3
12.2
32
3.0
2.5
3.6
3.0
1.4
13.3
12.2
32
V
V
V
V
V
12
10
12
10
Short Circuit Current
mA
INPUT CHARACTERISTICS
Input Resistance (Differential)
Input Capacitance (Differential)4
Input Capacitance (Common Mode)
13
5
1.5
13
5
1.5
kΩ
pF
pF
CLOSED-LOOP OUTPUT
RESISTANCE
AV = +1, f = 1 kHz
2
2
mΩ
–2–
REV. E
AD829
AD829J/AR
Typ
AD829AQ/S
Model
Conditions
VS
Min
Max
Min
Typ
Max
Units
POWER SUPPLY
Operating Range
Quiescent Current
4.5
18
6.5
8.0
6.8
8.3/8.5
4.5
18
6.5
8.2/8.7
6.8
V
5 V
15 V
5
5
mA
mA
mA
mA
T
MIN to TMAX
5.3
5.3
TMIN to TMAX
8.5/9.0
TRANSISTOR COUNT
NOTES
Number of Transistors
46
46
1Full Power Bandwidth = Slew Rate/2 π VPEAK
.
2Tested at Gain = +20, CCOMP = 0 pF.
33.58 MHz (NTSC) and 4.43 MHz (PAL & SECAM).
4Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS1
METALIZATION PHOTO
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
Internal Power Dissipations2
Plastic (N) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts
Small Outline (R) . . . . . . . . . . . . . . . . . . . . . . . . . 0.9 Watts
Cerdip (Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3 Watts
LCC (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8 Watts
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VS
Differential Input Voltage3 . . . . . . . . . . . . . . . . . . . . 6 Volts
Output Short Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range (Q, E) . . . . . . . –65°C to +150°C
Storage Temperature Range (N, R) . . . . . . . –65°C to +125°C
Operating Temperature Range
AD829J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD829A . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD829S . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . .+300°C
NOTES
1Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
2Maximum internal power dissipation is specified so that TJ does not exceed
+175°C at an ambient temperature of +25°C.
ESD SUSCEPTIBILITY
ESD (electrostatic discharge) sensitive device. Electrostatic
charges as high as 4000 volts, which readily accumulate on the
human body and on test equipment, can discharge without
detection. Although the AD829 features proprietary ESD pro-
tection circuitry, permanent damage may still occur on these
devices if they are subjected to high energy electrostatic dis-
charges. Therefore, proper ESD precautions are recommended
to avoid any performance degradation or loss of functionality.
Thermal characteristics:
8-lead plastic package: θJA = 100°C/watt (derate at 8.7 mW/°C)
8-lead cerdip package: θJA = 110°C/watt (derate at 8.7 mW/°C)
20-lead LCC package: θJA = 150°C/watt
8-lead small outline package: θJA = 155°C/watt (derate at 6 mW/°C).
3If the differential voltage exceeds 6 volts, external series protection resistors should
be added to limit the input current.
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Option*
AD829JN
0°C to +70°C
8-Lead Plastic Mini-DIP
8-Lead Plastic SOIC
8-Lead Plastic SOIC
Tape and Reel 7"
Tape and Reel 13"
Tape and Reel 7"
Tape and Reel 13"
8-Lead Cerdip
8-Lead Cerdip
8-Lead Cerdip
8-Lead Cerdip
20-Lead LCC
20-Lead LCC
Die
N-8
SO-8
SO-8
AD829AR
–40°C to +85°C
0°C to +70°C
AD829JR
AD829AR-REEL7
AD829AR-REEL
AD829JR-REEL7
AD829JR-REEL
AD829AQ
–40°C to +85°C
–40°C to +85°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
0°C to +70°C
Q-8
Q-8
Q-8
Q-8
E-20A
E-20A
AD829SQ
AD829SQ/883B
5962-9312901MPA
AD829SE/883B
5962-9312901M2A
AD829JCHIPS
AD829SCHIPS
–55°C to +125°C
Die
*E = Leadless Chip Carrier (Ceramic); N = Plastic DIP; Q = Cerdip; SO = Small Outline IC (SOIC).
REV. E
–3–
AD829–Typical Performance Characteristics
20
15
10
5
20
15
10
5
30
25
20
15
؎15 VOLT
SUPPLIES
+V
OUT
+V
OUT
–V
OUT
–V
OUT
10
5
؎5 VOLT
SUPPLIES
R
= 1k⍀
LOAD
0
0
0
10
0
5
10
15
20
0
5
10
15
20
1k
100
LOAD RESISTANCE – ⍀
10k
SUPPLY VOLTAGE – ؎Volts
SUPPLY VOLTAGE – ؎Volts
Figure 1. Input Common-Mode
Range vs. Supply Voltage
Figure 2. Output Voltage Swing
vs. Supply Voltage
Figure 3. Output Voltage Swing
vs. Resistive Load
–5
6.0
5.5
5.0
4.5
4.0
100
10
A
= +20
V
C
= 0pF
–
COMP
4
1
0.1
V
= ؎5V, ؎15V
S
–
3
A
C
= +1
V
= 68pF
COMP
0.01
–2
–60 –40 –20
0.001
1k
10k
100k
1M
10M
100M
0
20 40 60 80 100
140
120
0
5
10
15
20
TEMPERATURE – ؇C
FREQUENCY – Hz
SUPPLY VOLTAGE – ؎Volts
Figure 4. Quiescent Current vs.
Supply Voltage
Figure 5. Input Bias Current vs.
Temperature
Figure 6. Closed-Loop Output
Impedance vs. Frequency
7
6
40
65
60
55
V
A
C
= ±15V
= +20
S
NEGATIVE
CURRENT LIMIT
V
= 0pF
COMP
35
30
25
V
= ؎15V
S
POSITIVE
CURRENT LIMIT
5
4
V
= ؎5V
S
V
= ؎5V
S
50
45
20
15
3
–60 –40 –20
0
20 40 60 80 100
140
120
–60 –40 –20
0
20 40 60 80 100
140
120
–60 –40 –20
0
20 40 60 80 100
140
120
TEMPERATURE – ؇C
AMBIENT TEMPERATURE – ؇C
TEMPERATURE – ؇C
Figure 7. Quiescent Current vs.
Temperature
Figure 8. Short Circuit Current
Limit vs. Temperature
Figure 9. –3 dB Bandwidth vs.
Temperature
–4–
REV. E
AD829
120
100
80
+100
+80
+60
+40
+20
105
100
120
100
80
+
PHASE
SUPPLY
V
= ؎15V
GAIN
؎15V
Supplies
S
95
90
85
80
75
1k⍀ Load
–SUPPLY
V
S
= ؎5V
GAIN
؎5V
Supplies
60
60
500⍀ Load
40
20
0
C
= 0pF
COMP
40
20
0
C
= 0pF
COMP
–20
10M 100M
1k
10k
100k
1M
10M
100M
1k
100
1k
10k
100k
1M
10
100
10k
FREQUENCY – Hz
FREQUENCY – Hz
LOAD RESISTANCE – ⍀
Figure 11. Open-Loop Gain vs.
Resistive Load
Figure 12. Power Supply Rejection
Ratio (PSRR) vs. Frequency
Figure 10. Open-Loop Gain & Phase
Margin vs. Frequency
30
25
10
8
120
100
80
6
V
= ±15V
= 1k⍀
= +20
S
4
R
A
L
V
20
15
10
2
ERROR
C
= 0pF
1% 0.1%
COMP
A
= –19
0
– 2
– 4
– 6
– 8
–10
V
1%
V
= ±5V
= 500⍀
= +20
0.1%
C
= 0pF
S
COMP
60
R
A
L
V
C
= 0pF
100k
COMP
40
20
C
= 0pF
5
0
COMP
0
20
40
60
80 100 120 140 160
1
10
INPUT FREQUENCY – MHz
100
1k
10k
1M
10M
100M
SETTLING TIME – ns
FREQUENCY – Hz
Figure 14. Large Signal Frequency
Response
Figure 15. Output Swing & Error vs.
Settling Time
Figure 13. Common-Mode Rejection
Ratio vs. Frequency
5
4
–20
–70
V
= 3V RMS
= –1
IN
3rd HARMONIC
V
= 2.24V RMS
= –1
–75
–80
IN
A
C
C
V
A
R
C
C
–30
–40
–50
V
= 30pF
= 100pF
COMP
LOAD
= 250⍀
L
= 0
= 30pF
LOAD
COMP
–85
3
2
1
0
R
= 500⍀
L
–90
–95
2nd HARMONIC
–100
–60
–70
R
= 2k⍀
L
–105
–110
0
500k
1M
1.5M
2M
10
100
1k
10k
100k
1M
10M
100
300
1k
3k
10k
30k
100k
FREQUENCY – Hz
FREQUENCY – Hz
FREQUENCY – Hz
Figure 17. 2nd & 3rd Harmonic
Distortion vs. Frequency
Figure 18. Input Voltage Noise
Spectral Density
Figure 16. Total Harmonic Dis-
tortion (THD) vs. Frequency
REV. E
–5–
AD829–Typical Performance Characteristics
0.03
0.02
0.01
400
C
COMP
0.1F
(EXTERNAL)
A
= +20
V
+V
350
300
250
200
S
SLEW RATE 10 – 90%
RISE
FALL
DIFF GAIN
AD829
V
= ؎15V
S
0.043؇
RISE
FALL
0.1F
0.05
DIFF PHASE
20k⍀
0.04
0.03
150
100
V
= ؎5V
OFFSET
NULL
ADJUST
S
–V
–60 –40 –20
0
20 40 60 80 100
140
120
؎5
؎10
SUPPLY VOLTAGE – Volts
؎15
S
TEMPERATURE – ؇C
Figure 20. Differential Gain & Phase
vs. Supply
Figure 21. Offset Null and External
Shunt Compensation Connections
Figure 19. Slew Rate vs. Temperature
C
COMP
+15V
0.1F
15pF
50⍀
CABLE
HP8130A
5ns RISE TIME
50⍀
CABLE
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
AD829
50⍀
50⍀
5pF
300⍀
300⍀
0.1F
–15V
Figure 22a. Follower Connection. Gain = +2
Figure 22b. Gain-of-2 Follower
Large Signal Pulse Response
Figure 22c. Gain-of-2 Follower
Small Signal Pulse Response
–6–
REV. E
AD829
+15V
0.1F
50⍀
CABLE
100⍀
45⍀
HP8130A
5ns RISE TIME
FET PROBE
TEKTRONIX
TYPE 7A24
PREAMP
AD829
5⍀
2k⍀
1pF
0.1F
–15V
C
= 0pF
COMP
105⍀
Figure 23a. Follower Connection. Gain = +20
Figure 23b. Gain-of-20 Follower
Large Signal Pulse Response
Figure 23c. Gain-of-20 Follower
Small Signal Pulse Response
5pF
300⍀
+15V
0.1F
50⍀
CABLE
300⍀
50⍀
HP8130A
5ns RISE TIME
CABLE
TEKTRONIX
TYPE 7A24
PREAMP
50⍀
AD829
50⍀
C
COMP
50⍀
15pF
0.1F
–15V
Figure 24a. Unity Gain Inverter Connection
Figure 24b. Unity Gain Inverter
Large Signal Pulse Response
Figure 24c. Unity Gain Inverter
Small Signal Pulse Response
REV. E
–7–
AD829
+V
S
THEORY OF OPERATION
The AD829 is fabricated on Analog Devices’ proprietary comple-
mentary bipolar (CB) process which provides PNP and NPN
transistors with similar fTs of 600 MHz. As shown in Figure 25,
the AD829 input stage consists of an NPN differential pair in
which each transistor operates at 600 µA collector current. This
gives the input devices a high transconductance and hence gives
15⍀
15⍀
OUTPUT
the AD829 a low noise figure of 2 nV/√Hz @ 1 kHz.
R
500⍀
C
12.5pF
The input stage drives a folded cascode which consists of a fast
pair of PNP transistors. These PNPs then drive a current mirror
which provides a differential-input to single-ended-output con-
version. The high speed PNPs are also used in the current-
amplifying output stage which provides high current gain of
40,000. Even under conditions of heavy loading, the high fTs
of the NPN & PNPs, produced using the CB process, permit
cascading two stages of emitter followers while still maintaining
60° of phase margin at closed-loop bandwidths greater than
50 MHz.
+IN
–IN
1.2mA
–V
S
C
COMP
OFFSET NULL
Figure 25. AD829 Simplified Schematic
Shunt Compensation
Two stages of complementary emitter followers also effectively
buffer the high impedance compensation node (at the CCOMP
pin) from the output so that the AD829 can maintain a high dc
open-loop gain, even into low load impedances: 92 dB into a
150 Ω load, 100 dB into a 1 kΩ load. Laser trimming and
PTAT biasing assure low offset voltage and low offset voltage
drift enabling the user to eliminate ac coupling in many
applications.
Figures 26 and 27 show that the first method, shunt compensa-
tion, has an external compensation capacitor, CCOMP, connected
between the compensation pin and ground. This external
capacitor is tied in parallel with approximately 3 pF of inter-
nal capacitance at the compensation node. In addition, a
small capacitance, CLEAD, in parallel with resistor R2, compen-
sates for the capacitance at the amplifier’s inverting input.
For added flexibility, the AD829 provides access to the internal
frequency compensation node. This allows the user to customize
frequency response characteristics for a particular application.
R2
C
LEAD
Unity gain stability requires a compensation capacitance of
68 pF (Pin 5 to ground) which will yield a small signal band-
width of 66 MHz and slew rate of 16 V/µs. The slew rate and
gain bandwidth product will vary inversely with compensation
capacitance. Table I and the graph of Figure 28 show the opti-
mum compensation capacitance and the resulting slew rate for a
desired noise gain. For gains between 1 and 20, CCOMP can be
chosen to keep the small signal bandwidth relatively constant.
The minimum gain which will still provide stability also de-
pends on the value of external compensation capacitance.
+V
S
0.1F
50⍀
COAX
CABLE
R1
V
IN
V
AD829
OUT
50⍀
1k⍀
C
COMP
0.1F
–V
S
An RC network in the output stage (Figure 25) completely
removes the effect of capacitive loading when the amplifier is
compensated for closed-loop gains of 10 or higher. At low fre-
quencies, and with low capacitive loads, the gain from the com-
pensation node to the output is very close to unity. In this case,
C is bootstrapped and does not contribute to the compensation
capacitance of the device. As the capacitive load is increased, a
pole is formed with the output impedance of the output stage–
this reduces the gain, and subsequently, C is incompletely boot-
strapped. Therefore, some fraction of C contributes to the
compensation capacitance, and the unity gain bandwidth falls.
As the load capacitance is further increased, the bandwidth
continues to fall, and the amplifier remains stable.
Figure 26. Inverting Amplifier Connection Using External
Shunt Compensation
+V
S
0.1F
50⍀
CABLE
V
IN
V
AD829
OUT
50⍀
R2
1k⍀
C
COMP
0.1F
C
LEAD
–V
S
Externally Compensating the AD829
The AD829 is stable with no external compensation for noise
gains greater than 20. For lower gains, there are two methods of
frequency compensating the amplifier to achieve closed-loop
stability; these are the shunt and current feedback compensation
methods.
R1
Figure 27. Noninverting Amplifier Connection Using
External Shunt Compensation
–8–
REV. E
AD829
Table I. Component Selection for Shunt Compensation
Slew
–3 dB
Small Signal
Bandwidth – MHz
Follower
Gain
Inverter
Gain
R1
⍀
R2
⍀
CL
pF
CCOMP
pF
Rate
V/s
1
2
5
10
20
25
100
Open
1k
511
226
105
105
20
100
1k
2.0k
2.05k
2k
2.49
2k
0
5
1
0
0
0
0
68
25
7
3
0
0
0
16
38
90
130
230
230
230
66
71
76
65
55
39
7.5
–1
–4
–9
–19
–24
–99
then:
Table I gives recommended CCOMP and CLEAD values along with
the corresponding slew rates and bandwidth. The capacitor
values given were selected to provide a small signal frequency
response with less than 1 dB of peaking and less than 10% over-
shoot. For this table, supply voltages of 15 volts should be
used. Figure 28 is a graphical extension of the table which
shows the slew rate/gain trade-off for lower closed-loop gains,
when using the shunt compensation scheme.
Slew Rate
kT
q
= 4 π
fT
This shows that the slew rate will be only 0.314 V/µs for every
MHz of bandwidth. The only way to increase slew rate is to
increase the fT and that is difficult, due to process limitations.
Unfortunately, an amplifier with a bandwidth of 10 MHz can
only slew at 3.1 V/µs, which is barely enough to provide a full
power bandwidth of 50 kHz.
1k
100
10
1
The AD829 is especially suited to a new form of compensation
which allows for the enhancement of both the full power band-
width and slew rate of the amplifier. The voltage gain from the
inverting input pin to the compensation pin is large; therefore, if
a capacitance is inserted between these pins, the amplifier’s
bandwidth becomes a function of its feedback resistor and this
capacitance. The slew rate of the amplifier is now a function of
its internal bias (2I) and this compensation capacitance.
SLEW RATE
C
COMP
100
Since the closed-loop bandwidth is a function of RF and CCOMP
(Figure 29), it is independent of the amplifier closed-loop gain,
as shown in Figure 31. To preserve stability, the time constant
of RF and CCOMP needs to provide a bandwidth of less than
65 MHz. For example, with CCOMP = 15 pF and RF = 1 kΩ, the
small signal bandwidth of the AD829 is 10 MHz, while Figure
30 shows that the slew rate is in excess of 60 V/µs. As can be
seen in Figure 31, the closed-loop bandwidth is constant for
gains of –1 to –4, a property of current feedback amplifiers.
V
= ؎15V
S
10
100
1
10
NOISE GAIN
Figure 28. Value of CCOMP & Slew Rate vs. Noise Gain
Current Feedback Compensation
Bipolar nondegenerated amplifiers which are single pole and
internally compensated have their bandwidths defined as:
R
F
1
I
C
COMP
fT
=
=
2 π re CCOMP
kT
q
2 π
CCOMP
0.1F
+V
S
50⍀
where:
COAX
CABLE
R1
fT is the unity gain bandwidth of the amplifier
I is the collector current of the input transistor
CCOMP is the compensation capacitance
V
IN
C *
1
V
AD829
IN4148
OUT
50⍀
R
1k⍀
L
0.1F
re is the inverse of the transconductance of the input transistors
kT/q is approximately equal to 26 mV @ 27°C.
*RECOMMENDED VALUE
–V
S
OF C
FOR C
COMP
1
Since both fT and slew rate are functions of the same variables,
the dynamic behavior of an amplifier is limited. Since:
C
SHOULD NEVER EXCEED
<7pF
7pF
0pF
15pF
COMP
15pF FOR THIS CONNECTION
2I
Slew Rate =
CCOMP
Figure 29. Inverting Amplifier Connection Using Current
Feedback Compensation
REV. E
–9–
AD829
Figure 32. Large Signal Pulse Response of the Inverting
Amplifier Using Current Feedback Compensation.
Figure 30. Large Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation.
CCOMP = 15 pF, C1 = 15 pF, RF = 1 kΩ, R1 = 1 kΩ
CCOMP = 1 pF, RF = 3 kΩ, R1 = 3 kΩ
15
GAIN = –4
12
–3dB @ 8.2MHz
9
GAIN = –2
6
–3dB @ 9.6MHz
3
GAIN = –1
0
–3dB @ 10.2MHz
–3
V
V
= –30dBM
= ؎15V
= 1k⍀
IN
–6
–9
S
R
R
C
C
L
F
= 1k⍀
= 15pF
–12
–15
COMP
= 15pF
1
100k
1M
10M
FREQUENCY – Hz
100M
Figure 33. Small Signal Pulse Response of Inverting
Amplifier Using Current Feedback Compensation.
CCOMP = 4 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 31. Closed-Loop Gain vs. Frequency for the Circuit
of Figure 29
Figure 32 is an oscilloscope photo of the pulse response of a
unity gain inverter which has been configured to provide a small
signal bandwidth of 53 MHz and a subsequent slew rate of
180 V/µs; resistor RF = 3 kΩ, capacitor CCOMP = 1 pF. Figure 33
shows the excellent pulse response as a unity gain inverter, this
time using component values of: RF = 1 kΩ and CCOMP = 4 pF.
15
C
= 2pF
= 3pF
= 4pF
GAIN = –4
GAIN = –2
COMP
12
9
C
COMP
6
3
GAIN = –1
C
COMP
Figures 34 and 35 show the closed-loop frequency response of
the AD829 for different closed-loop gains and for different
supply voltages.
0
–3
–6
–9
–12
–15
V
= ؎15V
= 1k⍀
S
R
R
V
L
F
If a noninverting amplifier configuration using current feedback
compensation is desired, the circuit of Figure 36 is recom-
mended. This circuit doubles the slew rate compared to the
shunt compensated noninverting amplifier of Figure 27 at the
expense of gain flatness. Nonetheless, this circuit delivers 95 MHz
bandwidth with 1 dB flatness into a back terminated cable,
with a differential gain error of only 0.01%, and a differential
phase error of only 0.015° at 4.43 MHz.
= 1k⍀
= –30dBM
IN
1M
10M
FREQUENCY – Hz
100M
Figure 34. Closed-Loop Frequency Response for the
Inverting Amplifier Using Current Feedback Compensation
–10–
REV. E
AD829
+15V
–17
–20
–23
0.1F
50⍀
COAX
CABLE
50⍀
COAX
V
؎5V
IN
CABLE
–26
–29
–32
–35
–38
–41
–44
–47
50⍀
2k⍀
AD829
V
OUT
؎15V
50⍀
50⍀
3pF
C
–15V
0.1F
COMP
V
= –20dBM
= 1k⍀
IN
R
R
L
2k⍀
= 1k⍀
F
GAIN = –1
= 4pF
C
COMP
Figure 36. Noninverting Amplifier Connection Using
Current Feedback Compensation
1M
10M
100M
FREQUENCY – Hz
+15V
Figure 35. Closed-Loop Frequency Response vs. Supply
for the Inverting Amplifier Using Current Feedback
Compensation
0.1F
75⍀
COAX
V
IN
A Low Error Video Line Driver
CABLE
75⍀
V
AD829
OUT
The buffer circuit shown in Figure 37 will drive a back-termi-
nated 75 Ω video line to standard video levels (1 V p-p) with
0.1 dB gain flatness to 30 MHz with only 0.04° and 0.02%
differential phase and gain at the 4.43 MHz PAL color
subcarrier frequency. This level of performance, which meets
the requirements for high definition video displays and test
equipment, is achieved using only 5 mA quiescent current.
75⍀
75⍀
0.1F
300⍀
OPTIONAL
2 – 7pF
FLATNESS
TRIM
–15V
30pF
C
COMP
300⍀
A High Gain, Video Bandwidth Three Op Amp In Amp
Figure 38 shows a three op amp instrumentation amplifier cir-
cuit which provides a gain of 100 at video bandwidths. At a
circuit gain of 100 the small signal bandwidth equals 18 MHz
into an FET probe. Small signal bandwidth equals 6.6 MHz
with a 50 Ω load. 0.1% settling time is 300 ns.
Figure 37. A Video Line Driver with a Flatness over
Frequency Adjustment
The input amplifiers operate at a gain of 20, while the output
op amp runs at a gain of 5. In this circuit the main bandwidth
limitation is the gain/ bandwidth product of the output ampli-
fier. Extra care needs to be taken while breadboarding this cir-
cuit, since even a couple of extra picofarads of stray capacitance
at the compensation pins of A1 and A2 will degrade circuit
bandwidth.
3pF
(G = 20)
2–8pF
SETTLING TIME
AC CMR ADJUST
+V
IN
A1
AD829
1k⍀
2k⍀
1pF
200⍀
200⍀
AD848
R
G
A3
1pF
210⍀
INPUT
FREQUENCY CMRR
2k⍀
(G = 5)
2k⍀
100 Hz
1 MHz
10 MHz
64.6dB
44.7dB
23.9dB
3pF
970⍀
AD829
DC CMR
ADJUST
+V
+15V
COMM
–15V
PIN 7
S
A2
50⍀
10F
10F
1F
1F
0.1F
0.1F
0.1F
+V
IN
EACH
AMPLIFIER
(G = 20)
0.1F
3pF
4000⍀
CIRCUIT GAIN =
+ 1 5
(
(
R
–V
PIN 4
G
S
Figure 38. A High Gain, Video Bandwidth Three Op Amp In Amp Circuit
REV. E
–11–
AD829
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
Cerdip (Q) Package
0.005 (0.13) MIN
0.055 (1.40) MAX
5
8
0.310 (7.87)
PIN 1
0.220 (5.59)
1
4
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200
(5.08)
MAX
0.150
(3.81)
MIN
0.015 (0.38)
0.008 (0.20)
0.200 (5.08)
0.125 (3.18)
15°
0°
0.070 (1.78)
0.100
(2.54)
BSC
0.023 (0.58)
0.014 (0.36)
SEATING
PLANE
0.030 (0.76)
Plastic Mini-DIP (N) Package
8-Lead SOIC (R) Package
0.1968 (5.00)
0.1890 (4.80)
8
5
4
0.25
(6.35)
0.31
(7.87)
PIN 1
8
1
5
4
0.2440 (6.20)
0.2284 (5.80)
0.1574 (4.00)
0.1497 (3.80)
1
0.30 (7.62)
REF
0.39 (9.91) MAX
PIN 1
0.035±0.01
(0.89±0.25)
0.0196 (0.50)
0.0099 (0.25)
0.0500 (1.27)
BSC
؋
45؇ 0.165±0.01
(4.19±0.25)
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.011±0.003
(0.28±0.08)
0.18±0.03
(4.57±0.76)
0.125
(3.18)
MIN
8؇
0؇
0.0500 (1.27)
0.0160 (0.41)
0.0192 (0.49)
0.0138 (0.35)
0.0098 (0.25)
0.0075 (0.19)
15°
0°
0.018±0.003
(0.46±0.08) (2.54)
0.10
0.033
(0.84)
NOM
SEATING
PLANE
BSC
20-Lead LCC (E-20A) Package
0.200 (5.08)
BSC
0.075
(1.91)
REF
0.100 (2.54)
0.064 (1.63)
0.100 (2.54) BSC
0.015 (0.38)
MIN
0.095 (2.41)
0.075 (1.90)
3
19
18
20
4
0.028 (0.71)
0.022 (0.56)
0.358
1
0.358 (9.09)
0.011 (0.28)
(9.09)
MAX
SQ
BOTTOM
VIEW
0.342 (8.69)
SQ
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.050 (1.27)
BSC
14
13
8
9
45° TYP
0.055 (1.40)
0.045 (1.14)
0.088 (2.24)
0.054 (1.37)
0.150 (3.81)
BSC
All brand or product names mentioned are trademarks or registered trademarks of their respective holders.
–12–
REV. E
相关型号：
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