AD628 [ADI]
High Common-Mode Voltage Programmable Gain Difference Amplifier; 高共模电压可编程增益差动放大器
| 型号： | AD628 |
| 厂家： | 
ADI |
| 描述： | High Common-Mode Voltage Programmable Gain Difference Amplifier |
| 文件： | 总20页 (文件大小：247K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
High Common-Mode Voltage
Programmable Gain Difference Amplifier
AD628
FUNCTIONAL BLOCK DIAGRAM
FEATURES
R
R
EXT1
EXT2
High common-mode input voltage range
120 V at VS = 1ꢀ V
Gain range 0.1 to 100
+V
S
R
G
Operating temperature range: −40°C to 8ꢀ°C
Supply voltage range
Dual supply: 2.2ꢀ V to 18 V
Single supply: 4.ꢀ V to 36 V
Excellent ac and dc performance
Offset temperature stability RTI: 10 µV/°C max
Offset: 1.ꢀ V mV max
100kΩ
10kΩ
–IN
+IN
G = +0.1
–IN
+IN
OUT
A2
–IN
10kΩ
A1
+IN
100kΩ
10kΩ
AD628
CMRR RTI: 7ꢀ dB min, dc to ꢀ00 Hz, G = +1
–V
V
S
REF
APPLICATIONS
C
FILT
High voltage current shunt sensing
Programmable logic controllers
Analog input front end signal conditioning
+ꢀ V, +10 V, ꢀ V, 10 V and 4 to 20 mA
Isolation
Figure 1.
130
120
110
100
90
Sensor signal conditioning
Power supply monitoring
Electrohydraulic control
Motor control
V
= ±15V
S
GENERAL DESCRIPTION
80
70
The AD628 is a precision difference amplifier that combines
excellent dc performance with high common-mode rejection
over a wide range of frequencies. When used to scale high
voltages, it allows simple conversion of standard control
voltages or currents for use with single-supply ADCs. A
wideband feedback loop minimizes distortion effects due to
capacitor charging of ∑-∆ ADCs.
V
= ±2.5V
S
60
50
40
30
10
100
1k
FREQUENCY (Hz)
10k
100k
Figure 2. CMRR vs. Frequency of the AD628
A reference pin (VREF) provides a dc offset for converting
bipolar to single-sided signals. The AD628 converts +5 V, +10 V,
5 V, 10 V, and 4 to 20 mA input signals to a single-ended
output within the input range of single-supply ADCs.
A precision 10 kΩ resistor connected to an external pin is
provided for either a low-pass filter or to attenuate large
differential input signals. A single capacitor implements a low-
pass filter. The AD628 operates from single and dual supplies and
is available in an 8-lead SOIC or MSOP package. It operates over
the standard industrial temperature range of −40°C to +85°C.
The AD628 has an input common-mode and differential
mode operating range of 120 V. The high common-mode
input impedance makes the device well suited for high voltage
measurements across a shunt resistor. The buffer amplifier’s
inverting input is available for making a remote Kelvin
connection.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.
AD628
TABLE OF CONTENTS
Specifications..................................................................................... 3
REVISION HISTORY
Absolute Maximum Ratings............................................................ 7
ESD Caution.................................................................................. 7
Pin Configuration and Function Descriptions............................. 8
Typical Performance Characteristics ............................................. 9
Test Circuits..................................................................................... 13
Theory of Operation ...................................................................... 14
Applications..................................................................................... 15
Gain Adjustment......................................................................... 15
Input Voltage Range ................................................................... 15
Voltage Level Conversion.......................................................... 16
Current Loop Receiver............................................................... 17
Monitoring Battery Voltages ..................................................... 17
Filter Capacitor Values............................................................... 18
Kelvin Connection ..................................................................... 18
Outline Dimensions ....................................................................... 19
Ordering Guide........................................................................... 19
4/04—Data Sheet Changed from Rev. B to Rev. C
Updated Format.................................................................Universal
Changes to Specifications............................................................... 3
Changes to Absolute Maximum Ratings...................................... 7
Changes to Figure 3......................................................................... 7
Changes to Figure 26..................................................................... 13
Changes to Figure 27..................................................................... 13
Changes to Theory of Operation ................................................ 14
Changes to Figure 29..................................................................... 14
Changes to Table 5......................................................................... 15
Changes to Gain Adjustment Section......................................... 15
Added the Input Voltage Range Section..................................... 15
Added Figure 30 ............................................................................ 15
Added Figure 31 ............................................................................ 15
Changes to Voltage Level Conversion Section .......................... 16
Changes to Figure 32..................................................................... 16
Changes to Table 6......................................................................... 16
Changes to Figure 33 and Figure 34............................................ 17
Changes to Figure 35..................................................................... 18
Changes to Kelvin Connection Section...................................... 18
6/03—Data Sheet Changed from Rev. A to Rev. B
Changes to General Description ................................................... 1
Changes to Specifications............................................................... 2
Changes to Ordering Guide........................................................... 4
Changes to TPCs 4, 5, and 6........................................................... 5
Changes to TPC 9............................................................................ 6
Updated Outline Dimensions...................................................... 14
1/03—Data Sheet Changed from Rev. 0 to Rev. A
Change to Ordering Guide............................................................. 4
11/02—Rev. 0: Initial Version
Rev. C | Page 2 of 20
AD628
SPECIFICATIONS
TA = 25°C, VS = 15 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = 0 unless otherwise noted.
Table 1.
AD628AR
AD628ARM
Parameter
Conditions
Min
Typ
Max
Min
Typ
Max
Unit
DIFF AMP + OUTPUT AMP
Gain Equation
Gain Range
G = +0.1(1+ REXT1/REXT2).
See Figure 29.
VOCM = 0 V. RTI of input pins2.
Output amp G = +1.
V/V
V/V
mV
0.11
−1.5
100
+1.5
0.11
−1.5
100
+1.5
Offset Voltage
vs. Temperature
CMRR
4
8
4
8
µV/°C
dB
RTI of input pins.
G = +0.1 to +100.
75
75
500 Hz.
−40°C to +85°C.
75
70
75
70
dB
dB
Minimum CMRR Over Temperature
vs. Temperature
PSRR (RTI)
1
94
4
1
94
4
(µV/V)/°C
dB
VS = 10 V to 18 V.
77
77
Input Voltage Range
Common Mode
Differential
−120
−120
+120 −120
+120 −120
+120
+120
V
V
Dynamic Response
Small Signal BW –3 dB
Full Power Bandwidth
Settling Time
G = +0.1.
600
5
600
5
kHz
kHz
µs
G = +0.1, to 0.01%, 100 V step.
40
40
Slew Rate
0.3
0.3
V/µs
Noise (RTI)
Spectral Density
1 kHz.
0.1 Hz to 10 Hz.
300
15
300
15
nV/√Hz
µV p-p
DIFF-AMP
Gain
0.1
0.1
V/V
Error
−0.1
−1.5
+0.01 +0.1
−0.1
−1.5
+0.01 +0.1
%
vs. Temperature
Nonlinearity
vs. Temperature
Offset Voltage
vs. Temperature
Input Impedance
Differential
Common Mode
CMRR
5
5
5
5
ppm/°C
ppm
ppm
mV
3
10
+1.5
8
3
10
+1.5
8
RTI of input pins.
µV/°C
220
55
220
55
kΩ
kΩ
dB
RTI of input pins.
G = +0.1 to +100.
75
75
500 Hz.
−40°C to +85°C.
75
70
75
70
dB
dB
Minimum CMRR Over Temperature
vs. Temperature
1
4
1
4
(µV/V)/°C
Output Resistance
Error
10
10
kΩ
%
−0.1
+0.1
−0.1
+0.1
Rev. C | Page 3 of 20
AD628
AD628AR
Typ
AD628ARM
Parameter
Conditions
Min
Max
Min
Typ
Max
Unit
OUTPUT AMPLIFIER
Gain Equation
Nonlinearity
Offset Voltage
G = (1 + REXT1/REXT2).
G = +1, VOUT = 10 V.
RTI of output amp.
V/V
ppm
+0.15 mV
0.5
0.5
−0.15
+0.15 −0.15
vs. Temperature
Output Voltage Swing
0.6
0.6
µV/°C
V
V
nA
nA
dB
dB
RL = 10 kΩ.
RL = 2 kΩ.
−14.2
−13.8
+14.1 −14.2
+13.6 −13.8
3
0.5
130
130
+14.1
+13.6
3
Bias Current
Offset Current
CMRR
Open-Loop Gain
POWER SUPPLY
Operating Range
Quiescent Current
TEMPERATURE RANGE
1.5
0.2
1.5
0.2
0.5
VCM = 13 V.
VOUT = 13 V.
130
130
2.25
–40
18
1.6
+85
2.25
–40
18
1.6
V
mA
°C
+85
1 To use a lower gain, see the Gain Adjustment section.
2The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification.
Rev. C | Page 4 of 20
AD628
TA = 25°C, VS = +5 V, RL = 2 kΩ, REXT1 = 10 kΩ, REXT2 = ∞, VREF = +2.5 unless otherwise noted.
Table 2.
AD628AR
Typ
AD628ARM
Typ Max Unit
Parameter
Conditions
Min
Max Min
DIFF AMP + OUTPUT AMP
Gain Equation
Gain Range
G = +0.1(1+ REXT1/REXT2).
See Figure 29.
VOCM = 2.25 V. RTI of input pins2.
Output Amp G = +1.
V/V
V/V
+3.0 mV
0.11
−3.0
100
+3.0 −3.0
0.11
100
Offset Voltage
vs. Temperature
CMRR
6
15
75
75
70
4
6
15
µV/°C
dB
dB
dB
(µV/V)/°C
dB
RTI of input pins. G = 0.1 to 100.
500 Hz.
75
75
70
Minimum CMRR Over Temperature −40°C to +85°C.
vs. Temperature
PSRR (RTI)
1
94
1
94
4
VS = 4.5 V to 10 V.
77
77
Input Voltage Range
Common Mode3
Differential
−12
−15
+17 −12
+15 −15
+17
+15
V
V
Dynamic Response
Small Signal BW –3 dB
Full Power Bandwidth
Settling Time
G = +0.1.
440
30
15
440
30
15
kHz
kHz
µs
G = +0.1, to 0.01%, 30 V step.
Slew Rate
0.3
0.3
V/µs
Noise (RTI)
Spectral Density
1 kHz.
0.1 Hz to 10 Hz.
350
15
350
15
nV/√Hz
µV p-p
DIFF-AMP
Gain
Error
0.1
0.1
V/V
%
ppm
ppm
–0.1
−2.5
+0.01 +0.1 –0.1
3
3
+0.01 +0.1
3
3
Nonlinearity
vs. Temperature
Offset Voltage
vs. Temperature
Input Impedance
Differential
Common Mode
CMRR
10
10
RTI of input pins.
+2.5 −2.5
10
+2.5 mV
10
µV/°C
220
55
220
55
kΩ
kΩ
dB
RTI of input pins. G = +0.1 to +100. 75
75
500 Hz.
75
70
75
70
dB
dB
Minimum CMRR Over Temperature −40°C to +85°C.
vs. Temperature
Output Resistance
Error
1
10
4
1
10
4
(µV/V)/°C
kΩ
%
−0.1
+0.1 −0.1
+0.1
OUTPUT AMPLIFIER
Gain Equation
Nonlinearity
Output Offset Voltage
vs. Temperature
Output Voltage Swing
G = (1 + REXT1/REXT2).
G = +1, VOUT = 1 V to 4 V.
RTI of output amp.
V/V
ppm
0.15 mV
0.5
0.5
−0.15
0.15 −0.15
0.6
4.1
4
0.6
4.1
4
µV/°C
V
V
RL = 10 kΩ.
RL = 2 kΩ.
0.9
1
0.9
1
Bias Current
Offset Current
CMRR
1.5
0.2
3
0.5
1.5
0.2
3
0.5
nA
nA
dB
dB
VCM = 1 V to 4 V.
VOUT = 1 V to 4 V.
130
130
130
130
Open-Loop Gain
Rev. C | Page 5 of 20
AD628
AD628AR
Typ
AD628ARM
Typ Max Unit
Parameter
Conditions
Min
2.25
−40
Max Min
POWER SUPPLY
Operating Range
Quiescent Current
TEMPERATURE RANGE
+36
1.6
2.25
+36
1.6
V
mA
°C
+85 −40
+85
1To use a lower gain, see the Gain Adjustment section.
2 The addition of the difference amp’s and output amp’s offset voltage does not exceed this specification.
3 Greater values of voltage are possible with greater or lesser values of VREF
.
Rev. C | Page 6 of 20
AD628
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
T = 150°C
J
Supply Voltage
18 V
Internal Power Dissipation
Input Voltage (Common Mode)
Differential Input Voltage
Output Short-Circuit Duration
Storage Temperature
See Figure 3
120 V1
120 V1
Indefinite
–65°C to +125°C
–40°C to +85°C
300°C
8-LEAD MSOP PACKAGE
8-LEAD SOIC PACKAGE
Operating Temperature Range
Lead Temperature Range (10 sec Soldering)
Stresses greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This is a
stress rating only; functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
MSOP θ (JEDEC; 4-LAYER BOARD) = 132.54°C/W
J
SOIC θ (JEDEC; 4-LAYER BOARD) = 154°C/W
J
–60
–40
–20
0
20
40
60
80
100
AMBIENT TEMPERATURE (°C)
Figure 3. Maximum Power Dissipation vs. Temperature
1 When using 12 V supplies or higher (see the Input Voltage Range section).
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. C | Page 7 of 20
AD628
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 4. Pin Function Descriptions
Pin No. Mnemonic Function
1
2
3
4
8
7
6
5
–IN
+V
+IN
AD628
TOP VIEW
(Not to Scale)
–V
S
S
1
2
3
4
5
6
7
8
+IN
−VS
VREF
CFILT
OUT
RG
Noninverting Input
V
R
G
REF
Negative Supply Voltage
Reference Voltage Input
Filter Capacitor Connection
Amplifier Output
Output Amplifier Inverting Input
Positive Supply Voltage
Inverting Input
C
OUT
FILT
Figure 4. Pin Configuration
+VS
−IN
Rev. C | Page 8 of 20
AD628
TYPICAL PERFORMANCE CHARACTERISTICS
140
120
100
80
40
8440 UNITS
G = +0.1
35
30
25
20
15
10
5
–15V
+15V
60
+2.5V
40
20
0
0
0.1
1
10
100
1k
10k
100k
1M
–1.6 –1.2 –0.8 –0.4
0
0.4
0.8
1.2
1.6
2.0
INPUT OFFSET VOLTAGE (mV)
FREQUENCY (Hz)
Figure 5. Typical Distribution of Input Offset Voltage,
VS = 15 V, SOIC Package
Figure 8. PSRR vs. Frequency, Single and Dual Supplies
25
20
15
10
5
1000
8440 UNITS
0
–74
100
–78
–82
–86
–90
–94
–98 –102 –106 –110
1
10
100
1k
10k
100k
CMRR (dB)
FREQUENCY (Hz)
Figure 6. Typical Distribution of Common-Mode Rejection, SOIC Package
Figure 9. Voltage Noise Spectral Density, RTI, VS = 15 V
130
120
110
100
1000
V
= ±15V
S
90
80
70
60
50
40
30
V
= ±2.5V
S
100
10
100
1k
FREQUENCY (Hz)
10k
100k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
Figure 7. CMRR vs. Frequency
Figure 10. Voltage Noise Spectral Density, RTI, VS = 2.5 V
Rev. C | Page 9 of 20
AD628
40
35
30
25
20
15
10
5
9638 UNITS
1s
100
90
10
0
0
0
5
10
0
1
2
3
4
5
6
7
8
9
10
TIME (Sec)
GAIN ERROR (ppm)
Figure 11. 0.1 Hz to 10 Hz Voltage Noise, RTI
Figure 14. Typical Distribution of +1 Gain Error
60
50
150
100
50
UPPER CMV LIMIT
G = +100
G = +10
G = +1
40
–40°C
30
20
+85°C
V
= 0V
REF
10
0
+25°C
0
–40°C
–50
–100
–150
–10
–20
–30
–40
G = +0.1
+85°C
LOWER CMV LIMIT
15
100
1k
10k
100k
1M
10M
0
5
10
(±V)
20
FREQUENCY (Hz)
V
S
Figure 12. Small Signal Frequency Response,
OUT = 200 mV p-p, G = +0.1, +1, +10, and +100
Figure 15. Common-Mode Operating Range vs.
Power Supply Voltage for Three Temperatures
V
60
50
VS = ±15V
500µV
G = +100
G = +10
G = +1
100
90
RL = 1k
Ω
40
30
20
RL = 2k
Ω
10
0
RL = 10k
Ω
10
0
–10
–20
–30
–40
G = +0.1
4.0V
10
100
1k
10k
100k
1M
OUTPUT VOLTAGE (V)
FREQUENCY (Hz)
Figure 13. Large Signal Frequency Response,
VOUT = 20 V p-p, G = +0.1, +1, +10, and +100
Figure 16. Normalized Gain Error vs. VOUT, VS = 15 V
Rev. C | Page 10 of 20
AD628
VS = ±2.5V
RL = 1k
100µV
500mV
Ω
100
90
100
90
RL = 2k
Ω
RL = 10k
Ω
10
0
10
0
4µs
50mV
500mV
OUTPUT VOLTAGE (V)
Figure 17. Normalized Gain Error vs. VOUT, VS = 2.5 V
Figure 20. Small Signal Pulse Response,
RL = 2 kΩ, CL = 0 pF, Top: Input, Bottom: Output
4
3
2
1
0
500mV
100
90
10
0
4µs
50mV
–40
–20
0
20
40
60
80
100
TEMPERATURE (°C)
Figure 18. Bias Current vs. Temperature Buffer
Figure 21. Small Signal Pulse Response,
RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output
15
10
5
–40°C
–25°C
+85°C
100
90
10.0 V
10.0 V
+25°C
0
–40°C
–5
–10
–15
–25°C
10
0
+85°C
+25°C
40 µs
0
5
10
15
20
25
OUTPUT CURRENT (mA)
Figure 19. Output Voltage Operating Range vs. Output Current
Figure 22. Large Signal Pulse Response,
RL = 2 kΩ, CL = 1000 pF, Top: Input, Bottom: Output
Rev. C | Page 11 of 20
AD628
100
100
90
90
5V
5V
10mV
10mV
10
0
10
0
100
µ
s
100µs
Figure 23. Settling Time to 0.01%, 0 V to 10 V Step
Figure 24. Settling Time to 0.01% 0 V to −10 V Step
Rev. C | Page 12 of 20
AD628
TEST CIRCUITS
HP3589A
HP3561A
SPECTRUM ANALYZER
SPECTRUM ANALYZER
+V
S
+V
S
C
FILT
4
7
–IN
10kΩ
10kΩ
–
+IN
–IN
100kΩ
FET
PROBE
–IN
+IN
AD829
+
10kΩ
10kΩ
100kΩ
100kΩ
8
1
OUT
+IN
–IN
OUT
–IN
5
G = +0.1
+IN
+IN
G = +100
–IN
G = +0.1
+IN
100kΩ
AD628
10kΩ
AD628
C
R
10kΩ
FILT
V
G
REF
3
2
6
R
V
–V
G
REF
S
10kΩ
–V
S
–
10kΩ
AD707
+
Figure 25. CMRR vs. Frequency
Figure 27. Noise Tests
SCOPE
+V
S
1 VAC
+15V
G = +100
G = +100
+IN
–IN
10kΩ
10kΩ
+
OUT
20Ω
100kΩ
AD829
–
–IN
–IN
G = +0.1
+IN
+IN
100kΩ
AD628
10kΩ
V
C
R
G
REF
FILT
–V
S
Figure 26. PSRR vs. Frequency
Rev. C | Page 13 of 20
AD628
THEORY OF OPERATION
R
G
The AD628 is a high common-mode voltage difference
amplifier, combined with a user configurable output amplifier
(see Figure 28 and Figure 29). Differential mode voltages in
excess of 120 V are accurately scaled by a precision 11:1 voltage
divider at the input. A reference voltage input is available to the
user at Pin 3 (VREF). The output common-mode voltage of the
difference amplifier is the same as the voltage applied to the
reference pin. If the uncommitted amplifier is configured for
gain, connecting Pin 3 to one end of the external gain resistor
establishes the output common-mode voltage at Pin 5 (OUT).
100kΩ
100kΩ
10kΩ
G = +0.1
–IN
+IN
–IN
+IN
OUT
A2
–IN
10kΩ
A1
+IN
10kΩ
V
C
FILT
REF
The output of the difference amplifier is internally connected
to a 10 kΩ resistor trimmed to better than 0.1% absolute
accuracy. The resistor is connected to the noninverting input of
the output amplifier and is accessible to the user at Pin 4 (CFILT).
A capacitor may be connected to implement a low-pass filter, a
resistor may be connected to further reduce the output voltage,
or a clamp circuit may be connected to limit the output swing.
Figure 28. Simplified Schematic
C
FILT
+V
S
AD628
10kΩ
100kΩ
The uncommitted amplifier is a high open-loop gain, low offset,
low drift op amp, with its noninverting input connected to the
internal 10 kΩ resistor. Both inputs are accessible to the user.
–IN
+IN
G = +0.1
–IN
10kΩ
A1
+IN
OUT
A2
+IN
Careful layout design has resulted in exceptional common-
mode rejection at higher frequencies. The inputs are connected
to Pin 1 (+IN) and Pin 8 (−IN), which are adjacent to the power
Pin 2 (−VS) and Pin 7 (+VS). Because the power pins are at ac
ground, input impedance balance and, therefore, common-
mode rejection, are preserved at higher frequencies.
–IN
100kΩ
10kΩ
–V
V
REF
R
S
G
R
EXT3
R
R
EXT1
REFERENCE
VOLTAGE
EXT2
Figure 29. Circuit Connections
Rev. C | Page 14 of 20
AD628
APPLICATIONS
GAIN ADJUSTMENT
INPUT VOLTAGE RANGE
The AD628 system gain is provided by an architecture
consisting of two amplifiers. The gain of the input stage
is fixed at 0.1; the output buffer is user adjustable as
The common-mode input voltage range is determined by VREF
and the supply voltage. The relation is expressed by
VCM
≤11(VS+ –1.2 V)−10VREF
≥11(VS− +1.2 V)−10VREF
UPPER
G
A2 = 1 + REXT1/REXT2. The system gain is then
(2)
VCM
LOWER
⎛
⎞
REXT1
REXT2
(1)
⎜
⎟
⎟
GTOTAL = 0.1× 1+
⎜
⎝
where VS+ is the positive supply, VS− is the negative supply
⎠
and 1.2 V is the headroom needed for suitable performance.
Equation 2 provides a general formula for calculating the
common-mode input voltage range. However, the AD628
should be kept within the maximum limits listed in the
Specifications table (Table 1) to maintain optimal performance.
This is illustrated in Figure 30 where the maximum common-
mode input voltage is limited to 120 V. Figure 31 shows the
common-mode input voltage bounds for single-supply voltages.
At a 2 nA maximum, the input bias current of the buffer amplifier
is very low and any offset voltage induced at the buffer amplifier by
its bias current may be neglected (2 nA × 10 kΩ = 20 µV). However,
to absolutely minimize bias current effects, REXT1 and REXT2 may be
selected so that their parallel combination is 10 kΩ. If practical
resistor values force the parallel combination of REXT1 and REXT2
below 10 kΩ, a series resistor (REXT3) may be added to make up for
the difference. Table 5 lists several values of gain and corresponding
resistor values.
200
150
100
50
Table 5. Nearest Standard 1% Resistor Values for Various
Gains (See Figure 29)
Total Gain
(V/V)
A2 Gain
(V/V)
REXT1 (Ω)
REXT2 (Ω)
REXT3 (Ω)
MAXIMUM INPUT COMMON-MODE
0
0.1
0.2
0.25
0.5
1
2
5
10
1
2
10 k
20 k
∞
20 k
0
0
0
0
0
0
0
0
VOLTAGE WHEN V
= GND
REF
–50
–100
–150
–200
2.5
5
10
20
50
100
25.9 k
49.9 k
100 k
200 k
499 k
1 M
18.7 k
12.4 k
11 k
10.5 k
10.2 k
10.2 k
0
2
4
6
8
10
12
14
16
SUPPLY VOLTAGE (±V)
To set the system gain to less than 0.1, an attenuator may be
created by placing a resistor, REXT4, from Pin 4 (CFILT) to the
reference voltage. A divider would be formed by the 10 kΩ
resistor which is in series with the positive input of A2 and
REXT4. A2 would be configured for unity gain.
Figure 30. Input Common-Mode Voltage vs. Supply Voltage for Dual Supplies
100
80
Using a divider and setting A2 to unity gain yields
60
40
⎛
⎜
⎜
⎝
⎞
⎟
⎟
⎠
REXT4
10 kΩ + REXT4
GW /DIVIDER = 0.1×
×1
20
MAXIMUM INPUT COMMON-MODE
0
–20
–40
–60
–80
VOLTAGE WHEN V
= MIDSUPPLY
REF
0
2
4
6
8
10
12
14
16
SINGLE-SUPPLY VOLTAGE (V)
Figure 31. Input Common-Mode Voltage vs.
Supply Voltage for Single Supplies
Rev. C | Page 15 of 20
AD628
The differential input voltage range is constrained to the
linear operation of the internal amplifiers A1 and A2. The
voltage applied to the inputs of A1 and A2 should be between
VS− + 1.2 V and VS+ − 1.2 V. Similarly, the outputs of A1 and A2
The design of such an application may be done in a few simple
steps, which include the following:
• Determine the required gain. For example, if the input voltage
must be transformed from 10 V to 0 V to +5 V, the gain is
+5/+20 or +0.25.
should be kept between VS + 0.9 V and VS+ − 0.9 V.
−
VOLTAGE LEVEL CONVERSION
• Determine if the circuit common-mode voltage must be
changed. An AD7715-5 ADC is illustrated for this example.
When operating from a 5 V supply, the common-mode
voltage of the AD7715 is half the supply or 2.5 V. If the
AD628 reference pin and the lower terminal of the 10 kΩ
resistor are connected to a 2.5 V voltage source, the output
common-mode voltage will be 2.5 V.
Industrial signal conditioning and control applications typically
require connections between remote sensors or amplifiers and
centrally located control modules. Signal conditioners provide
output voltages up to 10 V full scale; however, ADCs or
microprocessors operating on single 3.3 V to 5 V logic supplies
are becoming the norm. Thus, the controller voltages require
further reduction in amplitude and reference.
Table 6 shows resistor and reference values for commonly used
single-supply converter voltages. REXT3 is included as an option.
It is used to balance the source impedance into A2, which is
described in more detail in the Gain Adjustment section.
Furthermore, voltage potentials between locations are seldom
compatible, and power line peaks and surges can generate
destructive energy between utility grids. The AD628 is an ideal
solution to both problems. It attenuates otherwise destructive
signal voltage peaks and surges by a factor of 10 and shifts the
differential input signal to the desired output voltage.
Table 6. Nearest 1% Resistor Values for Voltages Level
Conversion Applications
ADC
Supply
Input
Desired
Voltage Voltage
Output
Voltage (V)
VREF REXT1
REXT3
(kΩ)
Conversion from voltage-driven or current-loop systems is
easily accommodated using the circuit in Figure 32. This shows
a circuit for converting inputs of various polarities and
amplitudes to the input of a single-supply ADC.
(V)
10
(V)
5
(V)
2.5
2.5
2.5
2.5
(kΩ)
15.0
39.7
39.7
89.8
2.5
2.5
2.5
2.5
1.25
1.25
1.25
1.25
4.02
2.00
2.00
1.00
7.96
4.02
4.02
2.00
5
+10
+5
10
5
5
5
3
Note that the common-mode output voltage can be adjusted by
connecting Pin 3 (VREF) and the lower end of the 10 kΩ resistor
to the desired voltage. The output common-mode voltage will
be the same as the reference voltage.
1.25 2.49
1.25 15.0
1.25 15.0
1.25 39.7
5
3
+10
+5
3
3
AD7715-5
DGND
SCLK
SERIAL CLOCK
CLOCK
DV
DD
MCLK IN
+5V
MCLK OUT DIN
NC
DOUT
DRDY
CS
+V
S
+5V
RESET
AV
DD
AGND
–IN
+IN
10kΩ
100kΩ
100kΩ
10kΩ
G = +0.1
OUT
+IN
–IN
(SEE
TABLE 5)
A2
REF IN(–)
AIN(+)
–IN
V
AIN(–) REF IN(+)
A1
IN
R
+IN
EXT1
(SEE
TABLE 5)
+2.5V
AD628
10kΩ
+5V
AD680
V
R
REF
G
–V
S
C
FILT
R
EXT3
10kΩ
(SEE
TABLE 5)
Figure 32. Level Shifter
Rev. C | Page 16 of 20
AD628
CURRENT LOOP RECEIVER
MONITORING BATTERY VOLTAGES
Analog data transmitted on a 4 to 20 mA current loop may be
detected with the receiver shown in Figure 33. The AD628 is an
ideal choice for such a function, because the current loop must
be driven with a compliance voltage sufficient to stabilize the
loop, and the resultant common-mode voltage often exceeds
commonly used supply voltages. Note that with large shunt
values a resistance of equal value must be inserted in series with
the inverting input to compensate for an error at the
noninverting input.
Figure 34 illustrates how the AD628 may be used to monitor a
battery charger. Voltages approximately eight times the power
supply voltage may be applied to the input with no damage. The
resistor divider action is well suited for the measurement of
many power supply applications, such as those found in battery
chargers or similar equipment.
+15V
+V
S
250Ω
–IN
100kΩ
100kΩ
10kΩ
10kΩ
+IN
0V TO 5V
TO ADC
OUT
A2
G = +0.1
A1
–IN
–IN
+IN
250Ω
R
+IN
EXT1
100kΩ
AD628
10kΩ
4–20mA
SOURCE
R
G
–V
V
S
REF
C
–15V
FILT
R
EXT2
11kΩ
2.5V
REF
Figure 33. Level Shifter for 4 to 20 mA Current Loop
5V
+V
S
nV
(V)
–IN
100kΩ
100kΩ
10kΩ
10kΩ
BAT
0V TO 5V
TO ADC
+IN
–IN
OUT
A2
G = +0.1
A1
R
10kΩ
–IN
+IN
EXT1
CHARGING
CIRCUIT
+1.5V
BATTERY
R
G
+IN
OTHER
BATTERIES IN
CHARGING
CIRCUIT
10kΩ
AD628
–V
V
C
FILT
S
REF
Figure 34. Battery Voltage Monitor
Rev. C | Page 17 of 20
AD628
FILTER CAPACITOR VALUES
KELVIN CONNECTION
A capacitor may be connected to Pin 4 (CFILT) to implement a
low-pass filter. The capacitor value is
In certain applications, it may be desirable to connect the
inverting input of an amplifier to a remote reference point. This
eliminates errors resulting in circuit losses in interconnecting
wiring. The AD628 is particularly suited for this type of
connection. In Figure 35, a 10 kΩ resistor is added in the
feedback to match the source impedance of A2, which is
described in more detail in the Gain Adjustment section.
C =15.9/ft
(
μF
)
where ft is the desired 3 dB filter frequency.
Table 7 shows several frequencies and their closest standard
capacitor values.
5V
+V
S
Table 7. Capacitor Values for Various Filter Frequencies
Frequency (Hz) Capacitor Value (µF)
–IN
100kΩ
100kΩ
10kΩ
10kΩ
CIRCUIT
LOSS
+IN
A2
–IN
OUT
10
1.5
G = +0.1
A1
–IN
+IN
50
0.33
60
0.27
10kΩ
R
G
100
400
1 k
5 k
10 k
0.15
LOAD
+IN
0.039
0.015
0.0033
0.0015
10kΩ
AD628
V
–V
REF
C
FILT
S
V
/2
S
Figure 35. Kelvin Connection
Rev. C | Page 18 of 20
AD628
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
3.00
BSC
8
1
5
4
8
5
4
6.20 (0.2440)
5.80 (0.2284)
4.00 (0.1574)
3.80 (0.1497)
4.90
BSC
3.00
BSC
1.27 (0.0500)
BSC
0.50 (0.0196)
0.25 (0.0099)
× 45°
PIN 1
1.75 (0.0688)
1.35 (0.0532)
0.65 BSC
0.25 (0.0098)
0.10 (0.0040)
1.10 MAX
8°
0.15
0.00
0.51 (0.0201)
0.31 (0.0122)
0° 1.27 (0.0500)
COPLANARITY
0.10
0.25 (0.0098)
0.17 (0.0067)
SEATING
PLANE
0.80
0.60
0.40
0.40 (0.0157)
8°
0°
0.38
0.22
0.23
0.08
COMPLIANT TO JEDEC STANDARDS MS-012AA
COPLANARITY
0.10
SEATING
PLANE
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MO-187AA
Figure 37. 8-Lead Standard Small Outline Package [SOIC] Narrow Body
Figure 36. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
(R-8)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters
ORDERING GUIDE
Model
AD628AR
AD628AR-REEL
AD628AR-REEL7
AD628ARM
AD628ARM-REEL
AD628ARM-REEL7
AD628-EVAL
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Description
Package Option
Branding
8-Lead SOIC
R-8
R-8
R-8
RM-8
RM-8
RM-8
8-Lead SOIC 13" Reel
8-Lead SOIC 7" Reel
8-Lead MSOP
8-Lead MSOP 13" Reel
8-Lead MSOP 7" Reel
Evaluation Board
JGA
JGA
JGA
Rev. C | Page 19 of 20
AD628
NOTES
©
2004 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
C02992–0–4/04(C)
Rev. C | Page 20 of 20
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