5962L8856503VCA [ADI]
Aerospace Very Low-Noise Quad Op Amp;
| 型号： | 5962L8856503VCA |
| 厂家： | 
ADI |
| 描述： | Aerospace Very Low-Noise Quad Op Amp 放大器 |
| 文件： | 总5页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OP470
Very low noise, quad, operational amplifier
3.0
Absolute Maximum Ratings 1/
Supply Voltage (VCC) ......................................................... ±18V dc
Differential Input Voltage 2/............................................... ±1V dc
Differential Input Current 2/............................................... ±25mA
Input Voltage ...................................................................... Supply voltage
Output Short Circuit Duration ............................................ Continuous
Storage Temperature Range................................................ -65°C to +150°C
Lead Temperature (soldering, 60 seconds)......................... +300°C
Power Dissipation (PD) ....................................................... 500mW
Maximum Junction Temperature (TJ)................................. +150°C
Ambient Operating Temperature Range............................. -55°C to +125°C
Absolute Maximum Ratings Notes:
1/ Stresses above the absolute maximum rating may cause permanent damage to
the device. Extended operation at the maximum levels may degrade
performance and affect reliability.
2/ The inputs are protected by back-to-back diodes. Current limiting resistors are
not used in order to achieve low noise performance. If the differential input
voltage exceeds ±1V, the input current should be limited to ±25mA.
3.1
Thermal Characteristics:
Thermal Resistance, Lead Leadless Chip Carrier (TC) Package
Junction-to-Case (ΘJC) = See MIL-STD-1835
Junction-to-Ambient (ΘJA) = 110 °C/W Max
4.0
Electrical Table:
Table I - Electrical Characteristics
Conditions
1/
Sub-
groups
Limit
Min
Limit
Max
Parameter
Symbol
Units
mV
1
2, 3
1
1
2, 3
1
1
2, 3
1
7
4
±0.4
±0.6
±0.6
±10
±20
±50
±25
±50
±500
110
Input Offset Voltage
VIO
M, D, L, R
VCM = 0V
M, D, L, R
VCM = 0V
M, D, L, R
Input Offset Current
Input Bias Current
IIO
nA
IIB
En
Input Noise Voltage 4/
fo = 1Hz to 100Hz
VO = ±10V, RL = 10kΩ
M, D, L, R
nVRMS
V/mV
1000
750
100
500
400
5, 6
4
4
Large Signal Voltage Gain
AVS
VO = ±10V, RL = 2kΩ 4/
5, 6
ASD0013059 Rev. B
25-Sep-07
Page 2 of 5
OP470
Very low noise, quad, operational amplifier
Table I - Electrical Characteristics (continued)
Conditions
1/
Sub-
groups
Limit
Min
Limit
Max
Parameter
Symbol
VOP
Units
V
Output Voltage Swing 4/
Supply Current 2/
RL = 2Kohm
No Load
4, 5, 6,
1, 2, 3
1
±12
11
11
ISY
mA
M, D, L, R
Input Voltage Range 4/
Slew Rate 4/
IVR
SR
1, 2, 3
7
±11
1.4
V
V/μV
AVLC = +21, RL = 10kΩ
1
2, 3
1
110
100
Common Mode Rejection 4/ CMR
VCM = IVR 3/
dB
1.8
5.6
Power Supply Rejection
PSRR
VS = ±4.5V to ±18V
μV/V
Ratio 4/
2, 3
Table I Notes:
1/ VS = ±15V, RS = 50Ω, unless otherwise specified.
2/ ISY limit equals the total of all four amplifiers.
3/ IVR is defined as the VCM range used for the CMR test.
4/ Not tested Post Irradiation.
4.1
Electrical Test Requirements:
Table II
Subgroups (in accordance with
MIL-PRF-38535, Table III)
Test Requirements
Interim Electrical Parameters
Final Electrical Parameters
Group A Test Requirements
1
1, 2, 3, 4, 5, 6 1/ 2/
1, 2, 3, 4, 5, 6, 7
Group C end-point electrical parameters 1, 2, 3 2/
Group D end-point electrical parameters
Group E end-point electrical parameters
1
1
1/ PDA applies to Subgroup 1 only. Delta's excluded from PDA.
2/ See Table III for delta parameters. See table I for conditions.
4.2
Life Test and Burn-In Delta Limits:
Table III
TEST
BURN-IN
LIFETEST
DELTA
LIMIT
TITLE
ENDPOINT ENDPOINT
UNITS
VIO
IIB
±0.4
±25
±10
±0.5
±30
±15
±0.1
±5
mV
nA
nA
IIO
±5
ASD0013059 Rev. B
25-Sep-07
Page 3 of 5
OP470
Very low noise, quad, operational amplifier
5.0
Life Test/Burn-In Information
5.1
5.2
5.3
HTRB is not applicable for this drawing.
Burn-in is per MIL-STD-883 Method 1015 test condition B.
Steady state life test is per MIL-STD-883 Method 1005.
ASD0013059 Rev. B
25-Sep-07
Page 4 of 5
OP470
Very low noise, quad, operational amplifier
Rev
A
B
Description of Change
Initiate
Update web address. Remove BI circuit.
Date
Dec. 10, 2002
May 29, 2003
ASD0013059 Rev. B
25-Sep-07
Page 5 of 5
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