ACT366YH-T [ACTIVE-SEMI]
High Performance ActivePSRTM Primary Switching Regulator; 高性能ActivePSRTM主开关稳压器
| 型号： | ACT366YH-T |
| 厂家： | 
ACTIVE-SEMI, INC |
| 描述： | High Performance ActivePSRTM Primary Switching Regulator |
| 文件： | 总11页 (文件大小：323K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ACT366
Rev 1, 14-Nov-12
High Performance ActivePSRTM Primary Switching Regulator
The ACT366 ActivePSRTM is optimized for high
performance, cost-sensitive applications, and
FEATURES
• Patented Primary Side Regulation
utilizes Active-Semi’s proprietary primary-side
feedback architecture to provide accurate constant
voltage, constant current (CV/CC) regulation
without the need of an opto-coupler or reference
device. Integrated line and primary inductance
compensation circuitry provides accurate constant
current operation despite wide variations in line
voltage and primary inductance. Integrated output
cord resistance compensation further enhances
output accuracy. The ACT366 achieves excellent
regulation and transient response, yet requires less
than 150mW of standby power.
Technology
• No Opto-Coupler
• Suitable Operation Frequency up to 85kHZ
• Best-in-Class Constant Voltage Accuracy
• Proprietary Fast Startup with Big Capacitive
Load
• Built-in Soft-Start Circuit
• Integrated Line and Primary Inductance
Compensation
The ACT366 is optimized for compact size 6W to
14W adapter applications. It is available in SOP-
8/EP (Exposed Pad) package.
• Integrated Programmable Output Cord
Resistance Compensation
• Line Under-Voltage, Output Over-Voltage,
Output Short-Circuit and Over-Temperature
Protection
Figure 1:
Simplified Application Circuit
• Complies with all Global Energy Efficiency
and CEC Average Efficiency Standards
• Dedicate Adapter Application from 6W to
14W
APPLICATIONS
• RCC Adapter Replacements
• Linear Adapter Replacements
• Standby and Auxiliary Supplies
GENERAL DESCRIPTION
The ACT366 belongs to the high performance
patented ActivePSRTM Family of Universal-input
AC/DC off-line controllers for adapter applications.
It is designed for flyback topology working in
discontinuous conduction mode (DCM). The
ACT366 meets all of the global energy efficiency
regulations (CEC, European Blue Angel, and US
Energy Star standards) while using very few
external components.
Table 1:
Output Power Table
85-265VAC
PART
TYPICAL
NUMBER
Po MAX
APPLICATION
The ACT366 ensures safe operation with complete
protection against all fault conditions. Built-in
protection circuitry is provided for output short-
circuit, output over-voltage, line under-voltage, and
over temperature conditions.
ACT366YH-T
(SOP-8/EP)
12V/1A
14W
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
ORDERING INFORMATION
PACKING
METHOD
PART NUMBER
TEMPERATURE RANGE
PACKAGE PINS
TOP MARK
ACT366YH-T
-40°C to 85°C
SOP-8/EP
8
TAPE & REEL
ACT366YH
PIN CONFIGURATION
SOP-8/EP
ACT366YH
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
Switch Drive. Switch node for the external NPN transistor. Connect this pin to the external power
NPN’s emitter. This pin also supplies current to VDD during startup.
1
SW
2,4,7
GND
BD
Ground.
8
6
5
Base Drive. Base driver for the external NPN transistor.
VDD
FB
Power Supply. This pin provides bias power for the IC during startup and steady state operation.
Feedback Pin. Connect this pin to a resistor divider network from the auxiliary winding.
Current Sense Pin. Connect an external resistor (RCS) between this pin and ground to set peak
current limit for the primary switch. The peak current limit is set by (0.396V × 0.9) / RCS. For more
detailed information, see Application Information.
3
CS
EP
Exposed Pad shown as dashed box. The exposed thermal pad should be connected to board
ground plane and pin 4. The ground plane should include a large exposed copper pad under the
package for thermal dissipation (see package outline). The leads and exposed pad should be
flush with the board, without offset from the board surface.
EP
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
ABSOLUTE MAXIMUM RATINGSc
PARAMETER
VDD, BD, SW to GND
VALUE
-0.3 to + 28
100
UNIT
V
Maximum Continuous VDD Current
FB, CS to GND
mA
V
-0.3 to + 6
Continuous SW Current
Internally limited
A
W
Maximum Power Dissipation (derate 6.7mW/˚C above TA = 50˚C)
Junction to Ambient Thermal Resistance (θJA)
Operating Junction Temperature
Storage Junction
1.8
46
˚C/W
˚C
-40 to 150
-55 to 150
300
˚C
Lead Temperature (Soldering, 10 sec)
˚C
c: Do not exceed these limits to prevent damage to the device. Exposure to absolute maximum rating conditions for long periods may
affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = 14V, VOUT = 5V, LP = 1.5mH, NP = 140, NS = 7, NA = 19, TA = 25°C, unless otherwise specified.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
Supply
VDD Turn-On Voltage
VDD Turn-Off Voltage
Supply Current
VDDON
VDDOFF
IDD
VDD Rising from 0V
17.6
5.25
18.6
5.5
1
19.6
5.75
2
V
V
VDD Falling after Turn-on
VDD = 14V, after Turn-on
VDD = 14V, before Turn-on
mA
µA
µA
ms
Start Up Supply Current
BD Current during Startup
Internal Soft Startup Time
Oscillator
IDDST
IBDST
25
45
1
10
100% VOUTCV @ full load
25% VOUTCV @ full load
80
40
Switching Frequency
fSW
kHz
Maximum Switching Frequency
Maximum Duty Cycle
Feedback
FCLAMP
DMAX
85
65
100
75
110
85
kHz
%
Effective FB Voltage
FB Leakage Current
VFB
2.176 2.200 2.224
V
IFBLK
100
nA
No RCORD between VDD and SW
RCORD = 300k
0
3
Output Cable Resistance
Compensation
DVCOMP
RCORD = 150k
RCORD = 75k
RCORD = 33k
6
%
9
12
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
ELECTRICAL CHARACTERISTICS CONT’D
(VDD = 14V, VOUT = 5V, LP = 1.5mH, NP = 140, NS = 7, NA = 19, TA = 25°C, unless otherwise specified.)
PARAMETER
SYMBOL TEST CONDITIONS
MIN
TYP
MAX UNIT
Current Limit
SW Current Limit Range
CS Current Limit Threshold
Leading Edge Blanking Time
Driver Outputs
ILIM
100
380
200
800
412
mA
mV
ns
VCSLIM
tOFF_DELAY = 0
396
300
Switch ON-Resistance
SW Off Leakage Current
Protection
RON
ISW = 50mA
1.6
3
5
Ω
VSW = VDD = 22V
µA
VDDON
+2
VDDON VDDON
VDD Latch-Off Voltage
VDDOVP
V
+3
135
20
+4
Thermal Shutdown Temperature
Thermal Hysteresis
Line UVLO
˚C
˚C
µA
IFBUVLO
116
FUNCTIONAL BLOCK DIAGRAM
GND
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
FUNCTIONAL DESCRIPTION
As shown in the Functional Block Diagram, to
regulate the output voltage in CV (constant voltage)
mode, the ACT366 compares the feedback voltage
at FB pin to the internal reference and generates an
error signal to the pre-amplifier. The error signal,
after filtering out the switching transients and
compensated with the internal compensation
network, modulates the external NPN transistor
peak current at CS pin with current mode PFWM
(Pulse Frequency and Width Modulation) control.
To regulate the output current in CC (constant
current) mode, the oscillator frequency is modulated
by the output voltage.
increases to ramp up the switch current to bring the
secondary output back to regulation. The output
regulation voltage is determined by the following
relationship:
RFB1
RFB 2
NS
NA
(1)
VOUTCV = 2.20V × (1 +
)×
-VD
where RFB1 (R5) and RFB2 (R6) are top and bottom
feedback resistor, NS and NA are numbers of
transformer secondary and auxiliary turns, and VD
is the rectifier diode forward drop voltage at
approximately 0.1A bias.
Standby (No Load) Mode
SW is a driver output that drives the emitter of an
external high voltage NPN transistor. This base-
emitter-drive method makes the drive circuit the
most efficient.
In no load standby mode, the ACT366 oscillator
frequency is further reduced to
a minimum
frequency while the current pulse is reduced to a
minimum level to minimize standby power. The
actual minimum switching frequency is
programmable with an output preload resistor.
Fast Startup
VDD is the power supply terminal for the ACT366.
During startup, the ACT366 typically draws only
20μA supply current. The startup resistor from the
rectified high voltage DC rail supplies current to the
base of the NPN transistor. This results in an
amplified emitter current to VDD through the SW
pin via Active-Semi's proprietary fast-startup
circuitry until it exceeds the VDDON threshold 19V. At
this point, the ACT366 enters internal startup mode
with the peak current limit ramping up in 10ms.
After switching starts, the output voltage begins to
rise. The VDD bypass capacitor must supply the
ACT366 internal circuitry and the NPN base drive
until the output voltage is high enough to sustain
VDD through the auxiliary winding. The VDDOFF
threshold is 5.5V; therefore, the voltage on the VDD
capacitor must remain above 5.5V while the output
is charging up.
Loop Compensation
The ACT366 integrates loop compensation circuitry
for simplified application design, optimized transient
response, and minimal external components.
Output Cable Resistance Compensation
The ACT366 provides programmable output cable
resistance compensation during constant voltage
regulation, monotonically adding an output voltage
correction up to predetermined percentage at full
power. There are four levels to program the output
cable compensation by connecting a resistor (R10
in Figure 3) from the SW pin to VDD pin. The
percentage at full power is programmable to be 3%,
6%, 9% or 12%, and by using a resistor value of
300k, 150k, 75k or 33k respectively. If there is no
resistor connection, there is no cord compensation.
Constant Voltage (CV) Mode Operation
This feature allows for better output voltage
accuracy by compensating for the output voltage
droop due to the output cable resistance.
In constant voltage operation, the ACT366 captures
the auxiliary flyback signal at FB pin through a
resistor divider network R5 and R6 in Figure 6. The
signal at FB pin is pre-amplified against the internal
reference voltage, and the secondary side output
voltage is extracted based on Active-Semi's
proprietary filter architecture.
Constant Current (CC) Mode Operation
When the secondary output current reaches a level
set by the internal current limiting circuit, the
ACT366 enters current limit condition and causes
the secondary output voltage to drop. As the output
voltage decreases, so does the flyback voltage in a
proportional manner. An internal current shaping
circuitry adjusts the switching frequency based on
the flyback voltage so that the transferred power
remains proportional to the output voltage, resulting
This error signal is then amplified by the internal
error amplifier. When the secondary output voltage
is above regulation, the error amplifier output
voltage decreases to reduce the switch current.
When the secondary output voltage is below
regulation, the error amplifier output voltage
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
FUNCTIONAL DESCRIPTION CONT’D
in a constant secondary side output current profile.
The energy transferred to the output during each
switching cycle is ½(LP × ILIM2) × η, where LP is the
transformer primary inductance, ILIM is the primary
peak current, and η is the conversion efficiency.
From this formula, the constant output current can
be derived:
die temperature. The typical over temperature
threshold is 135°C with 20°C hysteresis. When the
die temperature rises above this threshold the
ACT366 is disabled until the die temperature falls
by 20°C, at which point the ACT366 is re-enabled.
TYPICAL APPLICATION
1
2
0.396V × 0.9
η × fSW
)2 ×(
)
Design Example
IOUTCC
=
× LP ×(
(2)
RCS
VOUTCV
The design example below gives the procedure for
a DCM flyback converter using the ACT366. Refer
to Application Circuit in Figure 3, the design for a
adapter application starts with the following
specification:
where fSW is the switching frequency and VOUTCV is
the nominal secondary output voltage.
The constant current operation typically extends
down to lower than 40% of nominal output voltage
regulation.
Input Voltage Range
85VAC - 265VAC, 50/60Hz
Output Power, PO
12W
12V
1A
Output Voltage, VOUTCV
Full Load Current, IOUTFL
OCP Current, IOUTMAX
Primary Inductance Compensation
The ACT366 integrates
a built-in proprietary
(patent-pending) primary inductance compensation
circuit to maintain constant current regulation
despite variations in transformer manufacturing.
The compensated range is ±7%.
1.2A
0.89
0.78
0.79
Transformer Efficiency, ηxfm
System Efficiency CC, ηsystem
System Efficiency CV, η
Primary Inductor Current Limit Compensation
The operation for the circuit shown in Figure 3 is as
follows: the rectifier bridge D3 and the capacitor
C1/C2 convert the AC line voltage to DC. This
voltage supplies the primary winding of the
transformer T1 and the startup resistor R7. The
primary power current path is formed by the
transformer’s primary winding, the NPN transistor,
the ACT366 internal MOSFET and the current
sense resistor R9. The network consisting of
capacitor C4 and diode D6 provides a VDD supply
voltage for ACT366 from the auxiliary winding of the
transformer. C4 is the decoupling capacitor of the
supply voltage and energy storage component for
startup. The diode D8 and the capacitor C5/C6
rectifies and filters the output voltage. The resistor
divider consisting of R5 and R6 programs the
output voltage.
The ACT366 integrates a primary inductor peak
current limit compensation circuit to achieve
constant input power over line and load ranges.
Protection
The ACT366 incorporates multiple protection
functions including over-voltage, over-current and
over-temperature.
Output Short Circuit Protection
When the secondary side output is short circuited,
the ACT366 enters hiccup mode operation. In this
condition, the VDD voltage drops below the VDDOFF
threshold and the auxiliary supply voltage
collapses. This turns off the ACT366 and causes it
to restart. This hiccup behavior continues until the
short circuit is removed.
The minimum and maximum DC input voltages can
be calculated:
Output Over Voltage Protection
1
The ACT366 includes output over-voltage
protection circuitry, which shuts down the IC when
the output voltage is 40% above the normal
regulation voltage for 4 consecutive switching
cycles. The ACT366 enters hiccup mode when an
output over voltage fault is detected.
2 POUT
(
- tC )
2 fL
η × C IN
2
VINDCMIN
=
2V ACMIN
-
1
2 × 12 (
- 4 .5 ms )
2 × 50
2
(3)
(4)
=
2 × 85
-
≈90 V
78 % × 15 × 10 μ F
Over Temperature Shutdown
The thermal shutdown circuitry detects the ACT366
Innovative PowerTM
V
= 2 ×VACMAX = 2 ×265 = 375V
INDCMAX
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
TYPICAL APPLICATION CONT’D
where η is the estimated circuit efficiency, fL is the
line frequency, tC is the estimated rectifier
conduction time, CIN is empirically selected to be
15µF + 10µF electrolytic capacitors based on the
2µF/W rule of thumb.
LP
0 .87 mH
(11)
N P
=
=
= 110
2
ALE
80 nH / T
The number of turns of secondary and auxiliary
windings can be derived when Np/Ns=7:
NS
NP
1
7
When the transistor is turned off, the voltage on the
transistor’s collector consists of the input voltage
and the reflected voltage from the transformer’s
secondary winding. There is a ringing on the rising
top edge of the flyback voltage due to the leakage
inductance of the transformer. This ringing is
clamped by a RCD network if it is used. Design this
clamped voltage as 50V below the breakdown of
the NPN transistor. The flyback voltage has to be
considered with selection of the maximum reverse
voltage rating of secondary rectifier diode. If a 100V
Schottky diode is used, then the flyback voltage can
be calculated:
(12)
NS
=
× NP
=
×110 ≈14
N
NA = A ×NS =1.1×14 =16
(13)
NS
The current sense resistance (RCS) determines the
current limit value based on the following equation:
0.9×V
0.9×0.396
CSLIM
R =
=
=0.5R
CS
(
)
(
)
IOUTFL+IOUTMAX×(VOUT+V )
1.0+1.2 ×12.3
DS
0.78
0.87×75×
0.89
η
system
(14)
L ×fSW
×
P
ηxfm
The voltage feedback resistors are selected
according to below equation:
V
INDCMAX×(VOUTCV +VDS ) 375×(12+0.5)
(5)
VRO
=
=
=68.9V
V
DREV -V
100×0.8 -12
OUTCV
NA
LP
16
0.87
0.5
where VDS is the Schottky diode forward voltage,
VDREV is the maximum reverse voltage rating of the
diode and VOUTCV is the output voltage.
(15)
(16)
RFB1
=
×
× K =
×
× 230000 ≈59k
NP RCS
110
In actual application 59K is selected.
The maximum duty cycle is set to be 50% at low
line voltage 85VAC and the circuit efficiency is
estimated to be 78%. Then the full load input
current is:
Where K is IC constant and K = 230000.
V FB
R FB
=
R FB 1
2
N
A
(VOUTCV + V DS
)
- V FB
N S
VOUTCV × IOUTPL
VINDCMIN × η
12 ×1
(6)
IIN
=
=
= 170 .9mA
2 .20
90 ×78%
=
× 59 K ≈11 k
(12 + 0 .45 ) × 1 .1 - 2 .20
The maximum input primary peak current at full
load base on duty of 50%:
When selecting the output capacitor, a low ESR
electrolytic capacitor is recommended to minimize
ripple from the current ripple. The approximate
equation for the output capacitance value is given by:
2 ×IIN 2 ×170.9
IPK
=
=
= 683mA
(7)
(8)
D
50%
The primary inductance of the transformer:
IOUTCC × D
1.2 × 0.5
(17)
VINDCMIN × D
IPK × fSW
90 × 50 %
COUT
=
=
= 200 μF
LP
=
=
≈0.87 mH
fSW ×△VRIPPLE
60kHz × 50mV
683 mA × 75 kHz
A 600µF electrolytic capacitor is used to keep the
ripple small.
ACT366 needs to work in DCM in all conditions,
thus NP/NS should meet
LP ×IPK
LP ×IPK
0.9 NP
+
<
⇒
> 8
PCB Layout Guideline
(9)
NP
NS
VINDCMIN
fSW
NS
(VOUTCV +VDS )×
Good PCB layout is critical to have optimal
performance. Decoupling capacitor (C4), current
sense resistor (R9) and feedback resistor (R5/R6)
should be placed close to VDD, CS and FB pins
respectively. There are two main power path loops.
One is formed by C1/C2, primary winding, NPN
transistor and the ACT366. The other is the
secondary winding, rectifier D8 and output
capacitors (C5,C6). Keep these loop areas as small
as possible. Connect high current ground returns,
The auxiliary to secondary turns ratio NA/NS:
NA
VDD +VDA +VR
13 + 0.25 +1
(10)
=
=
≈1.1
NS VOUTCV +VDS +VCORD 12 + 0.3 + 0.35
Where VDA is diode forward voltage of the auxiliary
side and VR is the resister voltage.
An EPC17 transformer gapped core with an
effective inductance ALE of 80nH/T2 is selected.
The number of turns of the primary winding is:
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
TYPICAL APPLICATION CONT’D
the input capacitor ground lead, and the ACT366 G
pin to a single point (star ground configuration).
VFB Sampling Waveforms
ACT366 senses the output voltage information
through the VFB waveforms. Proper VFB waveforms
are required for IC to operate in a stable status. To
avoid mis-sampling, 1.0µs blanking time is added to
blank the ringing period due to the leakage
inductance and the circuit parasitic capacitance.
Figure 2 is the recommended VFB waveform to
guarantee the correct sampling point so that the
output information can be sent back into the IC to
do the appropriate control.
Figure 2:
1.0µs
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
Figure 3:
Universal VAC Input, 12V/1A Output Adapter
Table 2:
ACT366 Bill of Materials
ITEM REFERENCE
DESCRIPTION
QTY
MANUFACTURER
1
2
2
3
4
5
6
7
C1
C2
C3
C4
C5
C6
C9
CY1
D1-D4
D5, D6
D8
L1
Q1
F1
R1
R2
R3
R4
R5
Capacitor, Electrolytic, 10µF/400V, 10×12mm
Capacitor, Electrolytic, 15µF/400V, 10×12mm
Capacitor, Ceramic,1000pF/500V,1206,SMD
Capacitor, Electrolytic, 10µF/35V,1206,SMD
Capacitor, Electrolytic, 470µF/16V, 8 ×12mm
Capacitor, Electrolytic, 470µF/16V, 8 ×12mm
Capacitor, Ceramic,1000pF/50V,0805,SMD
Safety Y1,Capacitor,1000pF/400V,Dip
Diode,Rectifier,1000V/1A,1N4007, DO-41
Diode, Ultra Fast, FR107, 1000V/1.0A,DO-41
Diode, Schottky, 100V/5A, SB5100, DO-210AD
Common choke mode, UU9.8,20mH, DIP
Transistor, NPN, 700V,1.5A, D13003,TO-220
Fuse:1A 250V 3.6*10mm With Pigtail, ceramic tube
Chip Resistor, 22Ω, 0805, 5%
Chip Resistor, 200k,1206, 5%
Chip Resistor, 390Ω,1206, 5%
Chip Resistor, 10Ω, 0805, 5%
Chip Resistor, 59k,0805, 1%
Chip Resistor,11k,0805, 1%
Chip Resistor, 10mΩ, 1206, 5%
Chip Resistor, 0.5Ω,1206, 1%
Chip Resistor, 330k,0805, 5%
1
1
1
1
1
1
1
1
4
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
1
1
1
KSC
KSC
POE
KSC
KSC
KSC
POE
UXT
8
9
Good-Ark
Good-Ark
Good-Ark
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
Huawei
walter
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
TY-OHM
R6
R7
R9
R10
R11
R12,R14
R13
T1
Chip Resistor, 5k, 0805, 5%
Chip Resistor, 2.2K, 0805, 5%
Chip Resistor, 10Ω, 0805, 5%
Transformer, LP = 0.9mH±7%, EPC17
IC, ACT366YH-T, SOP-8/EP
U1
Active-Semi
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
TYPICAL PERFORMANCE CHARACTERISTICS CONT’D
(Circuit of Figure 6, unless otherwise specified.)
Start Up Supply Current vs. Temperature
VDD ON/OFF Voltage vs. Temperature
20.5
18.5
16.5
14.5
12.5
10.5
8.5
28
26
24
22
20
18
16
14
VDDON
VDDOFF
6.5
4.5
0
25
50
75
0
25
50
75
Temperature (°C)
Temperature (°C)
Normalized ILIM vs. Temperature
FB Voltage vs. Temperature
2.25
2.20
2.15
2.10
2.05
2.00
1.02
1.01
1.00
0.99
0.98
0.97
0.96
0.95
0
25
50
75
0
25
50
75
Temperature (°C)
Temperature (°C)
Internal MOSFET RON vs. Temperature
2.4
2.0
1.6
1.2
0.8
0.4
0.0
0
25
50
75
Temperature (°C)
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Copyright © 2012 Active-Semi, Inc.
ACT366
Rev 1, 14-Nov-12
PACKAGE OUTLINE
SOP-8/EP PACKAGE OUTLINE AND DIMENSIONS
DIMENSION IN
MILLIMETERS
DIMENSION IN
INCHES
SYMBOL
MIN
1.350
0.000
1.350
0.330
0.190
4.700
3.202
3.800
5.800
2.313
MAX
1.700
0.100
1.550
0.510
0.250
5.100
3.402
4.000
6.300
2.513
MIN
0.053
0.000
0.053
0.013
0.007
0.185
0.126
0.150
0.228
0.091
MAX
0.067
0.004
0.061
0.020
0.010
0.201
0.134
0.157
0.248
0.099
A
A1
A2
B
C
D
D1
E
E1
E2
e
1.270 TYP
0.050 TYP
L
0.400
0°
1.270
8°
0.016
0°
0.050
8°
θ
Active-Semi, Inc. reserves the right to modify the circuitry or specifications without notice. Users should evaluate each
product to make sure that it is suitable for their applications. Active-Semi products are not intended or authorized for use
as critical components in life-support devices or systems. Active-Semi, Inc. does not assume any liability arising out of
the use of any product or circuit described in this datasheet, nor does it convey any patent license.
Active-Semi and its logo are trademarks of Active-Semi, Inc. For more information on this and other products, contact
sales@active-semi.com or visit http://www.active-semi.com.
is a registered trademark of Active-Semi.
Innovative PowerTM
- 11 -
www.active-semi.com
Copyright © 2012 Active-Semi, Inc.
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