PSA2800C [ZCOMM]

LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP; 低成本 - 高性能锁相环
PSA2800C
型号: PSA2800C
厂家: Z-COMMUNICATIONS, INC    Z-COMMUNICATIONS, INC
描述:

LOW COST - HIGH PERFORMANCE PHASE LOCKED LOOP
低成本 - 高性能锁相环

信号电路 锁相环或频率合成电路
文件: 总2页 (文件大小:74K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PSA2800C  
9939 Via Pasar • San Diego, CA 92126  
TEL (858) 621-2700 FAX (858) 621-2722  
PHASE LOCKED LOOP  
Rev A1  
PHASE NOISE (1 Hz BW, typical)  
-60  
-70  
-80  
-90  
-100  
-110  
-120  
-130  
-140  
FEATURES  
-
• Frequency Range: 2780  
2820  
MHz  
• Step Size:  
1000  
KHz  
- Style Package  
PLL-24H  
APPLICATIONS  
• Digital Radio Equipment  
• Fixed Wireless Access  
1000  
10000  
100000  
Satellite Communication Systems  
VALUE  
2780 - 2820  
-106  
UNITS  
MHz  
PERFORMANCE SPECIFICATIONS  
Frequency Range  
dBc/Hz  
dBc  
Phase Noise @ 10 kHz offset (1 Hz BW, typ.)  
Harmonic Suppression (2nd, typ.)  
Sideband Spurs (typ.)  
-15  
-70  
dBc  
Power Output  
0±2  
50  
dBm  
Load Impedance  
Step Size  
1000  
1250  
KHz  
Charge Pump Output Current  
Switching Speed (typ., adjacent channel)  
Startup Lock Time (typ.)  
µΑ  
mSec  
1
2
mSec  
°C  
-40 to 85  
Operating Temperature Range  
Package Style  
PLL-24H  
POWER SUPPLY REQUIREMENTS  
Supply Voltage (Vcc, nom.)  
5
Vdc  
mA  
Supply Current (Icc, typ.)  
40  
All specifications are typical unless otherwise noted and subject to change without notice.  
APPLICATION NOTES  
AN-107 : How to Solder Z-COMM VCOs / PLLs  
AN-200 : Mounting and Grounding of Z-COMM PLLs  
AN-201 : PLL Fundamentals  
AN-202 : PLL Functional Description  
NOTES:  
Reference Oscillator Signal: 5 MHz<fosc<100 MHz  
Frequency Synthesizer: Analog Devices - ADF4106  
Prescaler: 32  
© Z-Communications, Inc.  
All rights reserved  
Page 1  
LOW COST - HIGH PERFORMANCE  
PHASE LOCKED LOOP  
PSA2800C  
PAGE 2  
VCO TUNING CURVE, typ.  
2860  
2840  
2820  
2800  
2780  
2760  
2740  
2720  
2700  
°c  
-40  
°c  
°c  
25  
85  
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
TUNING VOLTAGE (Vdc)  
VCO POWER CURVE, typ.  
3
2
1
0
°c  
25  
-1  
-2  
-3  
2737  
2770  
2801  
2836  
FREQUENCY (MHz)  
PHYSICAL DIMENSIONS  
1.  
The inside radius of all 24 half holes at the perimeter of  
the board are plated to provide a surface for the  
attachment of the PLL Module to the PCB. 16 pads are  
for grounding, 8 pads are for signal interface.  
The surface of the shield is tin-plated and may be  
soldered to. The shield’s base metal is cold-rolled steel.  
The ground plane on the bottom side is ground and  
attaches to a ground track on the top side of the board  
as well as to the shield.  
SIDE VIEW  
-.025  
.000  
24 23  
22 21 20  
2.  
3.  
PIN 1  
.153  
.238  
.323  
.408  
.493  
.578  
.663  
1
2
19  
18  
17  
16  
15  
14  
13  
3
4
5
6
7
4.  
5.  
Unless otherwise noted all dimensions are in inches.  
Unless otherwise noted all tolerances are as follows:  
.xxx = ± .010.  
BOTTOM  
TOP  
SEE DETAIL A  
P1 RF OUTPUT  
P2-4 GROUND  
P5 REFERENCE OSCILLATOR INPUT  
.816  
.841  
12  
9
10 11  
8
P6 GROUND  
P7 CLOCK  
SEE DETAIL B  
P8 DATA  
P9 GROUND  
.055  
P10 LOAD ENABLE  
P11 GROUND  
P12 LOCK DETECT  
P13 VCC  
P14 GROUND  
P15 GROUND  
P16 GROUND  
P17 NO CONNECTION  
P18-24 GROUND  
.015  
.030  
DETAIL  
B
(TYP)  
TABS RANGE:  
SEE NOTE 5  
(4 PLACES)  
(8 PLACES)  
DETAIL A  
Page 2  
Printed in the U.S.A.  
© Z-Communications, Inc.  

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