KG/MPAS [ZARLINK]
2.7GHz 3-WIRE BUS CONTROLLED SYNTHESISER; 2.7GHz的3线总线控制合成器
| 型号： | KG/MPAS |
| 厂家： | 
ZARLINK SEMICONDUCTOR INC |
| 描述： | 2.7GHz 3-WIRE BUS CONTROLLED SYNTHESISER |
| 文件： | 总15页 (文件大小：342K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
This product is obsolete.
This information is available for your
convenience only.
For more information on
Zarlink’s obsolete products and
replacement product lists, please visit
http://products.zarlink.com/obsolete_products/
THIS DOCUMENT IS FOR MAINTENANCE
PURPOSES ONLY AND IS NOT
RECOMMENDED FOR NEW DESIGNS
FEBRUARY 1994
ADVANCE INFORMATION
D.S. 3931 1.5
SP5654
2.7GHz 3–WIRE BUS CONTROLLED SYNTHESISER
The SP5654 is a single chip frequency synthesiser
designed for satellite TV tuning systems. It is a programming
variant of the SP5655 allowing the design of one tuner with
either I2C bus or a 3–wire bus format depending on which
device is inserted. The device when used with a varicap tuner
,
forms a complete phase locked loop tuning system. The circuit
consists of a divide–by–16 prescaler with its own preamplifier
and a 14/15 bit programmable divider controlled by a serially
loaded data register. Four independently programmable open
collector outputs are included. The device contains five modes
of operation each compatible with Toshiba 18 and 19 bit
software.
The comparison frequencies are obtained from a crystal
controlled on–chip oscillator typically operating at 4MHz. The
comparator has a charge pump output amplifier stage around
which feedback may be applied. Only one external transistor
is required for varicap line driving.
CHARGE PUMP
CRYSTAL
MODE SELECT
DATA
1
16
DRIVE OUTPUT
V
EE
S
P
5
6
5
4
RF INPUT
RF INPUT
CLOCK
V
CC
PORT P3
LOCK
PORT P2
ENABLE
PORT P0
PORT P1
FEATURES
J Complete 2.7GHz Single Chip System
MP16
J
J
J
J
J
High Sensitivity RF Input
Low power Consumption (5V, 30mA)
On–Chip Oscillator with 1k
On chip oscillator start–up circuit
Programming Compatible with Toshiba TD6380,
TD6381 and TD6382#
Fig. 1 Pin connections – top view
W
negative resistance
APPLICATIONS
J Satellite TV
High IF Cable Tuning Systems
J
J
Pin compatible with SP5655#
J
5 Modes of Operation with different step sizes,
see Table 1; each selectable with 18 or 19 bit
transmission length.
Single Port 18/19 Bit Serial Data Entry
Auto select for Data transmission length, 18 or 19
Low Radiation
ORDERING INFORMATION
SP5654/KG/MPAS (Tubes)
J
J
J
J
SP5654/KG/MPAD (Tape and Reel)
Phase Lock Detector
J Varactor Drive Amp Disable
J
J
J
Charge Pump Disable
Four Controllable Outputs
ESD Protection
[
# See notes on pin and programming compatibility
[
Normal ESD handling procedures should be
observed.
SP5654
ELECTRICAL CHARACTERISTICS
Tamb= –20°C to )80°C, VCC=)4.5V to )5.5V. Reference frequency =4MHz. These characteristics are guaranteed by
either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless
otherwise stated.
Value
Characteristics
Supply current
Symbol
Pin
Units
Conditions
Min
Typ
Max
40
I
12
30
mA
Typical applies to V = 5V
CC
CC
Prescaler Input Voltage
13, 14
12.5
40
300
mV
300MHz to 2GHz sinewave.
rms
300
mV
120MHz & 2.7GHz See Fig.6.
rms
Prescaler Input Impedance
Input Capacitance
13, 14
50
2
W
pF
Data Clock and Enable
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Hysteresis
4, 5, 10
4, 5, 10
4, 5, 10
4, 5, 10
4, 5, 10
5
3
0
V
V
V
CC
1.5
10
V
V
=5.5V V =5.5V
mA
mA
V
IN
IN
CC
–10
=0V V =5.5V
CC
0.8
Clock Rate
500
kHz
Timing Information
Data Setup Time
t
4
300
600
300
600
300
ns
ns
ns
ns
ns
See Fig.4
See Fig. 4
See Fig. 4
See Fig. 4
See Fig. 4
SU
Data Hold Time
t
4
HD
Enable Setup time
Enable Hold Time
t
10
10
10
ES
EH
CE
t
t
Clock–to–Enable Time
Clock Low Period
t
5
5
600
600
ns
ns
See Fig. 4
See Fig. 4
LO
Clock High Period
t
HI
Mode Select
High Level Input Current
Low Level Input Current
Charge Pump Output Current
3
3
1
700
V
V
=5.5V V =5.5V
CC
mA
mA
mA
IN
IN
–700
=0V V =5.5V
CC
V pin 1 = 2.0V, device ‘out of
lock’
ꢀ150
ꢀ50
Charge Pump Output Current
1
1
V pin 1 = 2.0V, device ‘locked’
mA
Charge Pump Output
Leakage Current
nA
V pin 1 = 2.0V, charge pump
disabled
ꢀ5
Charge Pump Drive Output
Current
16
1
mA
V pin 16 = 0.7V
Charge Pump Amplifier Gain
6400
Pin 18 Current = 100mA
Oscillator Temperature
Stability
2
2
ppm/°C
ppm/V
W
Oscillator Stability with
Supply Voltage
Recommended Crystal
Series Resistance
10
200
‘‘Parallel resonant crystal.” Fig-
ure quoted is under all condi
-
tions including start up.
Crystal Oscillator Drive Level
2
2
80
mV p–p
Crystal Oscillator Negative
Resistance
750
Includes temperature and
process tolerances
W
Reference Crystal Frequency
2
2
4
2
8
MHz
MHz
External Reference input
Frequency
16
AC coupled sinewave
AC coupled sinewave
External Reference input
Amplitude
2
400
1000
mV
p–p
2
SP5654
ELECTRICAL CHARACTERISTICS (cont.)
Tamb C to )80°C, VCC=)4.5V to )5.5V. Reference frequency =4MHz. These characteristics are guaranteed by
=
–20°
either production test or design. They apply within the specified ambient temperature and supply voltage ranges unless
otherwise stated.
Value
Characteristics
Symbol
Pin
Units
Conditions
Min
Typ
Max
Ports and Lock output
Sink Current
6–9, 1
1
10
mA
mA
mA
mA
V
=0.7V
out
Lock Leakage Current
Port Leakage Current
11
10
10
V
=V
out CC
6–9
10
V
out
=13.2V
V
aractor Drive Amp Disable
Charge Pump Disable
est Mode Enable
–50
–50
–50
V
pin
10 < 0V. Current sourced
from device
V 4 < 0V. Current sourced
pin
from device
V 5 < 0V. Current sourced
pin
4
5
mA
mA
T
from device. See Table 2
ABSOLUTE MAXIMUM RATINGS
All voltages are referred to VEE=0V
Value
Parameter
Pin
Units
Conditions
Min
Max
Supply voltage
12
–0.3
7
2.5
V
Vp–p
V
Prescaler input voltage
Prescaler DC offset
Port voltage
13, 14
13, 14
6–9
–0.3
–0.3
–0.3
VCC+0.3
14
V
Port in off state
Port in on state
6
V
T
otal port output current
6–9
1, 16
2
50
mA
V
Loop amplifier DC offset
Crystal oscillator DC offset
3–wire bus inputs
–0.3
–0.3
–0.7
–0.3
–0.3
VCC+0.3
VCC+0.3
6
V
4, 5, 10
3
V
Mode select input
VCC+0.3
VCC+0.3
15
V
Lock output voltage
Lock output current
Storage temperature
Junction temperature
11
V
11
mA
°C
°C
°C/W
°C/W
mW
kV
–55
+150
+150
111
MP16 thermal resistance, chip–to–ambient
MP16 thermal resistance, chip–to–case
Power consumption
41
220
All ports of
f
ESD protection
All
4
MIL STD 883 TM 3015
3
SP5654
+j1
+j0.5
+j2
+j0.2
+j5
0
0.2
0.5
1
2
5
X
2.6GHz
X
X
X
X
–j5
–j0.2
–j2
–j0.5
FREQUENCY MARKER STEP = 500MHz
S
11
:Z = 50
W
–j1
0
NORMALISED
TO 50W
Fig. 2 Typical input impedance
12
REFERENCE
DIVIDER
VCC
PRE
AMP
13
FPD
FCOMP
2
1
RF
INPUTS
14
PRESCALER
14/15 BIT
PHASE
ꢀ512/640/1024
/1280/2048
OSC
CRYSTAL
PROGRAMMABLE
COMP
ꢀ16
DIVIDER
F
CHARGE
PUMP
5
DRIVE/
VARICAP
OUTPUT
CLOCK
DATA
CHARGE
18/19
AMP
PUMP
LATCH
16
4
DATA
DATA
CLOCK
INPUT
INTERFACE
10
ENABLE
MODE
CONTROL
OUTPUT
BUFFER
3
MODE
SELECT
SELECT
LOCK
DETECT
15
VEE
CP DIS
VA DIS
6
7
8
9
11
LOCK
P3 P2 P1 P0
Fig. 3 Block diagram
4
SP5654
FUNCTIONAL DESCRIPTION
The SP5654 contains all the elements necessary, with the
exception of reference crystal, loop filter and external high
voltage transistor, to control a voltage controlled local
oscillator, so forming a PLL frequency synthesised source.
The system is controlled by a microprocessor via a
standard data, clock and enable three–wire bus. The data load
consists of a single word, which contains the frequency and
port information, and is only transferred to the internal data
shift register during an enable high period. The clock is
disabled during low periods. New data words are only
accepted by the internal data buffers from the shift register on
a negative transition of the enable, so giving improved fine
tuning facility for digital AFC etc.
The charge pump current is initially set to ꢀ150mA. When
the device attains frequency lock, the charge pump current is
switched to ꢀ50mA, so improving the local oscillator short term
jitter.
The device also contains four general purpose open
collector output ports P0–P3. These outputs are each capable
of sinking a minimum of 10mA, when the appropriate bits
P0–P3 of the programming data, see Fig. 4 are set to a logic
‘1’.
PIN and PROGRAMMING COMPATIBILITY
The SP5654 may be used in SP5655 applications which
require 3–wire bus as opposed to I2C bus data format. In
SP5655 applications where the reference crystal is grounded
to pin 3, a small modification is required to ground the crystal
as shown in Fig. 5.
The device has 5 modes of operation, as defined in Table
1, and each of these modes can accept either 18–bit or 19–bit
data entry. The format of the data entry is shown in Fig. 4, and
consists of 4–bits for port switching, plus 14/15 bits to control
the 15–bit programmable divider. For 18–bit data entry (4+14),
the MSB of the 15–bit programmable divider is internally set to
logic ‘0’ effectively making the divider 14–bits. The device
recognises the data entry as 18–bit when a falling edge at the
enable input occurs during the 18th clock period. The device
associates falling enable edges during the 19th clock period
with 19–bit data entry. A falling edge at the enable input before
the 18th clock period constitutes invalid data entry to the
device.
The frequency is set by first selecting the required mode of
operation as detailed in Table 1, and then by loading the
programmable divider with the required 14/15–bit divisor
word. The output of this divider, FPD, is fed to the phase
comparator where it is compared in phase and frequency to
Appropriate connections must also be to the mode select
input (see Table 1). For each mode of operation, the SP5654
is programming and step size compatible with Toshiba
devices as shown in Table 3.
TEST FEATURES
Charge pump disable
The charge pump may be disabled by sourcing current
from the data input, i.e. by forcing a negative input voltage.
Varactor line disable
The charge pump amplifier drive output may be disabled by
sourcing current from the enable input, i.e. by forcing a
negative voltage.
the internally generated comparison frequency, F
The comparison frequency FCOMP is obtained by dividing
the output of the on–chip crystal controlled oscillator. The
crystal frequency generally used is 4MHz, giving an F
7.8125kHz in mode 4, which when multiplied back up to the LO
gives a minimum step size of 125kHz.
.
Device test mode
COMP
Further test modes can be invoked by sourcing current
from the clock input, i.e. by forcing a negative input voltage.
These test modes when invoked are determined by the data
held in the P1, P2 and P3 internal registers as detailed in Table
2.
of
COMP
The programmable divider is preceded by an input RF
preamplifier and high speed low radiation prescaler. The
preamplifier is arranged to be self oscillating, so giving
excellent input sensitivity
are shown in Fig. 2 and 6 respectively
. The input impedance and sensitivity
.
The device contains a lock detect circuit which generates
flag when the loop has attained lock. The ‘in lock’ condition
a
is indicated by a high impedance state.
‘MODE SELECT’
INPUT VOLTAGE
PROGRAMMABLE
DIVIDER BIT
LENGTH
REFERENCE
DIVIDER RATIO
*FREQUENCY
STEP SIZE
(kHz)
*MAXIMUM
OPERATING
FREQUENCY (GHz)
MODE
14 bit
2.0479
0.8191
1.0239
0.5119
1.6383
15 bit
2.7000
1.6383
2.0479
1.0239
2.7000
4
3
2
1
0
0.85 V – V
14/15
14/15
14/15
14/15
14/15
512
1280
1024
2048
640
125
50
CC
CC
0.65 V – 0.75V
CC
CC #
OPEN CIRCUIT
0.25 V 0.35V
62.5
31.25
100
[
CC
CC –
0
– 0.15 V
CC
*When used with a 4MHz crystal
# Selected by connecting a 15kW resistor to VCC
Selected by connecting a 15kW resistor to VEE
[
Table 1. Modes of operation
5
SP5654
T
est Mode
P1
0
P2
0
P3
0
Test Mode Description
0
1
2
3
4
Charge pump down 170mA
Charge pump up 170mA
Charge pump down 50mA
Charge pump up 50mA
0
0
1
1
0
0
1
0
1
d
1
0
FCOMP to P2; F /2 to P3;
PD
Lock output switched to out of lock
condition
5
d
1
1
Lock output switched to inlock condition
These test modes are invoked by taking the clock input below V
d=don‘t care
EE
Table 2 Test mode options
MODE
COMPATIBILITY
18 Bit Data entry
19 Bit Data entry
4
3
2
1
0
TD6380 plus
ꢀ
2 prescaler
TD6382 plus
ꢀ4 prescaler
None
TD6381
TD6380
None
TD6382 plus
ꢀ2 prescaler
TD6382
None
TD6381 plus
ꢀ2 prescaler
Table 3. Programming compatibilities
CLOCK
ENABLE
18–BIT
17
16
15
14
13
12
2
1
0
2
DATA ENTR
Y
MSB
MSB
2
2
2
2
2
2
2
2
LSB
LSB
P0 P1 P2 P3
MSB IS TRANSMITTED
FIRST
FREQUENCY DATA
19–BIT
18
17
16
15
14
13
2
1
0
2
DATA ENTR
Y
2
2
2
2
2
2
2
2
P0 P1 P2 P3
FREQUENCY DATA
tHi
tCE tES
tLO
tEH
3V
1.5V
CLOCK
t
t
t
t
t
=Enable set up time
=Data set up time
=Data hold time
=Clock–to–enable time
=Enable hold time
=Clock low period
ES
SU
HD
CE
EH
3V
1.5V
ENABLE
DATA
t
LO
Hi
t
=Clock high period
3V
1.5V
tSU
tHD
Fig. 4 Data format and timing
6
SP5654
+5V
+30V
22k
+12V
47n
22k
180n
10k
47k
VARICAP
INPUT
2N3904
4MHz
CRYSTAL
1
16
10n
2
15
14
13
12
11
10
9
1n
1n
OSCILLATOR
OUTPUT
18p
S
3
4
5
6
7
8
P
5
6
5
4
SATELLITE
TUNER
P3
CONTROL
MICRO
P0
P1
P2
TUNER
SWITCHING
FUNCTIONS
Fig. 5 Typical application (step size = 100kHz)
300
100
VIN (mV RMS
INTO 50W)
OPERATING
WINDOW
50
40
25
12.5
120 300
1000
2000
2700 3000 3500
FREQUENCY (MHz)
Fig. 6 Typical input sensitivity
7
SP5654
v
vCC
REF
400
400
CHARGE
PUMP
RF INPUTS
170
DRIVE
OUTPUT
VADIS
(o/p disable)
RF inputs
Loop amplifier
vCC
VCC
67k
20k
I/P
I/P
3k
3k
20k
Mode select input
Data, Clock, Enable inputs
VCC
VCC
OUTPUT
CRYSTAL
Reference oscillator
Output ports P0–P3 and lock output
Fig. 7. Input/Output interface circuits
8
SP5654
9
SP5654
10
SP5654
11
SP5654
PACKAGE DETAILS
Dimensions are shown thus: mm (in). For further package information please contact your local Customer Service Centre.
9.80/.01
(0.386/0.394)
0.18/0.25
(0.007/0.010)
16
0.25/0.51
(0.010/0.020)
SPOT REF
5.80/6.20
(0.228/0.244)
3.80/4.00
(0.150/0.157)
O
345
CHAMFER
REF
PIN 1
O
0–8
0.35/0.49
(0.014/0.0019)
0.41/1.27
(0.016/0.050)
NOTES
1. Controlling dimensions are inches.
2. This package outline diagram is for guidance
only. Please contact your GPS Customer
Service Center for further information.
0.69 (0.027)
MAX
0.10/0.25
(0.004/0.010)
1.35/1.91
(0.053/0.075)
16 LEADS AT
1.27 (0.050)
NOM SPACING
MINIATURE PLASTIC DIL – MP16
CUSTOMER SERVICE CENTRES
HEADQUARTERS OPERATIONS
F FRANCE & BENELUX Les Ulis Cedex Tel: (1) 64 46 23 45
Fax: (1) 64 46 06 07
GEC PLESSEY SEMICONDUCTORS
Cheney Manor, Swindon,
F GERMANY Munich Tel: (089) 3609 06 0 Fax: (089) 3609 06 55
Wiltshire United Kingdom SN2 2QW
.
F ITALY Milan Tel: (02) 66040867 Fax: (02) 66040993
F JAPAN Tokyo Tel: (03) 5276–5501 Fax: (03) 5276–5510
T
el: (01793) 518000
Fax: (01793) 51841
1
F
NORTH AMERICA Scotts Valley, USA
el: (408) 438 2900 Fax: (408) 438 7023
T
F
F
SOUTH EAST ASIA Singapore Tel: (65) 3827708 Fax: (65) 3828872
SWEDEN Stockholm Tel: 46 8 7029770 Fax: 46 8 6404736
GEC PLESSEY SEMICONDUCTORS
.O. Box 660017 1500 Green Hills Road,
F TAIWAN, ROC Taipei Tel: 886 2 5461260 Fax: 886 2 7190260
F
P
UK, EIRE, DENMARK, FINLAND & NORWAY
Swindon Tel: (01793) 518510 Fax: (01793) 518582
Scotts Valley, California 95067–0017,
United States of America. Tel: (408) 438 2900
Fax: (408) 438 5576
These are supported by Agents and Distributors in major countries world–wide.
E
GEC Plessey Semiconductors 1995 Publication No. D.S. 3931 Issue No. 1.5 February 1995
TECHNICAL DOCUMENT TION – NOT FOR RESALE. PRINTED IN UNITED KINGDOM
A
This publication is issued to provide information only, which (unless agreed by the Company in writing) may not be used, applied or reproduced for any purpose nor form part of any
order or contract nor to be regarded as a representation relating to the products or services concerned. No warranty or guarantee express or implied is made regarding the capability
performance or suitability of any product or service. The Company reserves the right to alter without proir knowledge the specification, design, or price of any product or service.
Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of
equipment. It is the user’s responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up
to date and has not been superseded. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All
products and materials are sold and services provided subject to the Company’s conditions of sale, which are available on request.
,
12
For more information about all Zarlink products
visit our Web Site at
www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively “Zarlink”) is believed to be reliable.
However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such
information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or
use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual
property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in
certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink.
This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part
of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other
information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the
capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute
any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user’s responsibility to fully determine the performance and
suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does
not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in
significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink’s conditions of sale which are available on request.
Purchase of Zarlink’s I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system
conforms to the I2C Standard Specification as defined by Philips.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright Zarlink Semiconductor Inc. All Rights Reserved.
TECHNICAL DOCUMENTATION - NOT FOR RESALE
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VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
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