30D-12S12RNL [YUANDEAN]
DC-DC Converter;
| 型号： | 30D-12S12RNL |
| 厂家： | 
Yuan Dean |
| 描述： | DC-DC Converter |
| 文件： | 总3页 (文件大小：356K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
YUAN DEAN SCIENTIFIC CO.,LTD
30D SERIES
YUAN DEAN SCIENTIFIC
FEATURES：
ò
ò
ò
ò
ò
ò
ò
ò
12PIN SIP Package
High Efficiency up to 85%
Unregulated & Regulated Output Types
Low Ripple & Noise
Internal SMD Construction
Industry Standard Pinout
Operating Temperature:-40℃ TO +85℃
No External Component Required
Specifications typical at TA=25°C, nominal input voltage and
rated output current unless otherwise specified
DC-DC Converter
Output
Current
Output
Voltage
Recognized
By
UL 60950-1
Efficiency
Part Number
30D SERIES
Vdc
5
mA
360
360
±180
200
200
±100
150
150
±75
±75
120
120
±60
±60
75
%Typ
58
70
70
60
70
70
60
75
60
75
60
75
60
75
60
80
60
80
30D-XXS05RNL
30D-XXS05NNL
30D-XXD05NNL
30D-XXS09RNL
30D-XXS09NNL
30D-XXD09NNL
30D-XXS12RNL
30D-XXS12NNL
30D-XXD12RNL
30D-XXD12NNL
30D-XXS15RNL
30D-XXS15NNL
30D-XXD15RNL
30D-XXD15NNL
30D-XXS24RNL
30D-XXS24NNL
30D-XXD24RNL
30D-XXD24NNL
1.8Watt
0.5KV Isolated
5
±5
9
9
Single & Dual Output
SIP12
30D-05S05NNL
30D-05S05RNL
30D-05S24RNL
30D-12S24NNL
30D-15S15NNL
30D-24S05NNL
30D-24S05RNL
±9
12
12
±12
±12
15
15
±15
±15
24
24
75
±24
±24
±38
±38
Temperature Derating Graph
Note:
1.”XX” Is Input Voltage :05=5Vdc,09=9Vdc,12=12Vdc,15=15Vdc,24=24Vdc.
2.The input voltage increases, there will be an increase in efficiency.
100
75
60
50
Input Specifications
Parameters
Voltage Tolerance
Filter
Conditions
Vo,Io Nom
Capacitor
Min
Typ
Max
Units
25
Nature Convection
±10
%
0
-40
70 85
100
Ambient Temperature(
℃)
Rev:2 2018/10/08
YUAN DEAN SCIENTIFIC CO.,LTD
30D SERIES
Output Specifications
Tolerance Envelope Graph
Parameters
Conditions
Min
Typ
Max
Units
UNREGULATED
Voltage Tolerance
100% full load
±5
%
120%
Short Circuit
Protection
Regulated
(Continuous)
110%
100%
90%
Short Circuit
Protection
Unregulated
(Short Trem)
1
Sec
80%
Line Regulation
Load Regulation
Ripple & Noise
Regulated
Regulated
±0.3
±0.5
50
%
%
70%
Output Current(%)
BW=DC To 20MHz
mVp-p
Unregulated
Line Regulation
Load Regulation
1.2
%
%
(For 1% of Vin)
Part Number
Unregulated
10
(20% To 100% F.L)
30D - 05 S 05 R NL
C D E F
Transient response
setting time
50% load step
change
350
us
A
B
A:Series
B:Input Voltage
C:Single(S)Dual(D)
D:Output Voltage
General Specifications
Parameters
Conditions
Min
Typ
Max Units
E:Regulated(R)Unregulated(N)
F:RoHS Version
Isolation
Resistance
500Vdc
1000
MΩ
Switching
Frequency
Full load,
100
KHz
nominal input
Recommended Test Circuit
Operating
Temperature
-40
+85
95
℃
%
Humidity
Cooling
Non Condensing
Free air Convection
DAP
Vin
+Vout
Single
Cin
Cout
Case material
GND
-Vout
MIL-HDBK-217F@25℃
(Unregulated)
5V :Cout 4.7uF,25V
9V :Cout 2.2uF,25V
12V:Cout 1uF,25V
15V:Cout 0.47uF,50V
24V:Cout 0.47uF,50V
5V :Cin 4.7uF,25V
9V :Cin 4.7uF,25V
12V:Cin 2.2uF,25V
15V:Cin 2.2uF,25V
24V:Cin 1uF,50V
2500000
1500000
Hours
Hours
MTBF
MTBF
MIL-HDBK-217F@25℃
(Regulated)
Weight
8.3
32.2X9.0X15.2
g
+Vout
Dimensions
mm
Vin
Cout
Cout
Com
Dual
Cin
Packaging
GND
5V :Cout 4.7uF,25V
9V :Cout 2.2uF,25V
12V:Cout 1uF,25V
15V:Cout 0.47uF,50V
24V:Cout 0.47uF,50V
5V :Cin 4.7uF,25V
9V :Cin 4.7uF,25V
12V:Cin 2.2uF,25V
15V:Cin 2.2uF,25V
24V:Cin 1uF,50V
-Vout
Size(mm)
A
B
C
D
12.0
28.55
550
6.00
Rev:2 2018/10/08
YUAN DEAN SCIENTIFIC CO.,LTD
30D SERIES
Application Note
L
L
L
+Vo
0V
Vin
C
C
C
DC DC
GND
Filtering
-Vo
In some circuits which are sensitive to noise and ripple, a filtering capacitor
may be added to the DC/DC output end and input end to reduce the noise and
ripple. However, the capacitance of the output filter capacitor must proper. If
the capacitance is too big, a startup problem might arise. For every channel of
output, providing the safe and reliable operation is ensured, the greatest
capacitance of its filter capacitor refer to the external capacitor table. To get an
extreme low ripple, an "LC" filtering network may be connected to the input and
output ends of the DC/DC converter, which may produce a more significant
filtering effect. It should also be noted that the inductance and the frequency of
the "LC" filtering network should be staggered with the DC/DC frequency to
avoid mutual interference (see figure 1).
<Figure 1>
External Capacitor Table
External
External
capacitor
Vin
Vout
capacitor
5VDC
9VDC
4.7uF/25V
4.7uF/25V
5VDC
9VDC
4.7uF/25V
2.2uF/25V
1uF/25V
12VDC 2.2uF/25V 12VDC
15VDC 2.2uF/25V 15VDC 0.47uF/50V
24VDC
1uF/50V
24VDC 0.47uF/50V
Markings and dimensions
PIN#12
1
2
3
9
10 11
12
0.25±0.05
0.5±0.05
27.94
2.54
2.00
4.00
9.00
32.20
Unit：mm Unless otherwise specified, all tolerances are ±0.25
PIN Connection
PIN
Single
Dual
1
2
3
9
10
11
12
+Vin
+Vin
NC
NC
NC
NC
-Vout
COM
+Vout
+Vout
-Vin
-Vin
-Vout
COM
Rev:2 2018/10/08
相关型号：
©2020 ICPDF网 联系我们和版权申明