X24001PM [XICOR]
Identi⑩PROM; Identi⑩PROM
| 型号： | X24001PM |
| 厂家： | 
XICOR INC. |
| 描述： | Identi⑩PROM |
| 文件： | 总13页 (文件大小：49K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
128 Bit
X24001
16 x 8 Bit
Identi™PROM
FEATURES
DESCRIPTION
2
• 2.7V to 5.5V Power Supply
The X24001 is a CMOS 128 bit serial E PROM, inter-
nally organized as 16 x 8. The X24001 features a serial
interface and software protocol allowing operation on a
simple two wire bus.
2
• 128 Bit Serial E PROM
• Low Power CMOS
—Active Current Less Than 1mA
—Standby Current Less Than 50µA
• Internally Organized 16 x 8
• 2 Wire Serial Interface
The X24001 is ideally suited for identification applica-
tionssuchasserialnumbersordevicerevisionnumbers
which need to be stored and retrieved electronically.
• High Voltage Programmable Only
—V
, 12V to 15V
PGM
V
is used to enable writes to the device. This
PGM
• Push/Pull Output
• High Reliability
—Data Retention: 100 Years
• Available Packages
—8-Lead MSOP
provides full protection of the data in the user’s environ-
ment where V
is not available.
PGM
2
Xicor E PROMs are designed and tested for applica-
tions requiring extended endurance. Inherent data re-
tention is greater than 100 years.
—8-Lead PDIP
—8-Lead SOIC
The X24001 is fabricated with Xicor’s Advanced CMOS
Floating Gate technology.
PIN CONFIGURATION
FUNCTIONAL DIAGRAM
CONTROL
SCL
COMMAND/ADDRESS
REGISTER
MSOP/DIP/SOIC
LOGIC
1
2
3
4
8
7
6
5
V
NC
NC
CC
NC
X24001
NC
SCL
SDA
INPUT/
OUTPUT
BUFFER
SHIFT REGISTER
SDA
V
SS
3830 FHD F02.1
MEMORY ARRAY
3830 FHD F01
IDENTI™ PROM is a trademark of Xicor, Inc.
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3830-1.5 6/10/96 T2/C1/D0 NS
Characteristics subject to change without notice
1
X24001
PIN DESCRIPTIONS
Serial Clock (SCL)
Clock and Data Conventions
DatastatesontheSDAlinecanchangeonlyduringSCL
LOW. SDA state changes during SCL HIGH are re-
served for indicating start and stop conditions. Refer to
Figures 1 and 2.
The SCL input is used to clock all data into and out of the
device.
Serial Data (SDA)
Start Condition
SDA is a bidirectional pin used to transfer data into and
out of the device. It is a push/pull output and does not
requiretheuseofapull-upresistor. Duringtheprogram-
ming operation, SDA is an input.
All commands are preceded by the start condition,
which is a HIGH to LOW transition of SDA when SCL is
HIGH. The X24001 continuously monitors the SDA and
SCL lines for the start condition and will not respond to
any command until this condition has been met.
PIN NAMES
A start may be issued to terminate the input of a control
word or the input of data to be written. This will reset the
device and leave it ready to begin a new read or write
command. Because of the push/pull output, a start
cannot be generated while the part is outputting data.
Starts are also inhibited while a write is in progress.
Symbol
Description
No Connect
Ground
NC
V
SS
V
CC
Supply Voltage
Serial Data
Serial Clock
SDA
SCL
Stop Condition
3830 PGM T01
The stop condition is a LOW to HIGH transition of SDA
when SCL is HIGH. The stop condition is used to reset
the device during a command or data input sequence
and will leave the device in the standby mode. As with
starts, stops are inhibited when outputting data and
while a write is in progress.
DEVICE OPERATION
The X24001 supports a bidirectional bus oriented proto-
col. The protocol defines any device that sends data
ontothebusasatransmitterandthereceivingdeviceas
the receiver. The device controlling the transfer is a
master and the device being controlled is the slave. The
master will always initiate data transfers and provide the
clock for both transmit and receive operations. There-
fore, the X24001 will be considered a slave in all appli-
cations.
2
X24001
Figure 1. Data Validity
SCL
SDA
DATA STABLE
DATA
CHANGE
3830 FHD F03
Figure 2. Definition of Start and Stop Conditions
SCL
SDA
START CONDITION
STOP CONDITION
3830 FHD F04
3
X24001
Programming Operation
Factory Programming Service
Programming of the X24001 is performed one byte at a
time. Aftereachbyteiswritten, adelayequaltothewrite
cycle time of 5ms must be observed before initiating the
next write cycle.
TheX24001canbeprogrammedwithcustomerspecific
data prior to shipment. The data programmed can be in
two forms: static data pattern where there is no change
in the data in a group of devices or sequential data, such
as a base number incremented by one for each device
tested and shipped.
The sequence of operations is: first raise the SCL pin to
V
PGM
and generate a HIGH to LOW transition of SDA
(programming mode start). This is followed by eight bits
of data containing the program command bits, four
address bits and two don’t care bits, immediately fol-
lowed by the 8-bit data byte.
Customers requiring one of these services should con-
tact their local sales office for ordering procedures and
service charges.
The timing of the operation conforms to the standard
A.C. timing requirements and follows the sequence
shown below. After generating the Programming Mode
start condition the SCL HIGH level can be either V
IH
or V
.
PGM
Figure 3. Programming Sequence
V
PGM
SCL
V
IH
S
T
A
R
T
SDA
0
1
A3 A2 A1 A0 XX XX D7 D6 D5 D4 D3 D2 D1 D0
3830 FHD F05.1
4
X24001
Read Operation
and the X24001 will enter the standby mode. As with a
write, the read operation can be interrupted by a start or
stop condition while the command or address is being
clocked in. While clocking data out, starts or stops
cannot be generated.
Thebytereadoperationisinitiatedwithastartcondition.
Thestartconditionisfollowedbyaneight-bitcontrolbyte
which consists of a two-bit read command (1,0), four
address bits, and two “don’t care” bits. After receipt of
the control byte, the X24001 will enter the read mode
and transfer data into the shift register from the array.
This data is shifted out of the device on the next eight
SCL clocks. At the end of the read, all counters are reset
During the second don’t care clock cycle, starts and
stops are ignored. The master must free the bus prior to
the end of this clock cycle to allow the X24001 to begin
outputting data (Figures 4 and 5).
Figure 4. Read Sequence
1
0
A3 A2 A1 A0 XX XX D7 D6 D5 D4 D3 D2 D1 D0
START
3830 FHD F06
Figure 5. Read Cycle Timing
6
7
8
1
SCK
SDA IN
A0
XX
XX
SDA OUT
D7
D6
3830 FHD F07
SYMBOL TABLE
WAVEFORM
INPUTS
OUTPUTS
Must be
steady
Will be
steady
May change
from LOW
to HIGH
Will change
from LOW
to HIGH
May change
from HIGH
to LOW
Will change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
Changing:
State Not
Known
N/A
Center Line
is High
Impedance
5
X24001
ABSOLUTE MAXIMUM RATINGS*
Temperature under Bias
X24001 ...................................... –65°C to +135°C
Storage Temperature ....................... –65°C to +150°C
Voltage on any Pin with
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and the functional operation of
the device at these or any other conditions above those
indicatedintheoperationalsectionsofthisspecificationis
not implied. Exposure to absolute maximum rating condi-
tions for extended periods may affect device reliability.
Respect to V ............................................ –1V to +7V
SS
Voltage on SCL with
Respect to V .......................................... –1V to +17V
SS
D.C. Output Current ............................................. 5mA
Lead Temperature
(Soldering, 10 seconds).............................. 300°C
RECOMMENDED OPERATING CONDITIONS
Temperature
Min.
Max.
Supply Voltage
Limits
Commercial
Industrial
Military
0°C
+70°C
+85°C
+125°C
X24001
X24001-3
X24001-2.7
5V ±10%
3V to 5.5V
2.7V to 5.5V
–40°C
–55°C
3830 PGM T02.1
3830 PGM T03.1
D.C. OPERATING CHARACTERISTICS (Over recommended operating conditions unless otherwise specified.)
Limits
Symbol
Parameter
Min.
Max.
Units
Test Conditions
SCL = V x 0.1/V x 0.9 Levels
l
V
CC
V
CC
V
CC
Supply Current Read
1
mA
CC1
CC
CC
@ 1MHz, SDA = Open
I
I
Standby Current
Standby Current
100
50
µA
µA
SCL = SDA = V
SB1
SB2
CC
CC
V
= 5V ±10%
CC
SCL = SDA = V
V
V
V
= 3V
CC
I
I
Input Leakage Current
Output Leakage Current
Input LOW Voltage
10
10
µA
µA
V
= V to V
SS CC
LI
IN
= V to V
CC
LO
OUT
SS
(1)
V
V
V
V
V
–1.0
V
x 0.3
lL
CC
CC
(1)
Input HIGH Voltage
V
V
x 0.7
V
+ 0.5
V
IH
CC
Output LOW Voltage
Output HIGH Voltage
Program Enable Voltage
0.4
V
I
I
= 2.1mA
OL
OL
– 0.8
V
= 1mA
OH
PGM
CC
OH
12
15
V
3830 PGM T04.3
CAPACITANCE T = +25°C, f = 1MHz, V = 5V
A
CC
Symbol
Parameter
Max.
Units
Test Conditions
(2)
C
C
Input/Output Capacitance (SDA)
Input Capacitance (SCL)
8
6
pF
pF
V
V
= 0V
= 0V
I/O
I/O
(2)
IN
IN
3830 PGM T05.1
Notes: (1) V min. and V max. are for reference only and are not tested.
IL
IH
(2) This parameter is periodically sampled and not 100% tested.
6
X24001
POWER-UP TIMING
Symbol
Parameter
Max.
Units
(3)
t
t
Power-up to Read Operation
Power-up to Write Operation
2
5
ms
ms
PUR
(3)
PUW
3830 PGM T06
A.C. CONDITIONS OF TEST
EQUIVALENT A.C. LOAD CIRCUIT
Input Pulse Levels
V
x 0.1 to V x 0.9
CC
CC
5V
Input Rise and
Fall Times
10ns
2.16KΩ
Input and Output
Timing Levels
V
CC
x 0.5
OUTPUT
3830 PGM T07.1
3.07KΩ
100pF
3830 FHD F08.2
A.C. CHARACTERISTICS (Over the recommended operating conditions unless otherwise specified.)
Read & Write Cycle Limits
Symbol
Parameter
Min.
Max.
Units
f
t
t
SCL Clock Frequency
0
1
MHz
ns
SCL
SCL LOW to SDA Data Out Valid
350
AA
Time the Bus Must Be Free Before a
New Transmission Can Start
500
ns
BUF
t
t
t
t
t
t
t
t
t
t
Start Condition Hold Time
Clock LOW Period
250
500
500
250
0
ns
ns
ns
ns
µs
ns
µs
ns
ns
HD:STA
LOW
Clock HIGH Period
HIGH
SU:STA
HD:DAT
SU:DAT
R
Start Condition Setup Time
Data In Hold Time
Data in Setup Time
250
SDA and SCL Rise Time
SDA and SCL Fall Time
Stop Condition Setup Time
Data Out Hold Time
1
300
F
250
50
SU:STO
DH
ns
3830 PGM T08.1
7
X24001
Bus Timing
t
t
t
t
HIGH
LOW
R
F
SCL
t
t
t
t
t
SU:STA
HD:STA
HD:DAT
SU:DAT
SU:STO
SDA IN
t
t
t
AA
DH
BUF
SDA OUT
3830 FHD F09
WRITE CYCLE LIMITS
Symbol
Parameter
Min.
Max.
Units
ms
(4)
t
Write Cycle Time
5
WR
3830 PGM T09
Write Cycle Timing
SCL
SDA
D0
t
WR
START
CONDTION
X24001
ADDRESS
3830 ILL F10.1
Note: (3) t
and t
are the delays required from the time V is stable until the specified operation can be initiated. These parameters
PUW CC
PUR
are periodically sampled and not 100% tested.
(4) The write cycle time is the time from the initiation of a write sequence to the end of the internal erase/program cycle. During the
write cycle, the X24001 bus interface circuits are disabled, SDA is high impedance, and the device does not respond to start
conditions.
8
X24001
PACKAGING INFORMATION
8-LEAD MINIATURE SMALL OUTLINE GULL WING PACKAGE TYPE M
0.118 ± 0.002
(3.00 ± 0.05)
0.012 + 0.006 / -0.002
(0.30 + 0.15 / -0.05)
0.0256 (0.65) TYP
R 0.014 (0.36)
0.118 ± 0.002
(3.00 ± 0.05)
0.030 (0.76)
0.0216 (0.55)
7° TYP
0.036 (0.91)
0.032 (0.81)
0.040 ± 0.002
(1.02 ± 0.05)
0.008 (0.20)
0.004 (0.10)
0.150 (3.81)
0.007 (0.18)
0.005 (0.13)
REF.
0.193 (4.90)
REF.
NOTE:
1. ALL DIMENSIONS IN INCHES AND (MILLIMETERS)
3926 ILL F49
9
X24001
PACKAGING INFORMATION
8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P
0.430 (10.92)
0.360 (9.14)
0.260 (6.60)
0.240 (6.10)
PIN 1 INDEX
PIN 1
0.060 (1.52)
0.020 (0.51)
0.300
(7.62) REF.
HALF SHOULDER WIDTH ON
ALL END PINS OPTIONAL
0.145 (3.68)
0.128 (3.25)
SEATING
PLANE
0.025 (0.64)
0.015 (0.38)
0.150 (3.81)
0.125 (3.18)
0.065 (1.65)
0.045 (1.14)
0.110 (2.79)
0.090 (2.29)
0.020 (0.51)
0.016 (0.41)
0.325 (8.25)
0.300 (7.62)
0.015 (0.38)
MAX.
0°
15°
TYP. 0.010 (0.25)
NOTE:
1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH
10
X24001
PACKAGING INFORMATION
8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S
0.150 (3.80)
0.158 (4.00)
0.228 (5.80)
0.244 (6.20)
PIN 1 INDEX
PIN 1
0.014 (0.35)
0.019 (0.49)
0.188 (4.78)
0.197 (5.00)
(4X) 7°
0.053 (1.35)
0.069 (1.75)
0.004 (0.19)
0.010 (0.25)
0.050 (1.27)
0.010 (0.25)
0.050" TYPICAL
X 45°
0.020 (0.50)
0.050"
TYPICAL
0° – 8°
0.0075 (0.19)
0.010 (0.25)
0.250"
0.016 (0.410)
0.037 (0.937)
0.030"
TYPICAL
8 PLACES
FOOTPRINT
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
3926 FHD F22.1
11
X24001
ORDERING INFORMATION
X24001
X
X
-X
V
CC
Range
Device
Blank = 5V ±10%
3 = 3V to 5.5V
2.7 = 2.7V to 5.5V
Temperature Range
Blank = 0°C to +70°C
I = –40°C to +85°C
M = –55°C to +125°C
Package
M = 8-Lead MSOP
P = 8-Lead Plastic DIP
S = 8-Lead SOIC
Part Mark Convention
Blank = 8-Lead SOIC
P = 8-Lead Plastic DIP
X24001
X
X
Blank = 5V ±10%, 0°C to +70°C
I = 5V ±10%, –40°C to +85°C
M = 5V ±10%, –55°C to +85°C
D = 3V to 5.5V, 0°C to +70°C
E = 3V to 5.5V, –40°C to +85°C
F = 2.7V to 5.5V, 0°C to +70°C
G = 2.7V to 5.5V, –40°C to +85°C
LIMITED WARRANTY
Devices sold by Xicor, Inc. are covered by the warranty and patent indemnification provisions appearing in its Terms of Sale only. Xicor, Inc. makes
no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described
devices from patent infringement. Xicor, Inc. makes no warranty of merchantability or fitness tor any purpose. Xicor, Inc. reserves the right to
discontinue production and change specifications and prices at any time and without notice.
Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents,
licenses are implied.
US. PATENTS
Xicor products are covered by one or more of the following U.S. Patents: 4,263,664; 4,274,012; 4,300,212; 4,314,265; 4,326,134; 4,393,481;
4,404,475;4,450,402;4,486,769;4,488,060;4,520,461;4,533,846;4,599,706;4,617,652;4,668,932;4,752,912;4,829,482;4,874,967;4,883,976.
Foreign patents and additional patents pending.
LIFE RELATED POLICY
In situations where semiconductor component failure may endanger life, system designers using this product should design the system with
appropriate error detection and correction, redundancy and back-up features to prevent such an occurrence.
Xicor’s products are not authorized for use as critical components in life support devices or systems.
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life,
and whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected
to result in a significant injury to the user.
2. Acriticalcomponentisanycomponentofalifesupportdeviceorsystemwhosefailuretoperformcanbereasonablyexpectedtocausethefailure
of the life support device or system, or to affect its satety or effectiveness.
12
X24001
X24001 PROGRAMMING ORDER INFORMATION
Customer Name: ......................................................
Address: ...................................................................
..............................................................................
..............................................................................
Complete Device Part Number: .................................
AUTHORIZATION
Programming Information Supplied By
Print or Type Clearly Full Name
Title
Static Pattern
Fill in matrix A below
Incrementing Pattern
Indicate in Matix A any static pattern and
indicate in Matrix B beginning sequence value
to be incremented.
Signature
Date
Totally Random Pattern
Matrix A
Matrix B
Data Pattern MSB First
Address
Data Pattern MSB First
Address
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
13
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