W91820LN [WINBOND]
13-MEMORY TONE/PULSE DIALER WITH HANDFREE, LOCK AND HOLD FUNCTIONS; 13 -MEMORY TONE /带免提,锁定和保持功能脉冲拨号器型号: | W91820LN |
厂家: | WINBOND |
描述: | 13-MEMORY TONE/PULSE DIALER WITH HANDFREE, LOCK AND HOLD FUNCTIONS |
文件: | 总22页 (文件大小:256K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
W91820N SERIES
13-MEMORY TONE/PULSE DIALER WITH
HANDFREE, LOCK AND HOLD FUNCTIONS
GENERAL DESCRIPTION
The W91820N is a series of tone/pulse switchable telephone dialers with 13 memory, keytone, hold,
lock, and handfree dialing control features. These chips are fabricated using Winbond's high-
performance CMOS technology and thus offer good performance in low-voltage, low-power
operations.
FEATURES
· Tone/pulse switchable dialer
· Two by 32 digits redial and save memory
· Three by 32 digits one-touch direct repertory memory
· Ten by 32 digits two-touch indirect repertory memory
· Pulse-to-tone (*/T) keypad for long distance call operation
· Chain dialing
· Uses 5 ´ 5 keyboard
· Easy operation with redial, flash, pause, and */T keypads
· Pause, P® T (pulse-to-tone) can be stored as a digit in memory
· Dialing rate:10 ppS or 20 ppS by mask option
· Minimum tone output duration: 93 mS (unless W91824N/AN is 87 mS)
· Minimum intertone pause: 93 mS (unless W91824N/AN is 87mS)
· Pause time: 3.6 sec. (unless W91824N/AN is 2.0 sec.)
· Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S
· Make/break ratio (2:3 or 1:2) selectable by MODE pin
· Mute key for speech network mute
· No key will be accepted except the "HOLD" key when in the Hold mode
· Key tone output for valid keypad entry recognition
· On-chip power-on reset
· Uses 3.579545 MHz crystal or ceramic resonator
· 20, or 22-pin dual-in-line plastic package
· The different dialers in the W91820N series are shown in the following table:
TYPE NO.
W91820N/824N
W91820AN/824AN
W91820LN
PULSE (ppS) LOCK KEY TONE HANDFREE DIALING PACKAGE (PINS)
10
10
10
10
20
20
-
-
-
20
22
20
22
20
22
Ö
Ö
-
Ö
-
Ö
Ö
-
W91820ALN
W91822N
-
Ö
-
Ö
Ö
W91822AN
-
Ö
Note: W91824N/824AN for French only.
Publication Release Date: May 1999
Revision A2
- 1 -
W91820N SERIES
PIN CONFIGURATIONS
C1
C2
C3
1
2
R4
22
20
19
18
C1
C2
C3
1
2
R4
R3
21
20
19
3
R2
R3
R2
3
R1
4
5
C4
KT
N.C.
VDD
R1
18
4
5
17
16
C4
KT
N.C.
VDD
H/P MUTE
VSS
6
17
16
MODE
DTMF
6
15
14
H/P MUTE
VSS
7
8
MODE
DTMF
XT
15
14
7
8
DP
XT
13
XT
T/P MUTE
HFI
9
13
12
HKS
HFO
9
12
11
DP
XT
10
11
HKS
T/P MUTE
10
W91820N/822N
/824N
W91820AN/822AN
/824AN
C1
C2
C3
1
2
22
R4
C1
C2
C3
C4
1
21
20
19
20
R4
R3
R2
R1
2
3
19
R3
3
4
5
R2
C4
18
18
N.C.
R1
LOCK
4
17
VDD
5
N.C.
VDD
6
H/P MUTE
VSS
17
16
LOCK
16
MODE
DTMF
6
H/P MUTE
VSS
7
8
15
7
XT
XT
MODE
DTMF
15
14
14
8
XT
13
9
DP
9
13
12
12
DP
XT
HKS
HFO
10
11
T/P MUTE
HFI
10
11
HKS
T/P MUTE
W91820LN
W91820ALN
- 2 -
W91820N SERIES
PIN DESCRIPTION
SYMBOL 20-PIN 22-PIN I/O
FUNCTION
Column-
Row
Inputs
I
1- 4
&
1- 4
&
The keyboard input is compatible with a standard 5 ´ 5
keyboard, an inexpensive single contact (Form A) keyboard,
and electronic input.
17- 20 19- 22
In normal operation, any single button can be pushed to
produce dual tone, pulses, or functions. Activation of two or
more buttons will result in no response except for a single
tone.
XT
XT
8
8
I
A built-in inverter together with an inexpensive 3.579545 MHz
crystal supplies the oscillator. The oscillator stops when there
is no keypad input. The crystal frequency deviation is 0.02%.
9
9
O
O
Crystal oscillator output pin.
T/P
10
10
The T/P MUTE is a conventional CMOS N-channel open
drain output.
MUTE
The output transistor turns on with a low level during a dialing
sequence (both pulse and tone mode). Otherwise, it is off.
N.C.
16
14
18
16
-
I
No connect
MODE
Connecting the mode pin to VSS places the dialer in tone
mode.
Connecting the mode pin to VDD places the dialer in pulse
mode with an M/B ratio of 40:60.
Leaving the mode pin floating places the dialer in pulse mode
with an M/B ratio of 33.3:66.7.
11
13
I
HKS
The HKS (hook switch) input is used to sense whether the
handset is on-hook or off-hook.
In on-hook state, HKS = 1: chip is in sleeping mode, no
operation.
In off-hook state, HKS = 0: chip is enabled for normal
operation.
HKS pin is pulled to VDD by internal resistor.
KT
5
5
O
The key tone output is a conventional CMOS inverter. The
key tone is generated when any valid key is pressed; the KT
pin generates a 1.2 KHz square wave at 35 mS. When no key
is pressed, the KT pin remains in low state.
(W91820N/8
20AN/822N/
824N/822AN
/824AN only)
Publication Release Date: May 1999
- 3 -
Revision A2
W91820N SERIES
Pin Description, continued
SYMBOL
20-PIN 22-PIN I/O
FUNCTION
5
5
I
The function of this terminal is to prevent "0" dialing and "9"
dialing under PABX system long distance call control. When
the first key input after reset is 0 or 9, all key inputs,
including the 0 or 9 key, become invalid and the chip
generates no output. The telephone is reinitialized by a
reset.
LOCK
(W91820LN/
820ALN only)
The function of the LOCK pin is shown below:
FUNCTION
LOCK PIN
V
DD
"0", "9" dialing inhibited
Floating
Normal dialing Mode
"0" dialing inhibited
V
SS
H/P MUTE
DP
6
6
I
The H/P MUTE is a conventional inverter output. During
pulse dialing, flash break or hold period, this output is active
high; otherwise, it remains in low state.
12
14
O
N-channel open drain dialing pulse output.
Flash key will cause DP to be active in either tone mode or
pulse mode.
In lock mode, the DP remains low for 300 mS durint off-
hook delay time.
The timing diagram for pulse mode is shown in Figure 1(a,
b).
DTMF
13
15
O
During pulse dialing, this pin remains in a low state
regardless of the keypad input. In tone mode, it will output a
dual or single tone.
A detailed timing diagram for tone mode is shown in Figure
2(a, b).
OUTPUT FREQUENCY
Actual
699
Error %
+0.28
Specified
697
R1
R2
R3
R4
C1
C2
C3
766
848
-0.52
-0.47
+0.74
+0.57
-0.30
-0.34
770
852
948
941
1216
1332
1472
1209
1336
1477
VDD, VSS
15, 7
17, 7
I
Power input pins for the dialer chip. VDD is the power and
VSS is the ground.
- 4 -
W91820N SERIES
Pin Description, continued
SYMBOL
HFI
20-PIN 22-PIN I/O
11, 12 I, O Handfree control pins.
FUNCTION
-
, HFO
A low pulse on the HFI input pin toggles the handfree
control state. The status of the handfree control state is
listed in the following table:
NEXT STATE
HFO DIALING
CURRENT STATE
HOOK SW. HFO
INPUT
-
High
Low
Low
Low
Low
Yes
No
Low
HFI
HFI
On Hook
Off Hook
On Hook
Off Hook
Off Hook
High
High
-
Yes
Yes
No
HFI
Off Hook
On Hook
Low
High
On Hook High
Yes
HFI pin is pulled to VDD by an internal resistor.
The
A detailed timing diagram is shown in Figure 3.
BLOCK DIAGRAM
XT
XT
HKS
HFI
SYSTEM CLOCK
GENERATOR
CONTROL
LOGIC
LOCK
ROW
(R1 ~ R4, Vx/R5)
READ/WRITE
COUNTER
MODE
KEYBOARD
INTERFACE
COLUMN
(C1 ~ C4, Vss)
T/P MUTE
KT
PULSE
CONTROL
LOGIC
RAM
LOCATION
LATCH
DP
HFO
H/P MUTE
ROW & COLUMN
PROGRAMMABLE
COUNTER
D/A
CONVERTER
DATA LATCH
& DECODER
DTMF
Publication Release Date: May 1999
Revision A2
- 5 -
W91820N SERIES
FUNCTIONAL DESCRIPTION
Keyboard Operation
C1
1
C2
2
C3
3
C4
S
VSS
EM1
EM2
EM3
R1
R2
R3
4
5
6
F4
A
7
8
9
0
#
R/P
H
SAVE R4
Vx/R5
*/T
F1
F2
F3
· S: Store function key
· A: Indirect repertory memory dialing function key
· H: Hold function key
· R/P: Redial and pause function key
· */T: * in tone mode and P® T key in pulse mode
· SAVE: Save function key for one-touch 32-digit memory
· EM1, ..., EM3: Emergency one-touch memory key
· F1, ..., F4: Flash function keys: F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS; all flash
pause time is 1.0 mS
Note: D1, ..., Dn, D1`, ..., Dn`, */T, #, Mn: EM1, ..., EM3, Ln: 0- 9
Normal Dialing
OFF HOOK (or
ON HOOK
&
), D1
,
D2
Dn
, ¼ ,
HFI
1. D1, D2, ¼ , Dn will be dialed out.
2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing.
Redialing Dialing
OFF HOOK (or
ON HOOK
&
,
D1
,
D2
Dn , BUSY
), R/P
, ¼ ,
HFI
Come ON HOOK
,
OFF HOOK (or ON HOOK
&
HFI
The R/P key can execute redial function only as first key-in after off-hook. Otherwise, it will invoke
the pause function.
·
The below cases are selected by mask option for W91824N/AN (French version) only.
In tone mode:
D1, D2, D3,*(or #), D4, D5, D6
The chip will only output D1, D2, D3 and ignore *(or #), D4, D5, D6.
In pulse mode:
D1, D2, D3, */T, D4, D5, D6
- 6 -
W91820N SERIES
The chip will only output D1,D2,D3 and do not transfer to tone mode. In pulse mode, the # sign
does not effect.
Number Store
1. OFF HOOK (or ON HOOK
&
), D1
,
D2 , ..., Dn
,
S
,
S
,
HFI
)
EMn (or Ln or SAVE
A
,
a. The dialing out of D1 to Dn must first be finished before the S key is pressed.
b. D1, D2, ¼ , Dn will be stored in memory location Mn or saved and then dialed out.
2. OFF HOOK (or ON HOOK
&
),
S
,
D1
,
D2 , ..., Dn
,
S
,
HFI
EMn (or
A
,
Ln or SAVE
)
a. D1, D2, ¼ , Dn will be stored in memory location, Mn (or saved), but will not be dialed out.
b. R/P and */T keys can be stored as a digit in memory, but the R/P key cannot be the
first digit. In store mode, R/P is the pause function key.
c. The store mode is released after the store function is executed or when the state of the hook
switch changes or the flash function is executed.
Save
OFF HOOK (or ON HOOK
a. D1, D2, ..., Dn will be dialed out.
&
), D1
,
D2 , ..., Dn
,
Save
HFI
b. If the dialing of D1 to Dn is finished, pressing SAVE will duplicate D1 to Dn to the save
memory.
OFF HOOK (or ON HOOK
&
),
HFI
come on OFF HOOK (or ON HOOK
&
), SAVE
HFI
c. D1 to Dn will be dialed out after the SAVE key is pressed.
Repertory Dialing Procedure
One-touch direct repertory dialing:
OFF HOOK (or ON HOOK
&
), Mn (or SAVE
)
HFI
Publication Release Date: May 1999
Revision A2
- 7 -
W91820N SERIES
Two-touch direct repertory dialing:
OFF HOOK (or ON HOOK
&
),
A
,
Ln
HFI
HFI
Access Pause
OFF HOOK (or ON HOOK
&
), D1
,
D2
,
R/P
,
D3 , ..., Dn
1. The pause function can be stored in memory.
2. The pause function is executed with normal dialing, redialing or memory dialing.
3. The pause function timing diagram is shown in Figure 6.
Pulse-to-tone (*/T)
OFF HOOK (or ON HOOK
D2' , ..., Dn'
&
), D1
,
D2 , ..., Dn
,
*/T
,
D1'
,
HFI
,
1. If the mode switch is set in pulse mode, then it will perform
case a: D1, D2, ---, Dn, Pause (3.6 sec), D1', D2', ---, Dn'
(Pulse)
(Tone)
case b: (only for French version)
D1, D2, ---, Dn, * , D1', D2', ---, Dn'
(Pulse)
(Tone)
2. If the mode switch is set in tone mode, then the output signal will be:
D1, D2, ---, Dn, * , D1', D2', ---, Dn'
(Tone)
3. It can be reset to pulse mode only if ON HOOK is active. This is because it remains in tone mode
when the digits have been dialed out.
4. The function timing diagram is shown in Figure 7.
Flash
OFF HOOK (or ON HOOK
&
), Fn
HFI
Fn is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS
1. Fn = F1- F4. If
(F2), 73 mS (F3) or 100 mS (F4) and a pause time of 1.0 second, after which the next digit is dialed
out.
2. The flash key has the first priority of the keyboard function only one flash key will be released to
the user.
3. When the flash key is key in, the system will return to the initial state after the flash pause time is
finished.
4. The flash function timing diagram is shown in Figure 8.
- 8 -
W91820N SERIES
Cascaded Dialing
OFF HOOK (or ON HOOK
&
)
HFI
1. Normal Dialing
(1st sequence)
+
Repertory Dialing
(2nd sequence)
+
Normal Dialing
2. Repertory Dialing
(1st sequence)
+
Normal Dialing
(2nd sequence)
+
Repertory Dialing
3. Redialing
(1st sequence) (2nd sequence)
Redialing is valid only for the first key-in.
+
Normal Dialing
+
Repertory Dialing
The second sequence should not be operated until the first sequence is dialed out completely.
ABSOLUTE MAXIMUM RATING
PARAMETER
DC Supply Voltage
SYMBOL
VDD- VSS
VIL
RATING
-0.3 to +7.0
VSS -0.3
UNIT
V
V
Input/Output Voltage
VIH
VDD +0.3
VSS -0.3
V
VOL
V
VOH
VDD +0.3
120
V
Power Dissipation
PD
mW
°C
°C
Operation Temperature
Storage Temperature
TOPR
TSTG
-20 to +70
-55 to +150
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability
of the device.
Publication Release Date: May 1999
- 9 -
Revision A2
W91820N SERIES
DC CHARACTERISTICS
(VDD- VSS = 2.5V, Fosc. = 3.58 MHz, TA = 25° C, all outputs unloaded)
PARAMETER
Operating Voltage
Operating Current
SYM.
VDD
IOP
CONDITIONS
MIN. TYP. MAX.
UNIT
V
-
2.0
-
5.5
0.6
0.4
15
Tone
Pulse
-
-
-
0.4
0.2
-
mA
mA
mA
Standby Current
ISB
HKS = 0, No load &
No key entry
Memory Retention Current
IMR
-
-
1
mA
HKS = 1, VDD = 1.0V
Row group, RL = 5 KW
Col/Row, VDD = 2.0- 5.5V
RL = 5 KW, VDD = 2.0- 5.5V
RL = 5 KW, VDD = 2.0- 5.5V
VTO = 0.5V
Tone Output Voltage
Pre-emphasis
VTO
130
1
150
170
3
mVrms
dB
2
DTMF Distortion
THD
VTDC
ITL
-
-30
-23
3.0
-
dB
DTMF Output DC Level
DTMF Output Sink Current
1.0
0.2
0.5
-
-
-
V
mA
mA
IPL
VPO = 0.5V
-
DP Output Sink Current
IML
VMO = 0.5V
0.5
-
-
mA
T/P MUTE Output Sink
Current
KT Drive/Sink Current
IKTH
IKTL
VKTH = 2.0V
VKTL = 0.5V
VHFH = 2.0V
VHFL = 0.5V
VHPH = 2.0V
VHPL = 0.5V
VI = 0V
0.5
0.5
0.5
0.5
0.5
0.5
4
-
-
-
-
-
-
-
-
-
mA
mA
mA
mA
mA
mA
mA
-
HFO Drive/Sink Current
IHFH
IHFL
-
-
H/P MUTE
IHPH
IHPL
IKD
-
Drive/Sink Current
Keypad Input Drive Current
-
-
RHKS
300
500
KW
HKS Pull High Resister
Keypad Input Sink Current
Keypad Resistance
IKS
VI = 2.5V
200
-
400
-
-
mA
5.0
KW
- 10 -
W91820N SERIES
AC CHARACTERISTICS
PARAMETER
Key-in Debounce
SYM.
CONDITIONS
MIN.
TYP.
20
MAX. UNIT
TKID
TKRD
TOHD
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
mS
mS
mS
mS
mS
mS
mS
mS
mS
Key Release Debounce
On-hook Debounce
20
Lock Mode
20
Unlock Mode
150
40
Pre-digit Pause1
Pre-digit Pause2
TPDP1
Mode Pin = VDD
10 ppS Mode Pin = Floating
Mode Pin = VDD
20 ppS Mode Pin = Floating
33.3
20
TPDP2
16.7
800
Inter Digit Pause
(Auto Dialing)
TIDP
10 ppS
(W91820N/W91820AN/820LN
/820ALN/824N/824AN only)
20 ppS
-
500
-
mS
(W91822N/822AN only)
Interdigit Pause
(Auto dialing)
TIDP
10 ppS
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
800
500
40:60
33.3:66.7
93
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
mS
mS
%
20 ppS
Make/Break Ratio
M:B
Mode Pin = VDD
Mode Pin = Floating
%
Tone Output Duration
Intertone Pause
TTD
TITP
TFB
-
mS
mS
mS
-
93
Flash Break Time
F1
F2
F3
F4
-
600
300
73
100
1.0
Flash Pause Time
Pause Time
TFP
TP
S
S
-
3.6
(W91824N/AN only)
2.0
S
Key Tone Frequency
Key Tone Duration
FKT
TKTD
TRP
-
-
-
1.2
KHz
mS
mS
35
One-key Redialing
Pause Time
600
One-key Redialing
Break Time
TRB
-
-
-
2.2
-
-
S
First Key-in Delay
TFKD
Lock only
300
mS
Notes:
1. Crystal parameters suggested for proper operation are Rs < 100 W, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF,
Fosc. = 3.579545 MHz ±0.02%.
2. Crystal oscillator accuracy directly affects these times.
Publication Release Date: May 1999
Revision A2
- 11 -
W91820N SERIES
TIMING WAVEFORMS
HKS
KEY IN
DP
4
2
2
T
T
KID
KID
M
M
B
B
T
T
T
IDP
IDP
IDP
T
PDP
T
PDP
T/P MUTE
H/P MUTE
KT
LOW
DTMF
OSC.
OSC.
OSC.
Figure 1(a). Pulse Mode Tming Diagram (Normal dialing without lock function)
HKS
KEY IN
DP
300 mS
4
2
2
TFKD
TKID
M
M
B
B
TIDP
TIDP
T
IDP
TPDP
T/P MUTE
(long mute)
H/P MUTE
DTMF
LOW
OSC.
OSC.
OSC.
Figure 1(b). Pulse Mode Timing Diagram (Normal dialing with lock function)
- 12 -
W91820N SERIES
Timing Waveforms, continued
HKS
R/P
KEY IN
M
M
DP
B
B
T
T
T
IDP
IDP
IDP
TPDP
TPDP
T/P MUTE
(long mute)
H/P MUTE
KT
DTMF
OSC.
LOW
OSC.
ON HOOK
Figure 1(c). Pulse Mode Timing Diagram (Auto dialing without lock)
300 mS
HKS
R/P
KEY IN
DP
M
TFKD
B
T
TIDP
IDP
TPDP
T/P MUTE
(long mute)
H/P MUTE
LOW
DTMF
OSC.
OSC.
Figure 1(d).Pulse Mode Timing Diagram (Auto dialing with lock function)
Publication Release Date: May 1999
Revision A2
- 13 -
W91820N SERIES
Timing Waveforms, continued
HKS
3
2
6
5
KEY IN
T
KID
T
T
T
KID
KRD
KRD
T
KRD
DTMF
T
TD
T
T
ITP
T
ITP
ITP
T/P MUTE
LOW
H/P MUTE
KT
DTMF
HIGH
OSC.
OSC.
OSC.
Figure 2(a). Tone Mode Timing Diagram
300 mS
3
HKS
2
6
5
KEY IN
T
KID
T
T
KRD
T
KRD
KRD
DTMF
T
TD
T
ITP
T
T
ITP
ITP
T/P MUTE
T
FKD
LOW
H/P MUTE
DP
HIGH
OSC.
OSC.
OSC.
Figure 2(b). Tone Mode Timing Diagram (Normal dialing with lock function)
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W91820N SERIES
Timing Waveforms, continued
HKS
T
T < TOHD
R/P
TKID
KEY IN
DTMF
TTD
T
ITP
TITP
T/P MUTE
LOW
H/P MUTE
KT
DP
HIGH
OSC.
OSC.
ON HOOK
Figure 2(c). Tone Mode Timing Diagram (Auto dialing without lock function)
300 mS
HKS
T
T < TOHD
R/P
KEY IN
DTMF
TTD
TITP
T
ITP
T/P MUTE
TFKD
TKID
LOW
H/P MUTE
DP
HIGH
OSC.
OSC.
Figure 2(d). Tone Mode Timing Diagram (Auto dialing with lock function)
Publication Release Date: May 1999
Revision A2
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W91820N SERIES
Timing Waveforms, continued
HKS
T
T > TOHD
R/P
TKID
KEY IN
DTMF
TTD
TITP
T/P MUTE
(return to initial state)
LOW
HIGH
H/P MUTE
KT
DP
OSC.
OSC.
ON HOOK
Figure 2(c). Tone Mode Timing Diagram with On-hook Debounce (Auto dialing)
HKS
HFI
ON HOOK
OFF HOOK
H KEY
HFO
T/P MUTE
HIGH
LOW
H/P MUTE
CHIP ENABLE
Note: The H KEY can not be enabled during chip dissable.
Figure 3(a)
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W91820N SERIES
Timing Waveforms, continued
OFF HOOK
HKS
HFI
H KEY
HFO
T/P MUTE
HIGH
H/P MUTE
CHIP ENABLE
Figure 3(b)
Note: The H KEY and HFI inputs will toggle the HFO signal. The first time HFI or H KEY are activated, the HFO signal will go
high and the previous active input will be neglected.
ON HOOK
HKS
HFI
H KEY
HFO
T/P MUTE
HIGH
H/P MUTE
CHIP ENABLE
Figure 3(c)
Note: The HKS signal change of state from high to low will initialize both the HFO and H/P MUTE signals.
Publication Release Date: May 1999
Revision A2
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W91820N SERIES
Timing Waveforms, continued
HKS
T
T<T
OHD
4
KEY IN
DP
T
KID
M
B
T
IDP
T
PDP
T/P MUTE
H/P MUTE
T
FKD
T
OFD
T
OHD
LOW
DTMF
OSC.
OSC.
OSC.
CHIP ENABLE
ON HOOK
Figure 4. Lock Function Timing Diagram
LOW
HKS
OKR
KEY IN
M
T
DP
RB
B
T
T
T
IDP
RP
IDP
T
T
KID
PDP
T
PDP
T/P MUTE
H/P MUTE
KT
LOW
DTMF
OSC
OSC.
Figure 5. Pulse Mode One-key Redialing Timing Diagram
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W91820N SERIES
Timing Waveforms, continued
HKS
4
2
R/P
2
KEY IN
DP
T
KID
M
M
B
B
T
T
T
IDP
IDP
IDP
T
T
PDP
PDP
T/P MUTE
T
P
H/P MUTE
KT
LOW
DTMF
OSC
OSC.
Figure 6. Pause Function Timing Diagram
HKS
KEY IN
DP
4
2
*/T
M
8
T
KID
M
B
B
T
T
IDP
IDP
T
PDP
T/P MUTE
T
P
DTMF
T
ITP
H/P MUTE
KT
OSC.
OSC.
Figure 7(a). Pulse to Tone Function Timing Diagram
Publication Release Date: May 1999
Revision A2
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W91820N SERIES
Timing Waveforms, continued
HKS
4
2
*/T
8
KEY IN
T
KID
M
M
DP
B
B
T
T
IDP
IDP
T
PDP
T/P MUTE
H/P MUTE
DTMF
*
8
T
ITP
T
ITP
KT
OSCILLATION
OSC.
Figure 7(b). Pulse to tone function timing diagram (only for French version)
HKS
R/P
KEY IN
M
M
DP
T/P MUTE
H/P MUTE
B
B
T
T
IDP
IDP
T
PDP
KT
LOW
DTMF
OSC
OSC.
ON HOOK
Figure 7(c). Pulse mode auto-redialing timing diagram continue Figure 6(b). (only for French version)
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W91820N SERIES
Timing Waveforms, continued
HKS
R/P
KEY IN
DTMF
T
KID
T
TD
T
ITP
2
4
T/P MUTE
H/ P MUTE
LOW
HIGH
KT
DP
OSC
OSC.
ON HOOK
Figure 7(d). Tone mode auto-redialing timing diagram continue Figure 6(b). (only for French version)
LOW
HKS
Fn
KEY IN
T
KID
T
FB
DP
T/P MUTE
H/P MUTE
KT
LOW
DTMF
T
FP
OSC.
OSC.
Figure 8. Flash Operation Timing Diagram
Publication Release Date: May 1999
Revision A2
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W91820N SERIES
Winbond Electronics (H.K.) Ltd.
Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.
2727 N. First Street, San Jose,
CA 95134, U.S.A.
Headquarters
No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: 886-3-5770066
Rm. 803, World Trade Square, Tower II,
123 Hoi Bun Rd., Kwun Tong,
Kowloon, Hong Kong
TEL: 852-27513100
FAX: 852-27552064
FAX: 886-3-5792766
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-27197006
TEL: 408-9436666
FAX: 408-5441798
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: 886-2-27190505
FAX: 886-2-27197502
Note: All data and specifications are subject to change without notice.
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相关型号:
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