ISD4004-10MSI [WINBOND]
Single-Chip Voice Record/Playback Devices 8-, 10-, 12-, and 16-Minute Durations; 单芯片语音记录/播放设备8-， 10-， 12-，和16分钟的持续时间
| 型号： | ISD4004-10MSI |
| 厂家： | 
WINBOND |
| 描述： | Single-Chip Voice Record/Playback Devices 8-, 10-, 12-, and 16-Minute Durations |
| 文件： | 总28页 (文件大小：976K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISD4004 Series
Single-Chip Voice Record/Playback Devices
8-, 10-, 12-, and 16-Minute Durations
GENERAL DESCRIPTION
®
The ISD4004 ChipCorder Products provide high-
qua lity, 3-volt, single -c hip re c ord/pla yba c k solu-
tions for 8- to 16-m inute m e ssa ging a pplic a tions
whic h a re ide a l for c e llula r phone s a nd othe r por-
ta ble produc ts. The CMOS-ba se d de vic e s inc lude
a n on-c hip osc illa tor, a ntia lia sing filte r, smoothing
filte r, AutoMute ™ fe a ture , a udio a mplifie r, a nd
high de nsity, m ultile ve l Fla sh stora ge a rra y. The
ISD4004 se rie s is de signe d to be use d in a mic ro-
proce ssor- or mic roc ontrolle r-ba sed syste m. Ad-
dre ss a nd c ontrol a re a c c om plishe d through a
Se ria l Pe riphe ra l Inte rfa c e (SPI) or Mic rowire Se ria l
Inte rfa c e to m inim ize pin c ount.
Re c ordings a re store d in on-c hip nonvola tile
m e m ory c e lls, providing ze ro-powe r m e ssa ge
stora ge . This unique , single -c hip solution is m a de
possible through ISD’s pa te nted multileve l stora ge
te c hnology. Voic e a nd a udio signa ls a re store d
direc tly into me mory in their na tura l form, providing
high-qua lity, solid-sta te voic e re produc tion.
Figure: ISD4004 Series Block Diagram
August 2000
ISD/ Winb o nd · 2727 No rth First Stre e t, Sa n Jo se , CA 95134 · TEL: 408/ 943-6666 · FAX: 408/ 544-1787 · http :/ / www.isd .c o m
ISD4004 Series
FEATURES
•
•
•
Single -c hip voic e re c ord/pla yba c k solution
•
Fully a ddre ssa ble to ha ndle multiple
m e ssa ge s
Single + 3 volt supply
Low-powe r c onsum ption
– Ope ra ting c urre nt:
•
•
Nonvola tile m e ssa ge stora ge
Powe r c onsum ption c ontrolle d by SPI
or Mic rowire c ontrol re giste r
I
Pla y = 15 mA (typic a l)
Re c = 25 m A (typic a l)
CC
I
•
•
•
•
•
100-ye a r m e ssa ge re te ntion (typic a l)
100K re c ord c yc le s (typic a l)
CC
– Sta ndby c urre nt: 1 µA (typic a l)
•
Single -c hip dura tions of 8, 10, 12, a nd
16 m inute s
On-c hip c loc k sourc e
Ava ila ble in die form , PDIP, SOIC, a nd TSOP
•
•
High-qua lity, na tura l voic e /a udio re produc tion
Exte nde d te m pe ra ture (–20°C to + 70°C) a nd
industria l te m pe ra ture (–40°C to + 85°C)
ve rsions a va ila ble
AutoMute fe a ture provide s ba c kground noise
a tte nua tion during pe riods of sile nc e
•
•
No a lgorithm de ve lopm e nt re quire d
Mic roc ontrolle r SPI or Mic rowire™ Se ria l
Inte rfa c e
Table: ISD4004 Series Summary
Part
Duration
Input Sample
Rate (KHz)
Typical Filter Pass
Band (KHz)
Number
(minutes)
ISD4004-08M
8.0
8.0
6.4
5.3
4.0
3.4
2.7
2.3
1.7
ISD4004-10M
ISD4004-12M
ISD4004-16M
10.0
12.0
16.0
™
Voice Solutions in Silicon
ii
Table of Contents
DETAILED DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Spe e c h/Sound Qua lity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Dura tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Fla sh Stora ge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Mic roc ontrolle r Inte rfa c e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Progra mm ing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Volta ge Inputs (V
, V
) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
CCA CCD
Ground Inputs (V , V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SSA SSD
Non-Inve rting Ana log Input (ANA IN+ ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Inve rting Ana log Input (ANA IN–) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Audio Output (AUD OUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Sla ve Se le c t (SS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ma ste r Out Sla ve In (MOSI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Ma ste r In Sla ve Out (MISO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Se ria l Cloc k (SCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Inte rrupt (INT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Row Addre ss Cloc k (RAC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Exte rna l Cloc k Input (XCLK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
AutoMute ™ Fe a ture (AM CAP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Me ssa ge Cue ing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Powe r-Up Se que nc e . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
SPI Control Re giste r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
TIMING DIAGRAMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DEVICE PHYSICAL DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
ISD
iii
ISD4004 Series
FIGURES, CHARTS, AND TABLES IN THE ISD4004 SERIES DATA SHEET
Figure 1:
Figure 2:
Figure 3:
Figure 4:
Figure 5:
Figure 6:
Figure 7:
Figure 8:
Figure 9:
Figure 10:
Figure 11:
Figure 12:
Figure 13:
Figure 14:
Figure 15:
ISD4004 Se rie s TSOP a nd PDIP/SOIC Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
ISD4004 Se rie s ANA IN Mode s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
SPI Port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
SPI Inte rfa c e Sim plifie d Bloc k Dia gra m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Tim ing Dia gra m . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
8-Bit Com m a nd Form a t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
24-Bit Comm a nd Form a t . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Pla yba c k/Re c ord a nd Stop Cyc le . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Applic a tion Exa mple Using SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Applic a tion Exa mple Using Mic rowire . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Applic a tion Exa mple Using SPI Port on Mic roc ontrolle r . . . . . . . . . . . . . . . . . . . . . . . 17
28-Le a d 8x13.4 m m Pla stic Thin Sma ll Outline Pa c ka ge (TSOP) Type I (E) . . . . . . . . 18
28-Le a d 0.600-Inc h Pla stic Dua l Inline Pa c ka ge (PDIP) (P) . . . . . . . . . . . . . . . . . . . . 19
28-Le a d 0.300-Inc h Pla stic Sm a ll Outline Inte gra te d Circ uit (SOIC) (S) . . . . . . . . . . . 20
ISD4004 Se rie s Bonding Physic a l La yout (Unpa c ka ge d Die ) . . . . . . . . . . . . . . . . . . . 21
Ta ble 1:
Ta ble 2:
Ta ble 3:
Ta ble 4:
Ta ble 5:
Ta ble 6:
Ta ble 7:
Ta ble 8:
Ta ble 9:
Ta ble 10:
Ta ble 11:
Ta ble 12:
Ta ble 13:
Ta ble 14:
Ta ble 15:
Ta ble 16:
Exte rna l Cloc k Input Cloc king Ta ble . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Opc ode Sum m a ry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
SPI Control Re giste r . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Absolute Ma xim um Ra tings (Pa c ka ge d Pa rts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Ope ra ting Conditions (Pa c ka ge d Pa rts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
DC Pa ra m e te rs (Pa c ka ge d Pa rts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
AC Pa ra m e te rs (Pa c ka ge d Pa rts) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Absolute Ma xim um Ra tings (Die ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Ope ra ting Conditions (Die ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
DC Pa ra m e te rs (Die ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
AC Pa ra m e te rs (Die ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
SPI AC Pa ra m e te rs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Pla stic Thin Sm a ll Outline Pa c ka ge (TSOP) Type I (E) Dim e nsions . . . . . . . . . . . . . . . . 18
Pla stic Dua l Inline Pa c ka ge (PDIP) (P) Dime nsions . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Pla stic Sm a ll Outline Inte gra te d Circ uit (SOIC) (S) Dim e nsions . . . . . . . . . . . . . . . . . . 20
ISD4004 Se rie s De vic e Pin/Pa d De signa tions, with Re spe c t to Die Ce nte r (µm ) . . . . 22
Voice Solutions in Silicon™
iv
ISD4004 Series
PROGRAMMING
DETAILED DESCRIPTION
The ISD4004 se rie s is a lso ide a l for pla yba c k-only
a pplic a tions, whe re single or m ultiple m e ssa ge
Pla yba c k is c ontrolle d through the SPI port. Once
the desired messa ge configura tion is crea ted, du-
plic a te s c a n e a sily be ge ne ra te d via a n ISD pro-
gra m m e r.
SPEECH/SOUND QUALITY
The ISD4004 ChipCorde r se rie s inc lude s devices
offered a t 4.0, 5.3, 6.4, a nd 8.0 KHz sa mpling fre -
que nc ie s, a llowing the use r a c hoic e of spe e c h
qua lity options. Inc re a sing the dura tion within a
produc t se rie s de c re a se s the sa m pling fre que nc y
a nd ba ndwidth, whic h a ffe c ts sound qua lity.
Plea se refer to the ISD4004 Series Product Summ a ry
ta ble on the se c ond pa ge to c om pa re filte r pa ss
ba nd a nd produc t dura tions.
PIN DESCRIPTIONS
VOLTAGE INPUTS (VCCA, VCCD
)
To minim ize noise , the a na log a nd digita l c irc uits
in the ISD4004 devices use sepa ra te power busses.
The se + 3 V busse s a re brought out to se pa ra te
pins a nd should be tie d toge the r a s c lose to the
supply a s possible . In a ddition, the se supplie s
should be de c ouple d a s c lose to the pa c ka ge a s
possible .
The speech sa mples a re stored directly into on-chip
nonvola tile m e mory without the digitiza tion a nd
c ompre ssion a ssoc ia te d with othe r solutions. Di-
re c t a na log stora ge provide s a na tura l sounding
re produc tion of voic e , m usic , tone s, a nd sound
e ffe c ts not a va ila ble with most solid-sta te solu-
tions.
GROUND INPUTS (VSSA, VSSD)
The ISD4004 se rie s utilize s se pa ra te a na log a nd
DURATION
To m e e t e nd syste m re quire m e nts, the ISD4004 se-
ries produc ts a re single -c hip solutions a t 8, 10, 12,
16 m inute s.
digita l ground busse s. The a na log ground (V
)
SSA
pins should be tie d toge the r a s c lose to the pa c k-
a ge a s possible a nd c onne c te d through a low-
im pe da nc e pa th to powe r supply ground. The
FLASH STORAGE
digita l ground (V ) pin should be c onne c te d
SSD
through a se pa ra te low-im pe da nc e pa th to pow-
e r supply ground. The se ground pa ths should be
la rge e nough to e nsure tha t the im pe da nc e be -
twe e n the V pins a nd the V pin is le ss tha n
One of the benefits of ISD’s ChipCorder technology
is the use of on-chip nonvola tile memory, which pro-
vides ze ro-powe r m e ssa ge stora ge . The m e ssa ge
is re ta ine d for up to 100 ye a rs (typic a lly) without
powe r. In a ddition, the de vic e c a n be re -re c ord-
e d (typic a lly) ove r 100,000 time s.
SSA
SSD
3 W. The ba c kside of the die is c onne c te d to V
SS
through the substra te re sista nc e . In a c hip-on-
boa rd de sign, the die a tta c h a re a m ust be c on-
MICROCONTROLLER INTERFACE
ne c te d to V or le ft floa ting.
SS
A four-wire (SCLK, MOSI, MISO, SS) SPI inte rfa c e is
provide d for ISD4004 c ontrol a nd a ddre ssing
func tions. The ISD4004 is c onfigure d to ope ra te a s
a pe riphe ra l sla ve de vic e , with a mic roc ontrolle r-
ba se d SPI bus inte rfa c e . Re a d/Write a c c e ss to a ll
the inte rna l re giste rs oc c urs through this SPI inte r-
fa c e . An inte rrupt signa l (INT) a nd inte rna l re a d-
only Sta tus Re giste r a re provide d for ha ndsha ke
purpose s.
ISD
1
ISD4004 Series
Figure 1: ISD4004 Series TSOP and PDIP/SOIC Pinouts
ISD4004
ISD4004
28-PIN TSOP
PDIP/SOIC
Figure 2: ISD4004 Series ANA IN Modes
™
Voice Solutions in Silicon
2
ISD4004 Series
NON-INVERTING ANALOG INPUT (ANA IN+)
SLAVE SELECT (SS)
This pin is the non-inve rting a na log input tha t tra ns-
fe rs the signa l to the de vic e for re c ording. The a n-
a log input a m plifie r c a n be drive n single e nde d or
diffe re ntia lly. In the single -e nde d input mode, a
32 mVp-p (pea k-to-pe a k) ma ximum signa l should
be c a pa c itive ly c onne c te d to this pin for optim a l
signa l qua lity. This c a pa c itor va lue , toge the r with
the 3 KW input im pe da nc e of ANA IN+ , is se le c te d
to give c utoff a t the low fre que nc y e nd of the
voic e pa ssba nd. In the diffe re ntia l-input m ode ,
the m a xim um input signa l a t ANA IN+ should be
16 m Vp-p for optima l signa l qua lity. The c irc uit
c onne c tions for the two m ode s a re shown in Fig-
ure 2 on pa ge 2.
This input, whe n LOW, will se le c t the ISD4004
de vic e .
MASTER OUT SLAVE IN (MOSI)
This is the se ria l input to the ISD4004 de vic e . The
m a ste r m ic roc ontrolle r pla c e s da ta on the MOSI
line one ha lf-c yc le be fore the rising c loc k e dge to
be c loc ke d in by the ISD4004 de vic e .
MASTER IN SLAVE OUT (MISO)
This is the se ria l output of the ISD4004 de vic e . This
output goe s into a high-im pe da nc e sta te if the
de vic e is not se le c te d.
SERIAL CLOCK (SCLK)
INVERTING ANALOG INPUT (ANA IN–)
This is the c loc k input to the ISD4004. It is ge ne ra t-
e d by the m a ste r de vic e (mic roc ontrolle r) a nd is
use d to sync hronize da ta tra nsfe rs in a nd out of
the de vic e through the MISO a nd MOSI line s. Da ta
is la tc he d into the ISD4004 on the rising e dge of
SCLK a nd shifte d out of the de vic e on the fa lling
e dge of SCLK.
This pin is the inve rting a na log input tha t tra nsfe rs
the signa l to the de vic e for re c ording in the diffe r-
e ntia l-input m ode . In this diffe re ntia l-input m ode ,
a 16 m Vp-p m a xim um input signa l a t ANA IN–
should be c a pa c itive ly c ouple d to this pin for op-
tim a l signa l qua lity a s shown in the ISD4004 Se rie s
ANA IN Mode s, Figure 2. This c a pa c itor va lue
should be e qua l to the c oupling c a pa c itor use d
on the ANA IN+ pin. The input impeda nce a t ANA IN–
is nomina lly 56 KW. In the single -e nde d m ode , ANA
INTERRUPT (INT)
The ISD4004 inte rrupt pin goe s LOW a nd sta ys LOW
whe n a n Ove rflow (OVF) or End of Me ssa ge (EOM)
m a rke r is de te c te d. This is a n ope n dra in output
pin. Ea c h ope ra tion tha t e nds in a n EOM or Ove r-
flow will ge ne ra te a n inte rrupt inc luding the m e s-
sa ge c ue ing c yc le s. The inte rrupt will be c le a re d
the ne xt tim e a n SPI c yc le is initia te d. The inte rrupt
sta tus c a n be re a d by a n RINT instruc tion.
IN– should be c a pa c itive ly c ouple d to V
SSA
through a c a pa c itor e qua l to tha t use d on the
ANA IN+ input.
AUDIO OUTPUT (AUD OUT)
This pin provide s the a udio output to the use r.
It is c a pa ble of driving a 5 KW im pe da nc e . It is
re c om m e nde d tha t this pin be AC c ouple d.
Ove rflow Fla g (OVF)—The Ove rflow fla g indi-
c a te s tha t the e nd of the ISD4004’s a na log m e m -
ory ha s be e n re a c he d during a re c ord or
pla yba c k ope ra tion.
NOTE The AUDOUT p in is a lwa ys a t 1.2 volts whe n
the de vice is p owe re d up . Whe n in p la y-
ba c k, the outp ut buffe r c onne c te d to this
p in ca n drive a loa d a s sm a ll a s 5 KW.
Whe n in re cord, a re sistor c onne c ts AUD-
OUT to the inte rna l 1.2 volt a na log g round
sup p ly. This re sistor is a p p roxim a te ly
850 KW, but will va ry som e wha t a c cording
to the sa m p le ra te of the de vice . This re l-
a tive ly hig h im p e da nc e a llows this p in to
be c onne c te d to a n a udio bus without
loa ding it down.
End of Me ssa g e (EOM)—The End-of-Me ssa ge
fla g is se t only during pla yba c k ope ra tion whe n a n
EOM is found. The re a re e ight EOM fla g position
options pe r row.
ISD
3
ISD4004 Series
Table 1:
External Clock Input Clocking
Table
ROW ADDRESS CLOCK (RAC)
This is a n ope n dra in output pin tha t provide s a sig-
na l with a 200 m s pe riod a t the 8 KHz sa mpling fre -
que nc y. (This re pre sents a single row of memory
a nd the re a re 2400 rows of me m ory in the ISD4004
series devices.) This signa l sta ys HIGH for 175 m s
a nd sta ys LOW for 25 m s whe n it re a c he s the e nd
of a row.
Part Number
Sample Rate Required Clock
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
8.0 KHz
6.4 KHz
5.3 KHz
4.0 KHz
1024 KHz
819.2 KHz
682.7 KHz
512 KHz
The se re c om m e nde d c loc k ra te s should not be
va ried beca use the a ntia lia sing a nd smoothing filters
a re fixe d. Thus, a lia sing proble ms c a n oc c ur if the
sa m ple ra te diffe rs from the one re c om m e nde d.
The duty c yc le on the input c loc k is not c ritic a l, a s
the c loc k is imm e dia te ly divide d by two inte rna lly.
If the XCLK is no t use d , this inp ut sho uld b e
c o nne c te d to g ro und .
The RAC pin sta ys HIGH for 109.38 mse c a nd sta ys
LOW for 15.63 mse c in Me ssa ge Cue ing mode
(se e pa ge 5 for a m ore de ta ile d de sc ription of
Me ssa ge Cue ing). Re fe r to the AC Pa ra m e te rs ta -
ble for RAC tim ing inform a tion on othe r sa mple
ra te produc ts.
AUTOMUTE™ FEATURE (AM CAP)
This pin is used in c ontrolling the AutoMute fe a ture .
The AutoMute fe a ture a tte nua te s the signa l whe n
it drops be low a n inte rna lly se t thre shold. This he lps
to e lim ina te noise (with 6 dB of a tte nua tion) whe n
the re is no signa l (i.e ., during pe riods of sile nc e ). A
1 mF c a pa c itor to ground should be c onne c te d to
the AM CAP pin. This c a pa c itor be c om e s a pa rt of
a n inte rna l pe a k de te c tor whic h se nse s the signa l
a m plitude (pe a k). This pe a k le ve l is c om pa re d to
a n inte rna lly se t thre shold to de te rm ine the Auto-
Mute trip point. For la rge signa ls the AutoMute a t-
te nua tion is se t to 0 dB while 6 dB of a tte nua tion
oc c urs for sile nc e . The 1 mF c a pa c itor a lso a ffe c ts
the ra te a t whic h the AutoMute fe a ture c ha nge s
with the signa l a m plitude (or the a tta c k tim e ). The
Autom ute fe a ture c a n be disa ble d by c onne c ting
Whe n a re c ord c om m a nd is first initia te d, the RAC
pin re m a ins HIGH for a n e xtra T
pe riod. This is
RACLO
due to the ne e d to loa d sa m ple a nd hold c irc uits
inte rna l to the de vic e . This pin c a n be used for
messa ge ma na gement techniques.
EXTERNAL CLOCK INPUT (XCLK)
The e xte rna l c loc k input for the ISD4004 produc ts
ha s a n inte rna l pull-down de vic e . The se produc ts
a re c onfigure d a t the fa c tory with a n inte rna l sa m -
pling c loc k fre que nc y c e nte re d to ± 1 pe rc e nt of
spe c ific a tion. The fre que nc y is the n m a inta ine d to
a va ria tion ove r the e ntire c om m e rc ia l te m pe ra -
ture a nd ope ra ting volta ge ra nge s a s de fine d by
the m inimum /ma xim um lim its in the a pplic a ble
AC Pa ra m e te rs ta ble . The inte rna l c loc k ha s a tol-
e ra nc e , over the extended tempera ture, industria l
tempera ture a nd volta ge ra nge s a s de fine d by the
m inim um /m a xim um lim its in the a pplic a ble AC
Pa ra m e te rs ta ble . A re gula te d powe r supply is
re c om m e nde d for industria l te m pe ra ture ra nge
pa rts. If gre a te r pre c ision is re quire d, the de vic e
ca n be c locked through the XCLK pin in Ta ble 1.
the AM CAP pin to V
.
CCA
™
Voice Solutions in Silicon
4
ISD4004 Series
SERIAL PERIPHERAL INTERFACE (SPI) DESCRIPTION
The ISD4004 se rie s ope ra te s from a n SPI se ria l inter-
fa ce. The SPI interfa ce opera tes with the following
protoc ol.
re a d inte rrupt da ta a nd sta rt a ne w ope ra -
tion within the sa me SPI c yc le .
8. An ope ra tion be gins with the RUN bit se t
The da ta tra nsfe r protoc ol a ssum e s tha t the m i-
c roc ontrolle r’s SPI shift re giste rs a re c loc ke d on the
fa lling e dge of the SCLK. With the ISD4004, da ta is
c loc ke d in on the MOSI pin on the rising c loc k
e dge . Da ta is c loc ke d out on the MISO pin on the
fa lling c loc k e dge .
a nd e nds with the RUN bit re se t.
9. All ope ra tions be gin with the rising e dge
of SS.
MESSAGE CUEING
1. All se ria l da ta tra nsfe rs be gin with the fa lling
Me ssa ge c ue ing a llows the use r to skip through
m e ssa ge s, without knowing the a c tua l physic a l lo-
c a tion of the m e ssa ge . This ope ra tion is use d dur-
ing pla yba c k. In this m ode , the m e ssa ge s a re
skippe d 1600 tim e s fa ste r tha n in norm a l pla y-
ba c k m ode . It will stop whe n a n EOM m a rke r is
re a c he d. The n, the inte rna l a ddre ss c ounte r will
point to the ne xt m e ssa ge .
e dge of SS pin.
2. SS is held LOW during a ll seria l c ommunica -
tions a nd he ld HIGH be twe e n instruc tions.
3. Da ta is c loc ke d in on the rising c loc k e dge
a nd da ta is c loc ke d out on the fa lling c loc k
e dge .
4. Pla y a nd Re c ord ope ra tions a re initia te d by
e na bling the de vic e by a sse rting the SS pin
LOW, shifting in a n opc ode a nd a n a ddre ss
fie ld to the ISD4004 de vic e (re fe r to the Op-
c ode Sum m a ry on the pa ge 6).
5. The opc ode s a nd a ddre ss fie lds a re a s fol-
lows: < 8 c ontrol bits> a nd < 16 a ddre ss
bits> .
6. Ea c h ope ra tion tha t e nds in a n EOM or
Ove rflow will ge ne ra te a n inte rrupt, inc lud-
ing the Me ssa ge Cue ing c yc le s. The Inte r-
rupt will be c le a re d the ne xt tim e a n SPI
c yc le is initia te d.
7. As Inte rrupt da ta is shifte d out of the
ISD4004 MISO pin, c ontrol a nd a ddre ss
da ta is sim ulta ne ously be ing shifte d into
the MOSI pin. Ca re should be ta ke n suc h
tha t the da ta shifte d in is c om pa tible with
c urre nt syste m ope ra tion. It is possible to
ISD
5
ISD4004 Series
Table 2:Opcode Summary
Opcode <8 bits>
Instruction
Operational Summary
Powe r-Up: De vic e will be re a dy for a n ope ra tion a fte r T
Address <16 bits>
POWERUP
SETPLAY
PLAY
00100XXX
.
PUD
11100XXX < A15–A0>
11110XXX
Initia te s Pla yba c k from a ddre ss < A15–A0> .
Pla yba c k from the c urre nt a ddre ss (until EOM or OVF).
Initia te s a Re c ord ope ra tion from a ddre ss < A15–A0> .
Re c ords from c urre nt a ddre ss until OVF is re a c he d.
Initia te s Me ssa ge Cue ing (MC) from a ddre ss < A15–A0> .
SETREC
REC
10100XXX < A15–A0>
10110XXX
SETMC
MC1
11101XXX < A15–A0>
11111XXX
Pe rform s a Me ssa ge Cue . Proc e e ds to the e nd of the c urre nt
m e ssa ge (EOM) or e nte rs OVF c ondition if no more me ssa ge s a re
pre se nt.
STOP
0X110XXX
Stops c urre nt ope ra tion.
STOPPWRDN 0X01XXXX
Stops c urre nt Ope ra tion a nd e nte rs sta nd-by (powe r-down) m ode .
Re a d Inte rrupt sta tus bits: Ove rflow a nd EOM.
2
RINT
0X110XXX
1. Me ssa g e Cue ing ca n be se le c te d only a t the
2. As the Inte rrup t da ta is shifte d out of the ISD4004,
c ontrol a nd a ddre ss da ta is be ing shifte d in. Ca re
should be ta ke n such tha t the da ta shifte d in is
c om p a tible with curre nt syste m op e ra tion. It is
p ossible to re a d inte rrup t da ta a nd sta rt a ne w
op e ra tion a t the sa m e tim e . Se e Fig ure 5 throug h
Fig ure 8 for Op code form a t.
be g inning of a p la y op e ra tion.
POWER-UP SEQUENCE
The ISD4004 will be re a dy for a n ope ra tion a fte r
Re c ord Mode
T
(25 m s a pproxim a te ly for 8 KHz sa m ple ra te ).
PUD
1. Se nd POWERUP c om m a nd.
The user needs to wa it T before issuing a n opera -
PUD
2. Wa it T (powe r-up de la y).
tiona l c omm a nd. For e xa mple , to pla y from a d-
dre ss 00 the following progra m ing c yc le should be
use d.
PUD
3. Se nd POWERUP c om m a nd.
4. Se nd SETREC c om m a nd with a ddre ss 00.
5. Se nd REC c om m a nd.
Pla yba c k Mode
1. Se nd POWERUP c omm a nd.
The de vic e will sta rt re c ording a t a ddre ss 00 a nd it
will ge ne ra te a n inte rrupt whe n a n ove rflow is
re a c he d (e nd of m e m ory a rra y). It will the n stop re -
c ording.
2. Wa it T (powe r-up de la y).
PUD
3. Se nd SETPLAY c om m a nd with a ddre ss 00.
4. Se nd PLAY c om m a nd.
The de vic e will sta rt pla yba c k a t a ddre ss 00 a nd it
will ge ne ra te a n inte rrupt whe n a n EOM is
re a c he d. It will the n stop pla yba c k.
™
Voice Solutions in Silicon
6
ISD4004 Series
SPI PORT
The following dia gra m de sc ribe s the SPI port a nd the c ontrol bits a ssoc ia te d with it.
Figure 3: SPI Port
SPI CONTROL REGISTER
The SPI c ontrol re giste r provide s c ontrol of individua l de vic e func tions suc h a s Pla y, Re c ord, Me ssa ge
Cue ing, Powe r-Up a nd Powe r-Down, Sta rt a nd Stop ope ra tions, a nd Ignore Addre ss pointe rs.
Table 3: SPI Control Register
Control
Control
Bit
Device Function
Bit
Device Function
Ma ste r powe r c ontrol
Register
Register
RUN
Ena ble or Disa ble a n ope ra tion
PU
=
=
1
0
Sta rt
Stop
=
=
1
0
Powe r-Up
Powe r-Down
P/R
Se le c ts Pla y or Re c ord ope ra tion
IAB
Ignore a ddre ss c ontrol bit
=
=
1
0
Pla y
Re c ord
=
=
1
0
Ignore input a ddress register (A15–A0)
Use the input a ddre ss re giste r c onte nts
for a n ope ra tion (A15–A0)
MC
Ena ble or Disa ble Me ssa ge Cue ing P15–P0
Output of the row pointe r re giste r
Input a ddre ss re giste r
=
=
1
0
Ena ble Me ssa ge Cue ing
Disa ble Me ssa ge Cue ing
A15–A0
ISD
7
ISD4004 Series
Figure 4: SPI Interface Simplified Block Diagram
Table 4:
Absolute Maximum Ratings
Table 5:
Operating Conditions
(Packaged Parts)
(1)
(Packaged Parts)
Condition
Value
Condition
Value
Junc tion te m pe ra ture
150°C
Com m e rc ia l ope ra ting
te m pe ra ture ra nge (1)
0°C to + 70°C
Stora ge te m pe ra ture ra nge
Volta ge a pplie d to a ny pin
–65°C to + 150°C
Exte nde d ope ra ting
te m pe ra ture (1)
–20°C to + 70°C
–40°C to + 85°C
(VSS – 0.3 V) to
(VCC + 0.3 V)
Industria l ope ra ting
te m pe ra ture (1)
Volta ge a pplie d to MOSI, SCLK,
INT, RAC a nd SS pins (input c urre nt 5.5V
limite d to ± 20m A
(VSS – 1.0 V) to
(2)
Supply volta ge (VCC
)
+ 2.7 V to + 3.3 V
0 V
Le a d te m pe ra ture
300°C
Ground volta ge (V )(3)
SS
(solde ring – 10 se c onds)
1. Ca se te m p e ra ture .
VCC – V
–0.3 V to + 7.0 V
SS
2.
3.
V
= V
CCA
= V
CCD.
CC
V
= V
SSA
= V .
SSD
SS
1. Stre sse s a bove those liste d m a y c a use p e rm a ne nt
da m a g e to the de vic e . Exp osure to the a bsolute
m a xim um ra ting s m a y a ffe c t de vic e re lia bility.
Functiona l op e ra tion is not im p lie d a t the se
conditions.
™
Voice Solutions in Silicon
8
ISD4004 Series
Table 6: DC Parameters (Packaged Parts)
Symbol
Parameters
Input Low Volta ge
Min(2)
Typ(1)
Max(2)
Units
Conditions
V
VCC x 0.2
V
IL
V
Input High Volta ge
VCC x 0.8
V
IH
VOL
VOL1
VOH
Output Low Volta ge
0.4
0.4
V
V
V
IOL = 10 µA
IOL = 1 mA
IOH = –10 µA
RAC, INT Output Low Volta ge
Output High Volta ge
VCC – 0.4
ICC
V
Curre nt (Ope ra ting)
CC
— Pla yba c k
— Re c ord
15
25
30
40
m A REXT = ¥(3)
m A REXT = ¥ (3)
(3) (4)
ISB
V
Curre nt (Sta ndby)
1
10
± 1
10
µA
CC
I
Input Le a ka ge Curre nt
µA
µA
KW
KW
KW
IL
IHZ
MISO Trista te Curre nt
1
REXT
Output Loa d Impe da nc e
ANA IN+ Input Re sista nc e
ANA IN– Input Re sista nc e
ANA IN+ or ANA IN– to AUD OUT Ga in
5
2.2
40
RANA IN+
RANA IN–
AARP
3.0
56
25
3.8
71
(5)
dB
1. Typ ica l va lue s: T = 25°C a nd 3.0 V.
A
2. All m in/ m a x lim its a re g ua ra nte e d by ISD via e le c tric a l te sting or c ha ra c te riza tion. Not a ll sp e c ific a tions a re
100 p e rc e nt te ste d.
3.
V
a nd V
c onne c te d tog e the r.
CCA
CCD
4. SS = V
= V
, XCLK = MOSI = V = V
a nd a ll othe r p ins floa ting .
CCA
CCD
SSA
SSD
5. Me a sure d with AutoMute fe a ture disa ble d.
Table 7: AC Parameters (Packaged Parts)
Symbol
Characteristic
Min(2)
Typ(1)
Max(2)
Units
Conditions
(5)
(5)
(5)
(5)
FS
Sa mpling
Fre que nc y
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
8.0
6.4
5.3
4.0
KHz
KHz
KHz
KHz
FCF
Filte r Pa ss Ba nd
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
3.4
2.7
2.3
1.7
KHz 3-dB Roll-Off Point(3) (7)
KHz 3-dB Roll-Off Point(3) (7)
KHz 3-dB Roll-Off Point(3) (7)
KHz 3-dB Roll-Off Point(3) (7)
(6)
T
Re c ord Dura tion
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
8
10
12
16
m in
m in
m in
m in
REC
(6)
(6)
(6)
ISD
9
ISD4004 Series
Table 7: AC Parameters (Packaged Parts)
Symbol
Characteristic
Min(2)
Typ(1)
Max(2)
Units
Conditions
(6)
(6)
(6)
(6)
T
Pla yba c k Dura tion ISD4004-08M
ISD4004-10M
8
10
12
16
m in
m in
m in
m in
PLAY
ISD4004-12M
ISD4004-16M
T
Powe r-Up De la y
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
25
31.25
37.5
50
mse c
mse c
mse c
mse c
PUD
T
STOP or
Stop or Pa use in
Re c ord or Pla y
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
50
62.5
75
mse c
mse c
mse c
mse c
T
PAUSE
100
(10)
(10)
(10)
(10)
T
RAC Cloc k Pe riod
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
200
250
300
400
mse c
mse c
mse c
mse c
RAC
T
RAC Cloc k Low
Time
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
25
31.25
37.5
50
mse c
mse c
mse c
mse c
RACLO
T
RAC Cloc k Pe riod
in Me ssa ge
Cue ing Mode
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
125
156.3
187.5
250
µse c
µse c
µse c
µse c
RACM
T
RAC Cloc k Low
Time in Me ssa ge
Cue ing Mode
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
15.63
19.53
23.44
31.25
µse c
µse c
µse c
µse c
RACML
THD
Tota l Ha rm onic Distortion
ANA IN Input Volta ge
1
2
%
@ 1 KHz
V
32
m V Pe a k-to-Pe a k(4) (8) (9)
IN
1. Typ ica l va lue s: T = 25°C a nd 3.0 V.
A
2. All m in/ m a x lim its a re g ua ra nte e d by ISD via e le ctric a l te sting or c ha ra c te riza tion. Not a ll sp e c ific a tions a re 100 p e rc e nt
te ste d.
3. Low-fre q ue ncy c ut off de p e nds up on the va lue of e xte rna l ca p a citors (se e Pin De scrip tions).
4. Sing le -e nde d inp ut m ode . In the diffe re ntia l inp ut m ode , V m a xim um for ANA IN+ a nd ANA IN– is 16m Vp -p .
IN
5. Sa m p ling Fre q ue ncy c a n va ry a s m uch a s ± 2.25 p e rc e nt ove r the c om m e rc ia l te m p e ra ture , a nd volta g e ra ng e s,
a nd –6/ + 4 p e rce nt ove r the e xte nde d te m p e ra ture , industria l te m p e ra ture a nd volta g e ra ng e s. For g re a te r
sta bility, a n e xte rna l cloc k c a n be utilize d (se e Pin De sc rip tions).
6. Pla yba ck a nd Re c ord Dura tion ca n va ry a s m uc h a s ± 2.25 p e rc e nt ove r the com m e rcia l te m p e ra ture a nd volta g e
ra ng e s, a nd –6/ + 4 p e rc e nt ove r the e xte nde d te m p e ra ture , industria l te m p e ra ture a nd volta g e ra ng e s. For
g re a te r sta bility, a n e xte rna l c loc k c a n be utilize d (se e Pin De scrip tions).
7. Filte r sp e c ific a tion a p p lie s to the a ntia lia sing filte r a nd the sm oothing filte r. The re fore , from inp ut to outp ut, e xp e ct a
6dB drop by na ture of p a ssing throug h both filte rs.
8. The typ ica l outp ut volta g e will be a p p roxim a te ly 570m Vp -p with V a t 32m Vp -p .
IN
9. For op tim a l sig na l q ua lity, this m a xim um lim it is re com m e nde d.
10. Whe n a re c ord c om m a nd is se nt, T
= T
+ T
on the first row a ddre sse d.
RAC
RAC
RACLO
™
Voice Solutions in Silicon
10
ISD4004 Series
(1)
Table 8: Absolute Maximum Ratings (Die)
Table 9:
Operating Conditions (Die)
Condition
Value
150°C
Condition
Value
Junc tion te m pe ra ture
Com m e rc ia l ope ra ting
te m pe ra ture ra nge
0°C to + 50°C
Stora ge te m pe ra ture ra nge
Volta ge a pplie d to a ny pa d
–65°C to + 150°C
(1)
Supply volta ge (VCC
)
+ 2.7 V to + 3.3 V
0 V
(VSS – 0.3 V) to
(VCC + 0.3 V)
Ground volta ge (V )(2)
SS
Volta ge a pplie d to MOSI, SCLK, INT, (VSS – 1.0 V) to
1.
2.
V
= V
CCA
= V
CCD
RAC a nd SS pins (input c urre nt
lim ite d to ± 20m A
5.5 V
CC
V
= V
SSA
= V .
SSD
SS
VCC – V
–0.3 V to + 7.0 V
SS
1. Stre sse s a bove those liste d m a y ca use p e rm a ne nt
da m a g e to the de vic e . Exp osure to the a bsolute
m a xim um ra ting s m a y a ffe c t de vic e re lia bility.
Functiona l op e ra tion is not im p lie d a t the se conditions.
Table 10: DC Parameters (Die)
Symbol
Parameters
Input Low Volta ge
Min(2)
Typ(1)
Max(2)
Units
Conditions
V
V
x 0.2
V
V
IL
CC
V
Input High Volta ge
VCC x 0.8
IH
VOL
VOL1
VOH
Output Low Volta ge
0.4
0.4
V
V
V
IOL = 10 µA
IOL = 1 m A
IOH = –10 µA
RAC, INT Output Low Volta ge
Output High Volta ge
V
– 0.4
CC
ICC
V
Curre nt (Ope ra ting)
CC
— Pla yba c k
— Re c ord
15
25
30
40
mA REXT = ¥ (3)
mA REXT = ¥ (3)
(3) (4)
ISB
V
Curre nt (Sta ndby)
1
10
± 1
10
µA
CC
I
Input Le a ka ge Curre nt
MISO Trista te Curre nt
µA
µA
IL
IHZ
1
REXT
Output Loa d Impe da nc e
5
2.2
40
KW
KW
KW
RANA IN+ ANA IN+ Input Re sista nc e
RANA IN– ANA IN– Input Re sista nc e
3.0
56
25
3.8
71
(5)
AARP
ANA IN+ or ANA IN– to AUDOUT Ga in
dB
1. Typ ica l va lue s: T = 25°C a nd 3.0 V.
A
2. All m in/ m a x lim its a re g ua ra nte e d by ISD via e le c tric a l te sting or c ha ra c te riza tion. Not a ll sp e c ific a tions a re
100 p e rc e nt te ste d.
3.
V
a nd V
c onne c te d tog e the r.
CCA
CCD
4. SS = V
= V
, XCLK = MOSI = V
= V
a nd a ll othe r p ins floa ting .
CCA
CCD
SSA
SSD
5. Me a sure d with AutoMute fe a ture disa ble d.
ISD
11
ISD4004 Series
Table 11: AC Parameters (Die)
Symbol
Characteristic
Min(2)
Typ(1)
Max(2)
Units
Conditions
(5)
(5)
(5)
(5)
FS
Sa mpling
Fre que nc y
ISD4004-08M
8.0
6.4
5.3
4.0
KHz
KHz
KHz
KHz
ISD4004-10M
ISD4004-12M
ISD4004-16M
FCF
Filte r Pa ss Ba nd
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
3.4
2.7
2.3
1.7
KHz 3dB Roll-Off Point (3) (6)
KHz 3dB Roll-Off Point (3) (6)
KHz 3dB Roll-Off Point (3) (6)
KHz 3dB Roll-Off Point (3) (6)
(5)
T
Re c ord Dura tion
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
8
10
12
16
min
min
min
min
REC
(5)
(5)
(5))
(5)
T
Pla yba c k Dura tion ISD4004-08M
ISD4004-10M
8
10
12
16
min
min
min
min
PLAY
(5)
(5)
ISD4004-12M
ISD4004-16M
(5)
T
Powe r-Up De la y
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
25
31.25
37.5
50
m se c
PUD
m se c
m se c
m se c
T
STOP or
Stop or Pa use in
Re c ord or Pla y
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
50
62.5
75
m se c
m se c
m se c
m se c
T
PAUSE
100
(9)
(9)
(9)
(9)
T
RAC Cloc k Pe riod ISD4004-08M
ISD4004-10M
200
250
300
400
m se c
m se c
m se c
m se c
RAC
ISD4004-12M
ISD4004-16M
T
RAC Cloc k Low
Time
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
25
31.25
37.5
50
m se c
m se c
m se c
m se c
RACLO
T
RAC Cloc k Pe riod ISD4004-08M
125
156.3
187.5
250
mse c
mse c
mse c
mse c
RACM
in Me ssa ge
ISD4004-10M
ISD4004-12M
ISD4004-16M
Cue ing Mode
T
RAC Cloc k Low
Time in Me ssa ge
Cue ing Mode
ISD4004-08M
ISD4004-10M
ISD4004-12M
ISD4004-16M
15.63
19.53
23.44
31.25
mse c
mse c
mse c
mse c
RACML
™
Voice Solutions in Silicon
12
ISD4004 Series
Table 11: AC Parameters (Die)
Symbol
Characteristic
Min(2)
Typ(1)
Max(2)
Units
Conditions
@ 1 KHz
THD
Tota l Ha rm onic Distortion
ANA IN Input Volta ge
1
2
%
(4) (7) (8)
V
32
m V Pe a k-to-Pe a k
IN
1. Typ ica l va lue s: T = 25°C a nd 3.0 V.
A
2. All m in/ m a x lim its a re g ua ra nte e d by ISD via e le ctric a l te sting or cha ra c te riza tion. Not a ll sp e c ific a tions a re 100
p e rc e nt te ste d.
3. Low-fre q ue ncy c ut off de p e nds up on the va lue of e xte rna l ca p a citors (se e Pin De scrip tions).
4. Sing le -e nde d inp ut m ode . In the diffe re ntia l inp ut m ode , V m a xim um for ANA IN+ a nd ANA IN– is 16 m V p e a k-
IN
to-p e a k.
5. Sa m p ling Fre q ue nc y a nd Dura tion ca n va ry a s m uch a s ± 2.25 p e rce nt ove r the com m e rcia l te m p e ra ture a nd
volta g e ra ng e s. For g re a te r sta bility, a n e xte rna l clock ca n be utilize d (se e Pin De sc rip tions).
6. Filte r sp e cific a tion a p p lie s to the a ntia lia sing filte r a nd to the sm oothing filte r.
7. The typ ica l outp ut volta g e will be a p p roxim a te ly 570 m V p e a k-to-p e a k with V a t 32 m V p e a k-to-p e a k.
IN
8. For op tim a l sig na l q ua lity, this m a xim um lim it is re com m e nde d.
9. Whe n a re c ord c om m a nd is se nt, T
= T
+ T on the first row a ddre sse d.
RACLO
RAC
RAC
1
Table 12: SPI AC Parameters
Symbol
Characteristics
Min
Max
Units
nse c
Conditions
T
SS Se tup Time
500
500
200
200
SSS
T
SS Hold Time
nse c
nse c
nse c
nse c
nse c
mse c
nse c
nse c
KHz
SSH
T
Da ta in Se tup Tim e
Da ta in Hold Time
Output De la y
Output De la y to hiZ
SS HIGH
DIS
T
DIH
T
500
500
PD
(2)
T
DF
T
1
400
400
SSmin
T
SCLK High Time
SCLK Low Tim e
CLK Fre que nc y
SCKhi
T
SCKlow
F0
1,000
1. Typ ica l va lue s: T = 25°C a nd 3.0 V. Tim ing m e a sure d a t 50 p e rc e nt of the V
le ve l.
A
CC
2. Trista te te st condition.
ISD
13
ISD4004 Series
TIMING DIAGRAMS
Figure 5: Timing Diagram
Figure 6: 8-Bit Command Format
™
Voice Solutions in Silicon
14
ISD4004 Series
Figure 7: 24-Bit Command Format
SS
BYTE 1
BYTE 2
BYTE 3
SCLK
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9 A10 A11 A12 A13 A14 A15
X
X
X
C0
C1
C2
X
C3
C4
X
MOSI
MISO
P11
OVF
EOM
P0
P1
P2
P3
P4
P5
P6
P7
P8
P9
P10
P12 P13 P14 P15
P16
X
X
X
Figure 8: Playback/Record and Stop Cycle
ISD
15
ISD4004 Series
(1)
Figure 9: Application Example Using SPI
1. This a p p lic a tion e xa m p le is for illustra tion p urp ose s only. ISD m a ke s no re p re se nta tion or wa rra nty tha t such
a p p lic a tion will be suita ble for p roduction.
2. Ple a se m a ke sure the byp a ss c a p a c itor, C2 is a s close a s p ossible to the p a c ka g e .
™
Voice Solutions in Silicon
16
ISD4004 Series
(1)
Figure 10: Application Example Using Microwire
1. This a p p lica tion e xa m p le is for illustra tion p urp ose s only. ISD m a ke s no re p re se nta tion or wa rra nty tha t such
a p p lic a tion will be suita ble for p roduction.
2. Ple a se m a ke sure the byp a ss c a p a c itor, C2 is a s close a s p ossible to the p a c ka g e .
(1)
Figure 11: Application Example Using SPI Port on Microcontroller
1. This a p p lica tion e xa m p le is for illustra tion p urp ose s only. ISD m a ke s no re p re se nta tion or wa rra nty tha t such
a p p lic a tion will be suita ble for p roduction.
2. Ple a se m a ke sure the byp a ss c a p a c itor, C2 is a s close a s p ossible to the p a c ka g e .
ISD
17
ISD4004 Series
DEVICE PHYSICAL DIMENSIONS
Figure 12: 28-Lead 8x13.4 mm Plastic Thin Small Outline Package (TSOP) Type I (E)
Table 13: Plastic Thin Small Outline Package (TSOP) Type I (E) Dimensions
INCHES
Nom
MILLIMETERS
Nom
Min
Max
Min
Max
A
B
C
D
E
F
0.520
0.461
0.311
0.002
0.007
0.528
0.465
0.315
0.535
0.469
0.319
0.006
0.011
13.20
11.70
7.90
13.40
11.80
8.00
13.60
11.90
8.10
0.05
0.15
0.009
0.0217
0.039
3°
0.17
0.22
0.55
1.00
3°
0.27
G
H
I
0.037
0°
0.041
6°
0.95
0°
1.05
6°
0.020
0.004
0.022
0.028
0.008
0.50
0.10
0.55
0.70
0.21
J
NOTE:
Le a d c op la na rity to be within 0.004 inc he s.
™
Voice Solutions in Silicon
18
ISD4004 Series
Figure 13: 28-Lead 0.600-Inch Plastic Dual Inline Package (PDIP) (P)
Table 14: Plastic Dual Inline Package (PDIP) (P) Dimensions
INCHES
Nom
MILLIMETERS
Nom
Min
Max
Min
Max
A
B1
B2
C1
C2
D
1.445
1.450
0.150
0.070
1.455
36.70
36.83
3.81
1.78
36.96
0.065
0.600
0.530
0.075
0.625
0.550
0.19
1.65
15.24
13.46
1.91
15.88
13.97
4.83
0.540
13.72
D1
E
0.015
0.125
0.015
0.055
0.38
3.18
0.38
1.40
0.135
0.022
0.065
3.43
0.56
1.65
F
0.018
0.060
0.100
0.010
0.075
0.46
1.52
2.54
0.25
1.91
G
H
J
0.008
0.070
0°
0.012
0.080
15°
0.20
1.78
0°
0.30
2.03
15°
S
q
ISD
19
ISD4004 Series
Figure 14: 28-Lead 0.300-Inch Plastic Small Outline Integrated Circuit (SOIC) (S)
Table 15: Plastic Small Outline Integrated Circuit (SOIC) (S) Dimensions
INCHES
Nom
MILLIMETERS
Nom
Min
Max
Min
Max
A
B
C
D
E
0.701
0.097
0.292
0.005
0.014
0.706
0.101
0.296
0.009
0.016
0.050
0.406
0.032
0.711
0.104
0.299
0.0115
0.019
17.81
2.46
17.93
2.56
7.52
0.22
0.41
1.27
10.31
0.81
18.06
2.64
7.59
0.29
0.48
7.42
0.127
0.35
F
G
H
0.400
0.024
0.410
0.040
10.16
0.61
10.41
1.02
NOTE:
Le a d c op la na rity to be within 0.004 inc he s.
™
Voice Solutions in Silicon
20
ISD4004 Series
1
Figure 15: ISD4004 Series Bonding Physical Layout (Unpackaged Die)
MOSI SCLK
V
INT
CCD2
ISD4004 Se rie s
V
MISO
SS VCCD1 XCLK
RAC
SSD2
I. Die Dim e nsions
X: 4230 m ic rons
Y: 9780 m ic rons
V
V
SSA
SSD1
(3)
II. Die Thic kne ss
11.5 ± 0.5 m ils
III. Pa d Ope ning (m in)
90 x 90 m ic rons
ISD4004
3.5 x 3.5 m ils
(2)
SSA
(2)
ANA IN–
V
V
AUD OUT
AM CAP
CCA
V
ANA IN+
SSA
1. The ba c kside of die is inte rna lly conne c te d to V . It MUST NOT be c onne cte d to a ny othe r p ote ntia l or da m a g e
SS
m a y oc c ur.
2. Double bond re c om m e nde d.
3. This fig ure re fle c ts the c urre nt die thickne ss. Ple a se conta ct ISD a s this thic kne ss m a y c ha ng e in the future .
ISD
21
ISD4004 Series
Table 16: ISD4004 Series Device Pin/Pad Designations,
with Respect to Die Center (µm)
Pin
Pin Name
SS Ana log Powe r Supply
SS Ana log Powe r Supply
X Axis
–1898.1
Y Axis
–4622.4
V
V
SSA
V
V
–1599.9
281.9
–4622.4
–4622.4
–4622.4
–4622.4
–4622.4
–4622.4
–4622.4
4623.7
4623.7
4623.7
4623.7
4623.7
4623.7
4623.7
4623.7
4623.7
4623.7
4623.7
SSA
AUD OUT
AM CAP
ANA IN –
Audio Output
AutoMute
577.3
Inve rting Ana log Input
1449.4
1603.5
1898.7
1885.2
1483.8
794.8
ANA IN +
Noninve rting Ana log Input
(1)
V
V
Ana log Powe r Supply
CCA
CC
V
V
SS Ana log Powe r Supply
Row Addre ss Cloc k
Inte rrupt
SSA
RAC
INT
XCLK
Exte rna l Cloc k Input
564.8
V
V
Digita l Powe r Supply
Digita l Powe r Supply
CC
387.9
CCD2
CC
V
V
169.5
CCD1
SCLK
SS
Sla ve Cloc k
–14.7
Sla ve Se le c t
–198.1
–1063.7
–1325.6
–1655.3
–1836.9
MOSI
MISO
Ma ste r Out Sla ve In
Ma ste r In Sla ve Out
V
VSS Digita l Powe r Supply
SSD1
V
VSS Digita l Powe r Supply
SSD2
1. Double bond re c om m e nde d.
™
Voice Solutions in Silicon
22
ISD4004 Series
ORDERING INFORMATION
Pro d uc t Numb e r De sc rip to r Ke y
ISD4004– _ _ _ _ _
Spe c ia l Te mpe ra ture Fie ld:
Bla nk= Com m e rc ia l Pa c ka ge d (0°C to + 70°C)
Produc t Fa mily
ISD4000 Fa m ily
or
=
Com me rc ia l Die (0°C to + 50°C)
Exte nde d (–20°C to + 70°C)
Industria l (–40°C to + 85°C)
Produc t Se rie s
D
I
04 =
Fourth Se rie s (8–16 min)
=
Pa c ka ge Type :
Dura tion:
E
P
S
X
=
=
=
=
28-Le a d 8x13.4mm Pla stic Thin Sm a ll Outline
Pa c ka ge (TSOP) Type 1
08M= 8 minute s
10M= 10 minute s
12M= 12 minute s
16M= 16 minute s
28-Le a d 0.600-Inc h Pla stic Dua l Inline Pa c ka ge
(PDIP)
28-Le a d 0.300-Inc h Pla stic Sma ll Outline Pa c ka ge
(SOIC)
Die
Whe n orde ring ISD4004 se rie s de vic e s, ple a se re fe r to the following va lid pa rt num be rs.
Part Number
Part Number
Part Number
Part Number
ISD4004-08ME
ISD4004-08MED
ISD4004-08MEI
ISD4004-08MP
ISD4004-08MS
ISD4004-08MSI
ISD4004-08MX
ISD4004-10ME
ISD4004-10MED
ISD4004-10MEI
ISD4004-10MP
ISD4004-10MS
ISD4004-10MSI
ISD4004-10MX
ISD4004-12ME
ISD4004-12MED
ISD4004-12MEI
ISD4004-12MP
ISD4004-12MS
ISD4004-12MSI
ISD4004-12MX
ISD4004-16ME
ISD4004-16MED
ISD4004-16MEI
ISD4004-16MP
ISD4004-16MS
ISD4004-16MSI
ISD4004-16MX
For the la te st produc t inform a tion, a c c e ss ISD’s worldwide we bsite a t http://www.isd.c om .
ISD
23
IMPORTANT NOTICES
The warranty for each product of ISD (Information Storage
Devices, Inc.), is contained in a written warranty which governs
sale and use of such product. Such warranty is contained in the
printed terms and conditions under which such product is sold, or
in a separate written warranty supplied with the product. Please
refer to such written warranty with respect to its applicability to
certain applications of such product.
These products may be subject to restrictions on use. Please
contact ISD, for a list of the current additional restrictions on
these products. By purchasing these products, the purchaser of
these products agrees to comply with such use restrictions. Please
contact ISD for clarification of any restrictions described herein.
ISD, reserves the right, without further notice, to change the ISD
ChipCorder product specifications and/or information in this
document and to improve reliability, functions and design.
ISD assumes no responsibility or liability for any use of the ISD
ChipCorder products. ISD conveys no license or title, either
expressed or implied, under any patent, copyright, or mask work
right to the ISD ChipCorder products, and ISD makes no
warranties or representations that the ISD ChipCorder products are
free from patent, copyright, or mask work right infringement,
unless otherwise specified.
The 100-year retention and 100K record cycle projections are
based upon accelerated reliability tests, as published in the ISD
Reliability Report, and are neither warranted nor guaranteed by
ISD.
Information contained in this ISD ChipCorder data sheet
supersedes all data for the ISD ChipCorder products published
by ISD prior to September, 1998.
This data sheet and any future addendum to this data sheet is
(are) the complete and controlling ISD ChipCorder product
specifications. In the event any inconsistencies exist between the
information in this and other product documentation, or in the
event that other product documentation contains information in
addition to the information in this, the information contained
herein supersedes and governs such other information in its entirety.
Copyright© 1998, ISD (Information Storage Devices, Inc.) All rights
reserved. ISD is a registered trademark of ISD. ChipCorder is a
trademark of ISD. All other trademarks are properties of their
respective owners.
Application examples and alternative uses of any integrated
circuit contained in this publication are for illustration purposes
only and ISD makes no representation or warranty that such
applications shall be suitable for the use specified.
2727 North First Street
San Jose, California 95134
Tel: 408/943-6666
Fax: 408/544-1787
Part No. 2200998D4004
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