WS512K16-17DLC [WEDC]

512Kx16 SRAM MODULE; 512Kx16 SRAM模块
WS512K16-17DLC
型号: WS512K16-17DLC
厂家: WHITE ELECTRONIC DESIGNS CORPORATION    WHITE ELECTRONIC DESIGNS CORPORATION
描述:

512Kx16 SRAM MODULE
512Kx16 SRAM模块

存储 内存集成电路 静态存储器 输出元件 输入元件 CD
文件: 总6页 (文件大小:322K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
WS512K16-XXX  
White Electronic Designs  
ADVANCED*  
512Kx16 SRAM MODULE  
FEATURES  
Data I/O Compatible with 3.3V devices  
Access Times 17, 20, 25, 35ns  
2V Minimum Data Retention for battery back up  
operation  
MIL-STD-883 Compliant Devices Available  
Packaging  
Commercial, Industrial and Military Temperature  
Range  
• 44 pin Ceramic SOJ (Package 102)  
• 44 lead Ceramic Flatpack (Package 209)  
Organized as two banks of 256Kx16  
Data Byte Control:  
5 Volt Power Supply (3.3V parts also available)  
Low Power CMOS  
TTL Compatible Inputs and Outputs  
Lower Byte (LB#) = I/O1-8  
Upper Byte (UB#) = I/O9-16  
* This product is under development, is not qualified or characterized and is subject to  
change or cancellation without notice.  
PIN CONFIGURATION FOR WS512K16-XXX  
Pin Description  
44 CSOJ  
A0-17  
LB#  
UB#  
I/O1-16  
CS1-2#  
OE#  
WE#  
VCC  
Address Inputs  
Lower-Byte Control (I/O1-8)  
Upper-Byte Control (I/O9-16)  
Data Input/Output  
Chip Select  
44 FLATPACK  
Top View  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
1
2
3
4
5
6
7
8
A0  
A1  
A2  
A3  
A4  
A17  
A16  
A15  
Output Enable  
Write Enable  
+5.0V Power  
Ground  
OE#  
UB#  
LB#  
I/O16  
I/O15  
I/O14  
I/O13  
GND  
VCC  
I/O12  
I/O11  
I/O10  
I/O9  
CS2#  
A14  
CS1#  
I/O1  
I/O2  
I/O3  
I/O4  
VCC  
GND  
I/O5  
I/O6  
I/O7  
I/O8  
WE#  
A5  
GND  
NC  
No Connection  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
Block Diagram  
A
0-17  
WE#  
OE#  
UB#  
LB#  
A6  
A7  
A8  
A9  
A13  
A12  
A11  
A10  
256K x 16  
256K x 16  
CS1#  
CS2#  
I/O1-16  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
April 1998  
1
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WS512K16-XXX  
White Electronic Designs  
ADVANCED  
TRUTH TABLE  
CS1# CS2# WE#  
OE#  
X
LB#  
X
UB#  
X
Mode  
Not Select  
Data I/O  
Power  
Standby  
H
L
H
H
H
L
X
I/O1-8  
High Z  
I/O9-16  
H
H
X
X
X
Output Disable  
High Z  
Active  
L
H
H
H
L
L
X
H
H
H
L
H
L
L
H
L
H
L
L
H
L
L
Data Out  
High Z  
Data Out  
Data In  
High Z  
High Z  
Data Out  
Data Out  
High Z  
Data In  
Data In  
L
Read  
Write  
Active  
Active  
L
H
L
H
L
L
H
H
Data In  
ABSOLUTE MAXIMUM RATINGS  
RECOMMENDED OPERATING CONDITIONS  
Parameter  
Symbol  
TA  
TSTG  
VG  
TJ  
VCC  
Min  
-55  
-65  
-0.5  
Max  
+125  
+150  
VCC+0.5  
150  
Unit  
°C  
°C  
V
°C  
V
Parameter  
Supply Voltage  
Input High Voltage  
Input Low Voltage  
Opertating Temp. (MIL)  
Symbol  
VCC  
VIH  
VIL  
TA  
Min  
4.5  
2.2  
-0.3  
-55  
Max  
5.5  
VCC + 0.3  
+0.8  
Unit  
V
V
V
°C  
Operating Temperature  
Storage Temperature  
Signal Voltage Relative to GND  
Junction Temperature  
Supply Voltage  
+125  
-0.5  
7.0  
CAPACITANCE  
TA = +25°C  
Parameter  
Input capacitance  
Output capacitance  
Symbol  
Conditions  
Max Unit  
CIN  
VIN = 0V, f = 1.0 MHz 25 pF  
COUT VOUT = 0V, f = 1.0 MHz 25 pF  
This parameter is guaranteed by design but not tested.  
DC CHARACTERISTICS  
VCC = 5.0V, VSS = 0V, -55°C TA +125°C  
Parameter  
Sym  
ILI  
ILO  
ICC  
ISB  
Conditions  
Min  
Max  
10  
10  
290  
30  
0.4  
Units  
µA  
µA  
mA  
mA  
V
Input Leakage Current  
Output Leakage Current  
Operating Supply Current  
Standby Current  
VCC = 5.5, VIN = GND to VCC  
CS# = VIH, OE# = VIH, VOUT = GND to VCC  
CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5  
CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5  
IOL = 8mA, VCC = 4.5  
Output Low Voltage  
Output High Voltage  
VOL  
VOH  
IOH = -4.0mA, VCC = 4.5  
2.4  
V
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V  
DATA RETENTION CHARACTERISTICS  
-55°C TA +125°C  
Characteristic  
Data Retention Supply Voltage  
Data Retention Current  
Sym  
VDR  
ICCDR1  
Conditions  
CS# ≥ VCC -0.2V  
VCC = 3V  
Min  
2.0  
Typ  
Max  
5.5  
12.0*  
Units  
µA  
mA  
2.0  
* Also available in Low Power version. Please call factory for informaion.  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
April 1998  
2
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WS512K16-XXX  
White Electronic Designs  
ADVANCED  
AC CHARACTERISTICS  
VCC = 5.0V, GND = 0V, -55°C TA +125°C  
Parameter  
Read Cycle  
Symbol  
-17  
-20  
-25  
-35  
Units  
Min  
Max  
Min  
Max  
Min  
Max  
Min  
Max  
Read Cycle Time  
Address Access Time  
Output Hold from Address Change  
Chip Select Access Time  
Output Enable to Output Valid  
Chip Select to Output in Low Z  
Output Enable to Output in Low Z  
Chip Disable to Output in High Z  
Output Disable to Output in High Z  
LB#, UB# Access Time  
tRC  
tAA  
17  
20  
25  
35  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
17  
20  
25  
35  
tOH  
tACS  
tOE  
0
0
0
0
17  
10  
20  
12  
25  
15  
35  
20  
1
tCLZ  
2
0
5
0
5
0
5
0
1
tOLZ  
1
tCHZ  
tOHZ  
tBA  
tBLZ1  
9
9
10  
10  
10  
12  
12  
12  
14  
15  
15  
17  
1
LB#, UB# Enable to Low Z Output  
LB#, UB# Disable to High Z Output  
0
0
0
0
tBHZ1  
9
10  
12  
15  
1. This parameter is guaranteed by design but not tested.  
AC CHARACTERISTICS  
VCC = 5.0V, GND = 0V, -55°C TA +125°C  
Parameter  
Symbol  
-17  
-20  
-25  
-35  
Units  
Write Cycle  
Min  
17  
14  
14  
10  
14  
0
Max  
Min  
20  
17  
17  
12  
17  
0
Max  
Min  
25  
20  
20  
15  
20  
0
Max  
Min  
35  
25  
25  
20  
25  
0
Max  
Write Cycle Time  
tWC  
tCW  
tAW  
tDW  
tWP  
tAS  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip Select to End of Write  
Address Valid to End of Write  
Data Valid to End of Write  
Write Pulse Width  
Address Setup Time  
Address Hold Time  
Output Active from End of Write  
Write Enable to Output in High Z  
Data Hold Time  
tAH  
0
0
0
0
0
0
0
0
1
tOW  
1
tWHZ  
9
10  
10  
15  
tDH  
tBW  
0
14  
0
17  
0
20  
0
25  
LB#, UB# Valid to End of Write  
1. This parameter is guaranteed by design but not tested.  
AC TEST CIRCUIT  
AC Test Conditions  
IOL  
Parameter  
Input Pulse Levels  
Input Rise and Fall  
Input and Output Reference Level  
Output Timing Reference Level  
Notes:  
Typ  
Unit  
V
ns  
V
Current Source  
VIL = 0, VIH = 3.0  
5
1.5  
1.5  
V
VZ 1.5V  
(Bipolar Supply)  
D.U.T.  
Ceff = 50 pf  
V
Z is programmable from -2V to +7V.  
OL & IOH programmable from 0 to 16mA.  
Tester Impedance Z0 = 75Ω.  
Z is typically the midpoint of VOH and VOL  
OL & IOH are adjusted to simulate a typical resistive load circuit.  
ATE tester includes jig capacitance.  
I
V
.
IOH  
I
Current Source  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
April 1998  
3
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WS512K16-XXX  
White Electronic Designs  
ADVANCED  
TIMING WAVEFORM – READ CYCLE  
tRC  
ADDRESS  
CS#  
tAA  
tCHZ  
tACS  
LB#, UB#  
tBHZ  
tBA  
tBLZ  
tCLZ  
OE#  
tOE  
tOLZ  
tOHZ  
DATA I/O  
DATA VALID  
HIGH IMPEDANCE  
READ CYCLE 1, (CS# = OE# = VIL, UB# or LB# = VIL, WE# = VIH  
)
READ CYCLE 2 (WE# = VIH  
)
WRITE CYCLE – WE# CONTROLLED  
tWC  
ADDRESS  
tAW  
tAH  
tCW  
CS#  
tBW  
LB#, UB#  
tAS  
tWP  
WE#  
tOW  
tDH  
tWHZ  
tDW  
DATA I/O  
DATA VALID  
WRITE CYCLE 1, WE# CONTROLLED  
WRITE CYCLE – CS# CONTROLLED  
WRITE CYCLE – LB#, UB# CONTROLLED  
tWC  
tWC  
ADDRESS  
ADDRESS  
tAW  
tAW  
tAH  
tAH  
tAS  
tAS  
tCW  
tCW  
CS#  
LB#, UB#  
WE#  
CS#  
LB#, UB#  
WE#  
tBW  
tBW  
tWP  
tWP  
tDW  
tDH  
tDW  
tDH  
DATA I/O  
DATA I/O  
DATA VALID  
DATA VALID  
WRITE CYCLE 3, LB#, UB# CONTROLLED  
WRITE CYCLE 2, CS# CONTROLLED  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
April 1998  
4
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WS512K16-XXX  
White Electronic Designs  
ADVANCED  
PACKAGE 102: 44 LEAD, CERAMIC SOJ  
28.70 (1.13) 0.25 (0.010)  
3.96 (0.156) MAX  
0.89 (0.035)  
Radius TYP  
0.2 (0.008)  
0.05 (0.002)  
9.55 (0.376)  
0.25 (0.010)  
11.3 (0.446)  
0.2 (0.009)  
1.27 (0.050)  
0.25 (0.010)  
PIN 1 IDENTIFIER  
1.27 (0.050) TYP  
26.7 (1.050) TYP  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
PACKAGE 209: 44 LEAD, CERAMIC FLAT PACK  
28.45 (1.120)  
0.26 (0.010)  
PIN 1  
3.18 (0.125)  
MAX  
IDENTIFIER  
12.95 (0.510)  
0.13 (0.005)  
9.90 (0.390)  
0.13 (0.005)  
10.16 (0.400)  
0.51 (0.020)  
0.43 (0.017)  
0.05 (0.002)  
1.27 (0.050) TYP  
0.13 (0.005)  
0.05 (0.002)  
26.67 (1.050) TYP  
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
April 1998  
5
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  
WS512K16-XXX  
White Electronic Designs  
ADVANCED  
ORDERING INFORMATION  
W S 512K16 - XX X X X  
LEAD FINISH:  
Blank = Gold plated leads  
A = Solder dip leads  
DEVICE GRADE:  
M = Military Screened  
I = Industrial  
-55°C to +125°C  
-40°C to +85°C  
0°C to +70°C  
C = Commercial  
PACKAGE TYPE:  
DL = 44 Lead Ceramic SOJ (Package 102)  
FL = 44 Lead Ceramic Flatpack (Package 209)  
ACCESS TIME (ns)  
ORGANIZATION, two banks of 256Kx16  
SRAM  
WHITE ELECTRONIC DESIGNS CORPORATION  
White Electronic Designs Corp. reserves the right to change products or specifications without notice.  
April 1998  
6
White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com  

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