VSC7969WD-1A [VITESSE]

Telecom Circuit, 1-Func, TO-46, 4 PIN;
VSC7969WD-1A
型号: VSC7969WD-1A
厂家: VITESSE SEMICONDUCTOR CORPORATION    VITESSE SEMICONDUCTOR CORPORATION
描述:

Telecom Circuit, 1-Func, TO-46, 4 PIN

电信 电信集成电路
文件: 总12页 (文件大小:143K)
中文:  中文翻译
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Advance Product Information  
Subject to Change  
VSC7969  
Data Sheet  
3.125Gb/s Integrated Transimpedance and Limiting Amplifier with Signal Detect  
FEATURES  
APPLICATIONS  
Integrated TIA and Limiting Amplifier  
Low Power Consumption for SFF Applications  
TO Package-Compatible Layout  
2.488Gb/s, 3.125Gb/s SONET OC-48/SDH STM-16  
2.125Gb/s Fibre Channel  
2.5Gb/s or 3.125Gb/s Ethernet Applications with  
On-Chip Signal Detect  
8B/10B Overhead  
On-Chip Linear Photocurrent Monitor  
Single 3.3V Supply  
SFF Transceivers  
5V Supply Operation via Wirebond Option  
Compatible with PIN or Avalanche Detectors  
Packages: Bare Die and TO-46 (with photodetector)  
GENERAL DESCRIPTION  
The VSC7969 is a 3.125Gb/s transimpedance amplifier IC with a built-in limiting amplifier, a signal detect feature  
and a photocurrent monitor. The VSC7969 does not require any external electrical components in the construction of  
a high performance optical receiver such as for SONET/SDH applications. The analog output is a differential signal  
with a minimum amplitude of 200mVp-p (single-ended). The VSC7969 operates with a single power supply with a  
maximum power dissipation of 300mW. A PIN photodiode or Avalanche Photodetector (APD) can be connected and  
separately biased to provide optimal performance.  
The VSC7969 provides filtered bias for MSM and PIN photodetectors; applications using an APD must supply bias  
separately. The VSC7969 also provides a photocurrent monitor whose output is linearly proportional to the input  
photocurrent.  
The VSC7969 can operate from a single +3.3V or +5V supply. The VSC7969 is offered in die form and a fully tested  
TO-46 outline packaged receiver with a photodetector.  
VSC7969 Block Diagram  
Dual power supply pins are  
provided for +5V or +3.3V  
VCCS  
500  
operation. Only one power  
supply pin should be connected.  
Filter  
+3.3V  
+5V  
Regulator  
VCCD  
GND  
+3.3V  
10pF  
Outputs need to  
be AC-coupled  
50Ω  
50Ω  
VOUTP  
VOUTN  
In  
0.1µF  
0.1µF  
Signal  
Detect  
SD_OUT  
SD_ADJ  
IMON  
Monitor  
VSC7969  
G52355, Rev 2.3  
11/22/02  
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012  
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com  
Internet: www.vitesse.com  
1 of 12  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
SPECIFICATIONS  
All specifications tested at T = +25°C unless otherwise noted.  
A
Table 1. AC Characteristics for Bare Die (-W)  
Symbol  
Parameter  
Min  
Typ  
Max  
Units  
Condition  
I  
Input photocurrent swing  
2.2  
mA  
Peak-to-peak AC current  
amplitude  
PH  
I
Average photocurrent sensitivity  
Peak input photocurrent sensitivity  
4
8
µA  
µA  
23dBm average optical  
power with a detector  
responsitivity of 0.8A/W  
PHS_AVG  
I
23dBm average optical  
power with a detector  
responsitivity of 0.8A/W  
PHS_PEAK  
V  
V  
Single-ended output voltage amplitude  
Differential output voltage amplitude  
180  
360  
220  
440  
300  
600  
mV  
mV  
Single-ended peak-to-peak  
OUT_SE  
measurement. I = >20µA.  
IN  
Differential peak-to-peak  
measurement.  
OUT_DIFF  
I
= >20µA.  
IN  
t , t  
Rise and fall times  
50  
100  
40  
ps  
At 2.2mAp-p input photo-  
current swing. 20% to 80%  
R
F
(1)  
Z
Transimpedance gain  
20  
27  
1
kΩ  
Differential measurement  
T
(1)  
Z  
Ripple in passband transimpedance  
dB  
Modulation frequency  
T
between F and BW  
L
BW  
Upper 3dB bandwidth  
2.2  
2.5  
3.0  
GHz  
kHz  
Referenced to 10MHz, C  
= 0.6pF.  
PD  
F
Lower 3dB cutoff frequency  
100  
Referenced to 10MHz, C  
= 0.6pF with no external  
components.  
L
PD  
Z
Output resistance  
50  
500  
0.6  
Single-ended  
O
I
Input-referred rms noise current  
Photodetector capacitance  
nA  
pF  
30kHz to 2.5GHz  
NOISE  
C
0.4  
1
0.8  
4
Bias voltage on detector at  
2.0V.  
PD  
SD  
Signal detect hysterisis  
2.5  
dB  
Electrical measurement on  
SD pin.  
H
SD  
SD  
SD  
SD  
Signal detect assertion level  
Signal detect deassertion level  
Signal detect HIGH logic level  
Signal detect LOW logic level  
6
µA  
µA  
V
A
1
D
V
-0.3  
HIGH  
LOW  
CCS  
0.5  
0.8  
0.8  
V
MON  
Slope of linear analog photocurrent  
monitor vs. input optical power  
µA/µW IMON tied to V with 0to  
CC  
2kresistor. Detector  
responsitivity is 0.8A/W.  
DCD  
Duty cycle distortion  
-5  
5
+5  
200  
15  
%
IMON  
IMON  
Photocurrent monitor linearity range  
Photocurrent monitor offset  
µA  
µA  
RANGE  
0
OFFSET  
(2)  
R
D
Random jitter  
28  
28  
ps  
ps  
Peak-to-peak  
Peak-to-peak  
J
J
(3)  
Deterministic jitter  
1. The transimpedance gain is defined as ZT = (VOUT_DIFF) / IPH  
.
2. Using 1111100000 pattern at 2.5Gb/s to measure the standard deviation at the edge of the pattern, multiply the standard deviation by  
14 to achieve the total random jitter.  
3. +K28.5 - K28.5 (00111110101100000101).  
2 of 12  
G52355, Rev 2.3  
11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
Table 2. AC Characteristics for TO-46 Packages (WA-1A, WD-1A)  
Symbol  
Parameter  
Min  
Typ  
Max  
Unit  
Condition  
(1)  
OL  
Input optical power overload  
2.3  
dBm  
I
Input-referred rms noise current  
500  
nArms 1Hz to 2.5GHz, 0.6pF photo-  
diode capacitance.  
NOISE  
(2)  
OMA  
Optical modulation amplitude  
8.8  
8
µWp-p  
(2)  
I
Peak input photocurrent sensitivity  
µA  
23dBm average optical  
power with a detector respon-  
sitivity of 0.95A/W.  
PHS_PEAK  
(2)  
S
Average optical power at sensitivity  
-23  
dBm  
V
V  
Single-ended output voltage amplitude  
Differential output voltage amplitude  
Rise and fall times  
180  
360  
220  
300  
600  
100  
25.6  
Single-ended peak-to-peak  
OUT_SE  
measurement. I = >40µAp-p.  
IN  
V  
440  
50  
mV  
ps  
Differential peak-to-peak mea-  
OUT_DIFF  
surement. I = >40µAp-p.  
IN  
t , t  
At 2.2mAp-p input photo cur-  
rent. 20% to 80%.  
R
F
(1)  
R
Differential responsitivity  
12.8  
19.2  
1
mV/µW Peak-to-peak  
D
(3)  
Z  
Ripple in passband transimpedance  
dB  
Modulation frequency between  
T
F and BW.  
L
BW  
Upper 3dB bandwidth  
1.2  
GHz  
kHz  
Referenced to 50MHz, C  
0.6pF.  
=
=
PD  
F
Lower 3dB cutoff frequency  
30  
53  
Referenced to 10MHz, C  
0.6pF, 0.1µF AC-coupling  
capacitor.  
L
PD  
Z
Output resistance  
Duty cycle  
50  
50  
28  
28  
%
ps  
ps  
Single-ended  
O
DC  
47  
(4, 6)  
R
D
Random jitter  
Peak-to-peak, I = >30µAp-p.  
IN  
J
J
(5, 6)  
Deterministic jitter  
Peak-to-peak I = >30µAp-p.  
IN  
1. Value calculated using photodiode responsitivity = 0.95A/W, extinction ratio = 10dB.  
2. Value calculated from INOISE, BER = 1E -12, photodiode responsitivity = 0.95A/W, extinction ratio = 10dB.  
3. The differential transimpedance gain is defined as ZT _DIFF = (VOUT_DIFFp-p) / IINp-p, where VOUT_DIFF is the differential peak-to-peak  
output voltage and IIN is the peak-to-peak input current.  
4. Using 1111100000 pattern at 2.5Gb/s to measure the standard deviation at the edge of the pattern, multiply the standard deviation by  
14 to achieve the total random jitter.  
5. +K28.5 - K28.5 (00111110101100000101).  
6. Electrical measurement.  
3 of 12  
G52355, Rev 2.3  
11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
.
Table 3. DC Characteristics  
Symbol  
Parameter  
Min  
3.0  
4.5  
Typ  
3.3  
5.0  
65  
Max  
3.6  
5.5  
75  
Units Condition  
V
V
Power supply voltage for 3.3V operation  
V
V
CCS  
CCD  
(1)  
Power supply voltage for 5V operation  
I
Power supply current  
mA  
V
3.3V  
CC  
V
Common-mode voltage on output pins  
(VOUTP and VOUTN)  
V
At 50load  
OUT_CM  
CCS  
0.125  
V
Internal DC bias voltage on detector anode  
contact  
0.8  
0.9  
1.0  
V
V
ANODE  
(1)  
V
Internal DC bias voltage on detector cathode  
V
V
Reversed biased  
detector with no current  
requirement.  
CATHODE  
CAT_EXT  
CCS  
0.15  
CCS  
(1)  
contact  
V
External DC bias voltage permissable on  
3.3  
60  
10  
V
V
(1)  
detector cathode contact  
V
External DC bias voltage for use with Ava-  
APD  
(1)  
lanche Photodetector  
1. Not applicable to TO-46 packages (WA-1A, WD-1A).  
Table 4. Recommended Operating Conditions  
Symbol  
Parameter  
Min  
Typ  
+3.3  
+5.0  
Max  
Unit  
V
Condition  
V
V
T
Power supply voltage for 3.3V operation  
Power supply voltage for 5V operation  
+3.135  
+3.135  
0
+5.5  
+5.5  
+85  
CC_3.3  
CC_5  
V
(1)  
Operating temperature range  
°C  
1. Lower limit of specification is ambient temperature and upper limit is case temperature.  
Table 5. Absolute Maximum Ratings  
Symbol Parameter  
Min  
0.5  
0.5  
40  
40  
Max  
3.6  
Unit  
V
Condition  
V
V
Power supply voltage  
Power supply voltage  
Junction temperature  
Storage temperature  
CCS  
CCD  
J
5.5  
V
T
T
+125  
+125  
°C  
°C  
S
Stresses listed under Absolute Maximum Ratings may be applied to devices one at a time without causing permanent damage. Functionality at or above the values  
listed is not implied. Exposure to these values for extended periods may affect device reliability.  
ELECTROSTATIC DISCHARGE  
This device can be damaged by ESD. Vitesse recommends that all integrated circuits  
be handled with appropriate precautions. Failure to observe proper handling and  
installation procedures may adversely affect reliability of the device.  
4 of 12  
G52355, Rev 2.3  
11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
TYPICAL OPERATING CHARACTERISTICS  
T
= +25°C and V = +3.3V unless otherwise noted.  
A
CC  
Electrical Eye Diagram  
Electrical Eye Diagram  
31  
31  
Input = 8µAp-p, f = 3.125Gb/s, PRBS 2 -1  
Input = 100µAp-p, f = 3.125Gb/s, PRBS 2 -1  
I
Characteristic  
MON  
Bit Error Rate vs. Input Level  
0µA to 200µA Input  
I
MON CHARACTERISTIC  
0µA to 200µA Input  
BIT ERROR RATE vs INPUT LEVEL  
1.00E-07  
250  
200  
150  
100  
50  
1.00E-08  
1.00E-09  
1.00E-10  
1.00E-11  
1.00E-12  
1.00E-13  
0
6.0  
6.5  
7.0  
7.5  
8.0  
8.5  
0
50  
100  
150  
200  
IN (IPD) (µAp-p)  
IN (DC Current) (µA)  
5 of 12  
G52355, Rev 2.3  
11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
FUNCTIONAL DESCRIPTION  
The VSC7969 data path consists of several stages: transimpedance input stage, limiting amplifier, and output driver.  
The transimpedance amplifier accepts current from a photodetector connected to the input pad IN and converts the  
input current to a differential output voltage. The signal then travels to the second stage limiting amplifier which  
provides DC restoration, eliminating the DC component of the input signal. The linear photocurrent monitor and  
signal detect function is also provided by this stage. The final stage consists of an output driver with a differential pair  
connected to VCC via 50internal pull-up resistors. The overall effective differential transimpedance of the  
VSC7969 is typically 27k. The limited output single-ended voltage swing is typically 250mVp-p.  
Power Supply  
The VSC7969 is supplied by a single supply voltage. For +3.3V operation, the supply voltage should be applied to  
only VCCS and for +5V operation, the supply voltage should be applied to only VCCD. Power supply decoupling  
capacitors are recommended for optimal performance. A power supply filter should be used to minimize supply  
noise. See Figure 1.  
10µH  
0.1µF  
0.01µF  
Figure 1. Power Supply Decoupling Scheme  
Data Outputs  
The outputs of the VSC7969 need to be AC-coupled. The capacitor will determine the low frequency cutoff for the  
system, which is directly related to the receiver’s deterministic jitter. For ATM/SONET, or other applications using  
PRBS NRZ data, select a capacitor of at least 0.1µF or greater, which provides less than 32kHz low frequency cutoff.  
For Fibre Channel, Gigabit Ethernet, or other applications requiring 8B/10B data coding, select a capacitor of at least  
0.01µF or greater, which provides less than 320kHz low frequency cutoff.  
The outputs can be used single-ended or differential. For best performance, differential operation is recommended. If  
single-ended operation is necessary, the unused output should be AC-coupled and terminated with an impedance  
equal to the load on the pin in use.  
Signal Detect  
The signal detect feature of the VSC7969 provides a CMOS level output corresponding to the input current level to  
the transimpedance amplifier.  
Table 6. Signal Detect Function  
Parameter  
Assert  
Min  
Typ  
Max  
Units  
µA  
9
3
4
Deassert  
Hysteresis  
1
1
2.2  
2.5  
µA  
dB  
Photodetector Current Monitor  
The IMON pin provides a linear measurement of the average input current from the photodetector to the  
transimpedance amplifier. For example, if 20µA is the average input current to the transimpedance amplifier, the  
current through the IMON pin will be 20µA (see the typical operating curve IMON Characteristic, 0µA to 200µA). To  
use this feature, connect the IMON pin to VCC using a resistor less than 2k. If this feature is not used, the IMON pin  
can be left unconnected.  
6 of 12  
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11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
BARE DIE AND PACKAGE INFORMATION  
1457µm (57.4mil)  
Pad 6  
VOUTN  
Pad 7  
SD_OUT  
Pad 8  
GND  
Pad 9  
VOUTN  
Pad 10  
GND  
Pad 11  
VOUTP  
Pad 12  
GND  
Pad 13  
IMON  
Pad 14  
VOUTP  
Pad 5  
SD_ADJ  
Pad 15  
GND  
Pad 4  
SD_TP  
Pad 16  
CSDN  
1157µm  
(45.6mil)  
Pad 3  
GND  
Pad 17  
CSDP  
VSC7969  
Pad 2  
BG_VREF  
Pad 18  
GND  
Pad 1  
GND  
Pad 19  
GND  
Pad 26  
VCCD  
Pad 25  
VCCS  
Pad 24  
GND  
Pad 23  
IN  
Pad 22  
FILTER  
Pad 21  
GND  
Pad 20  
GND  
Die Size Including Scribe: 1157µm x 1457µm (45.6mil x 57.4mil)  
Die Thickness: 279µm (11.0mil)  
157µm  
(6.2mil)  
Pad Size: 100µm x 100µm (3.9mil x 3.9mil)  
Pad Passivation Opening: 86µm x 86µm (3.4mil x 3.4mil)  
Circuit Size: 1000µm x 1300µm (39.4mil x 51.2mil)  
Scribe Size: 157µm (6.2mil)  
Figure 2. Pad Diagram for Bare Die (-W)  
7 of 12  
G52355, Rev 2.3  
11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
Table 7. Pad Coordinates for Bare Die (-W)  
Coordinates (µm)  
Pad  
Signal  
GND  
Number  
X
Y
Description  
1
130  
130  
130  
130  
130  
137  
280  
405  
530  
655  
780  
905  
1030  
1173  
1180  
1180  
1180  
1180  
1180  
1030  
905  
780  
530  
405  
280  
137  
250  
375  
500  
625  
750  
875  
875  
875  
875  
875  
875  
875  
875  
875  
750  
625  
500  
375  
250  
125  
125  
125  
125  
125  
125  
125  
Negative power supply rail (typically 0V)  
BG_VREF  
GND  
2
Band Gap voltage reference 1.24V for testpoint, no connect  
Negative power supply rail (typically 0V)  
3
SD_TP  
SD_ADJ  
VOUTN  
SD_OUT  
GND  
4
Signal Detect test point, DO NOT CONNECT.  
Not used. Leave open in application.  
5
6
Complementary logic output (logic LOW when photocurrent is HIGH)  
7
Signal detect output (logic HIGH when photocurrent exceeds SD )  
A
8
Negative power supply rail (typically 0V)  
VOUTN  
GND  
9
Complementary logic output (logic LOW when photocurrent is HIGH)  
Negative power supply rail (typically 0V)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
VOUTP  
GND  
Positive logic output (logic HIGH when photocurrent is HIGH)  
Negative power supply rail (typically 0V)  
IMON  
VOUTP  
GMD  
Photocurrent Monitor  
Positive logic output (logic HIGH when photocurrent is HIGH)  
Negative power supply rail (typically 0V)  
CSDN  
CSDP  
GND  
Test point for Signal Detect capacitor. Do not connect.  
Test point for Signal Detect capacitor. Do not connect.  
Negative power supply rail (typically 0V)  
GND  
Negative power supply rail (typically 0V)  
GND  
Negative power supply rail (typically 0V)  
GND  
Negative power supply rail (typically 0V)  
FILTER  
IN  
Photodetector cathode connection (filtered V  
Photodetector anode connection  
)
CC  
GND  
Negative power supply rail (typically 0V)  
Positive power supply rail for 3.3V operation  
Positive power supply rail for 5V operation  
VCCS  
VCCD  
8 of 12  
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11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
VCC  
VOUTN  
VOUTP  
GND  
BottomView  
Figure 3. Pin Diagram for TO-46 (WA-1A, WD-1A)  
Table 8. Pin Identifications for TO-46 (WA-1A, WD-1A)  
Signal  
VOUTP  
VOUTN  
VCC  
I/O  
O
Description  
Data output, true (with reference to incident light)  
Data output, complement (inverting, with reference to incident light)  
Power supply  
O
Pwr  
Pwr  
GND  
Ground (package case)  
9 of 12  
G52355, Rev 2.3  
11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
Reference Isometric  
Figure 4. Package Drawing for TO-46 Flat Window (WA-1A)  
10 of 12  
G52355, Rev 2.3  
11/22/02  
VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
Reference Isometric  
Figure 5. Package Drawing for TO-46 Balls Lens, 13mm Lead (WD-1A)  
11 of 12  
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VSC7969  
Data Sheet  
Advance Product Information  
Subject to Change  
ORDERING INFORMATION  
VSC7969 3.125Gb/s Integrated Transimpedance and Limiting Amplifier with Signal Detect  
Part Number  
VSC7969-W  
Description  
Bare Die in Waffle Pack  
VSC7969WA-1A  
TO-46 Flat Window, +3.3V Power Supply, VOUTN/VOUTP Outputs*  
Temperature Range: 0°C ambient to +85°C case  
VSC7969WD-1A  
TO-46 Ball Lens, 13mm Lead,+3.3V Power Supply, VOUTN/VOUTP Outputs*  
Temperature Range: 0°C ambient to +85°C case  
NOTE: *TO-46 package includes an internally integrated 1310nm PIN detector.  
CORPORATE HEADQUARTERS  
Vitesse Semiconductor Corporation  
741 Calle Plano  
Camarillo, CA 93012  
Tel: 1-800-VITESSE  
·
FAX:1-(805) 987-5896  
For application support, latest technical literature, and locations of sales offices,  
please visit our web site at  
www.vitesse.com  
Copyright © 2002 by Vitesse Semiconductor Corporation  
PRINTED IN THE U.S.A  
Vitesse Semiconductor Corporation (Vitesse) retains the right to make changes to its products or specifications to improve performance, reliability or manufactura-  
bility. All information in this document, including descriptions of features, functions, performance, technical specifications and availability, is subject to change without  
notice at any time. While the information furnished herein is held to be accurate and reliable, no responsibility will be assumed by Vitesse for its use. Furthermore,  
the information contained herein does not convey to the purchaser of microelectronic devices any license under the patent right of any manufacturer.  
Vitesse products are not intended for use in life support products where failure of a Vitesse product could reasonably be expected to result in death or personal  
injury. Anyone using a Vitesse product in such an application without express written consent of an officer of Vitesse does so at their own risk, and agrees to fully  
indemnify Vitesse for any damages that may result from such use or sale.  
Vitesse Semiconductor Corporation is a registered trademark. All other products or service names used in this publication are for identification purposes only, and  
may be trademarks or registered trademarks of their respective companies. All other trademarks or registered trademarks mentioned herein are the property of their  
respective holders..  
12 of 12  
G52355, Rev 2.3  
11/22/02  

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3.125Gb/s Integrated Transimpedance and Limiting Amplifier with Signal Detect
VITESSE

VSC7969YD1

3.125Gb/s Integrated Transimpedance and Limiting Amplifier with Signal Detect
VITESSE

VSC7969YD2

3.125Gb/s Integrated Transimpedance and Limiting Amplifier with Signal Detect
VITESSE

VSC7970

1 to 4 Gbps Transimpedance Amplifiers with Photocurrent Monitor
VITESSE

VSC7971

1 to 4 Gbps Transimpedance Amplifiers with Photocurrent Monitor
VITESSE

VSC7972

1 to 4 Gbps Transimpedance Amplifiers with Photocurrent Monitor
VITESSE

VSC7973

1 to 4 Gbps Transimpedance Amplifiers with Photocurrent Monitor
VITESSE

VSC7975

1/2/4 Gbps Multirate Transimpedance Amplifier
VITESSE

VSC7977

1/2/4 Gbps Multirate Transimpedance Amplifier
VITESSE