SIHLI620G [VISHAY]
Power MOSFET; 功率MOSFET
| 型号： | SIHLI620G |
| 厂家： | 
VISHAY |
| 描述： | Power MOSFET |
| 文件： | 总8页 (文件大小：1232K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRLI620G, SiHLI620G
Vishay Siliconix
Power MOSFET
FEATURES
• Isolated Package
PRODUCT SUMMARY
VDS (V)
200
• High Voltage Isolation = 2.5 kVRMS (t = 60 s;
f = 60 Hz)
Available
RDS(on) (Ω)
VGS = 5.0 V
0.80
RoHS*
Qg (Max.) (nC)
16
2.7
COMPLIANT
• Sink to Lead Creepage Dist. 4.8 mm
Q
Q
gs (nC)
gd (nC)
• Logic-Level Gate Drive
• RDS(on) Specified at VGS = 4V and 5 V
• Fast Switching
9.6
Configuration
Single
• Ease of paralleling
D
TO-220 FULLPAK
• Lead (Pb)-free Available
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
G
The TO-220 FULLPAK eliminates the need for additional
insulating hardware in commercial-industrial applications.
The molding compound used provides a high isolation
capability and a low thermal resistance between the tab and
external heatsink. This isolation is equivalent to using a 100
micron mica barrier with standard TO-220 product. The
FULLPAK is mounted to a heatsink using a single clip or by
a single screw fixing.
S
N-Channel MOSFET
S
D
G
ORDERING INFORMATION
Package
TO-220 FULLPAK
IRLI620GPbF
SiHLI620G-E3
IRLI620G
Lead (Pb)-free
SnPb
SiHLI620G
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltage
Gate-Source Voltage
VDS
VGS
200
10
V
TC = 25 °C
TC =100°C
4.0
2.6
16
Continuous Drain Current
VGS at 5.0 V
ID
A
Pulsed Drain Currenta
IDM
Linear Derating Factor
0.24
62
4.0
3.0
30
5.0
W/°C
mJ
A
mJ
W
Single Pulse Avalanche Energyb
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
EAS
IAR
EAR
PD
dV/dt
TJ, Tstg
Maximum Power Dissipation
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
TC = 25 °C
V/ns
- 55 to + 150
300d
°C
for 10 s
10
1.1
lbf · in
N · m
Mounting Torque
6-32 or M3 screw
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 25 V, starting TJ = 25 °C, L = 5.8 mH, RG = 25 Ω, IAS = 4.0 A (see fig. 12).
c. ISD ≤ 5.2 A, dI/dt ≤ 95 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91312
S-Pending-Rev. A, 17-Jul-08
www.vishay.com
1
WORK-IN-PROGRESS
IRLI620G, SiHLI620G
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
65
UNIT
Maximum Junction-to-Ambient
Maximum Junction-to-Case (Drain)
RthJA
RthJC
-
-
°C/W
4.1
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
Gate-Source Leakage
VDS
ΔVDS/TJ
VGS(th)
IGSS
VGS = 0 V, ID = 250 µA
Reference to 25 °C, ID = 1 mA
VDS = VGS, ID = 250 µA
200
-
-
-
V
V/°C
V
-
0.27
1.0
-
-
-
-
-
-
-
2.0
100
25
250
0.80
1.0
-
VGS
VDS = 200 V, VGS = 0 V
DS = 160 V, VGS = 0 V, TJ = 125 °C
=
10 V
-
nA
-
Zero Gate Voltage Drain Current
Drain-Source On-State Resistance
IDSS
µA
V
-
-
VGS = 5.0 V
GS = 4.0 V
ID = 2.4 Ab
ID = 2.0 Ab
RDS(on)
gfs
Ω
V
-
Forward Transconductance
Dynamic
VDS = 50 V, ID = 3.1 Ab
1.2
S
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
Ciss
Coss
Crss
Qg
-
-
-
-
-
-
-
-
-
-
360
91
27
-
-
VGS = 0 V,
DS = 25 V,
f = 1.0 MHz, see fig. 5
V
-
-
pF
nC
16
2.7
9.6
-
ID = 5.2 A, VDS = 160 V,
see fig. 6 and 13b
Qgs
Qgd
td(on)
tr
VGS = 10 V
-
-
4.2
31
18
17
V
R
DD = 100 V, ID = 5.2 A,
G = 9.0 Ω, RD= 20 Ω,
see fig. 10b
-
ns
Turn-Off Delay Time
Fall Time
td(off)
tf
-
-
D
Between lead,
Internal Drain Inductance
Internal Source Inductance
LD
LS
-
-
4.5
7.5
-
-
6 mm (0.25") from
package and center of
die contact
nH
G
S
Drain-Source Body Diode Characteristics
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous Source-Drain Diode Current
IS
-
-
-
-
4.0
16
A
G
Pulsed Diode Forward Currenta
ISM
S
Body Diode Voltage
VSD
trr
TJ = 25 °C, IS = 9.9 A, VGS = 0 Vb
-
-
-
-
1.8
270
1.7
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
180
1.1
ns
µC
TJ = 25 °C, IF = 5.2 A, dI/dt = 100 A/µsb
Qrr
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
www.vishay.com
2
Document Number: 91312
S-Pending-Rev. A, 17-Jul-08
IRLI620G, SiHLI620G
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
Fig. 1 - Typical Output Characteristics, TC = 25 °C
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics, TC = 150 °C
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91312
S-Pending-Rev. A, 17-Jul-08
www.vishay.com
3
IRLI620G, SiHLI620G
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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4
Document Number: 91312
S-Pending-Rev. A, 17-Jul-08
IRLI620G, SiHLI620G
Vishay Siliconix
RD
VDS
VGS
D.U.T.
RG
+
-
V
DD
5 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
td(on) tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 9 - Maximum Drain Current vs. Case Temperature
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
VDS
VDS
Vary tp to obtain
required IAS
tp
VDD
D.U.T.
RG
+
-
VDD
VDS
IAS
5 V
0.01 Ω
tp
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91312
S-Pending-Rev. A, 17-Jul-08
www.vishay.com
5
IRLI620G, SiHLI620G
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
5 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
-
VDS
D.U.T.
VG
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13b - Gate Charge Test Circuit
Fig. 13a - Basic Gate Charge Waveform
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6
Document Number: 91312
S-Pending-Rev. A, 17-Jul-08
IRLI620G, SiHLI620G
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
Low stray inductance
D.U.T.
•
• Ground plane
• Low leakage inductance
current transformer
-
+
-
-
+
RG
• dV/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by duty factor "D"
• D.U.T. - device under test
VDD
Driver gate drive
P.W.
P.W.
Period
Period
D =
V
= 10 V*
GS
D.U.T. I waveform
SD
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. V waveform
DS
Diode recovery
dV/dt
V
DD
Re-applied
voltage
Body diode forward drop
Ripple ≤ 5 %
Inductor current
I
SD
* VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see http://www.vishay.com/ppg?91312.
Document Number: 91312
S-Pending-Rev. A, 17-Jul-08
www.vishay.com
7
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
www.vishay.com
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