SIHFBC40L-GE3 [VISHAY]
Power MOSFET;
| 型号： | SIHFBC40L-GE3 |
| 厂家： | 
VISHAY |
| 描述： | Power MOSFET |
| 文件： | 总11页 (文件大小：328K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Halogen-free According to IEC 61249-2-21
Definition
600
• Surface Mount (IRFBC40S, SiHFBC40S)
RDS(on) ()
VGS = 10 V
1.2
•
•
Low-Profile Through-Hole (IRFBC40L, SiHFBC40L)
Available in Tape and Reel (IRFBC40S, SiHFBC40S)
Qg (Max.) (nC)
60
8.3
Q
Q
gs (nC)
gd (nC)
• Dynamic dV/dt Rating
• 150 °C Operating Temperature
• Fast Switching
30
Configuration
Single
• Fully Avalanche Rated
• Compliant to RoHS Directive 2002/95/EC
D
DESCRIPTION
Third generation Power MOSFETs from Vishay provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and
cost-effectiveness.
D2PAK (TO-263)
I2PAK (TO-262)
G
The D2PAK is a surface mount power package capable of
the accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible
on-resistance in any existing surface mount package. The
D2PAK is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0 W in a typical surface mount application. The
through-hole version (IRFBC40L, SiHFBC40L) is available
for low-profile applications.
G
D
S
D
S
G
S
N-Channel MOSFET
ORDERING INFORMATION
Package
Lead (Pb)-free and Halogen-free SiHFBC40S-GE3
D2PAK (TO-263)
D2PAK (TO-263)
I2PAK (TO-262)
SiHFBC40L-GE3
IRFBC40LPbF
SiHFBC40L-E3
SiHFBC40STRL-GE3a
IRFBC40STRLPbFa
SiHFBC40STL-E3a
IRFBC40SPbF
SiHFBC40S-E3
Lead (Pb)-free
Note
a. See device orientation.
ABSOLUTE MAXIMUM RATINGS (TC = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
LIMIT
UNIT
Drain-Source Voltagee
Gate-Source Voltagee
VDS
VGS
600
20
V
TC = 25 °C
C = 100 °C
6.2
3.9
25
1.0
570
Continuous Drain Current
VGS at 10 V
ID
T
A
Pulsed Drain Currenta,e
Linear Derating Factor
Single Pulse Avalanche Energyb, e
Repetitive Avalanche Currenta
Repetitive Avalanche Energya
IDM
W/°C
mJ
A
EAS
IAR
EAR
6.2
13
mJ
TC = 25 °C
TA = 25 °C
130
3.1
3.0
Maximum Power Dissipation
PD
W
V/ns
°C
Peak Diode Recovery dV/dtc, e
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
dV/dt
TJ, Tstg
- 55 to + 150
300d
for 10 s
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. VDD = 50 V; starting TJ = 25 °C, L = 27 mH, Rg = 25 , IAS = 6.2 A (see fig. 12).
c. ISD 6.2 A, dI/dt 80 A/μs, VDD VDS, TJ 150 °C.
d. 1.6 mm from case.
e. Uses IRFBC40, SiHFBC40 data and test conditions.
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 91116
S11-1053-Rev. C, 30-May-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
40
UNIT
Maximum Junction-to-Ambient
(PCB Mounted, steady-state)a
RthJA
-
-
°C/W
Maximum Junction-to-Case
RthJC
1.0
Note
a. When mounted on 1" square PCB ( FR-4 or G-10 material).
SPECIFICATIONS (TJ = 25 °C, unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Static
Drain-Source Breakdown Voltage
VDS
VDS/TJ
VGS(th)
IGSS
VGS = 0, ID = 250 μA
Reference to 25 °C, ID = 1 mA
VDS = VGS, ID = 250 μA
600
-
-
V
V/°C
V
VDS Temperature Coefficient
-
2.0
-
0.70
-
Gate-Source Threshold Voltage
Gate-Source Leakage
-
-
-
-
-
-
4.0
100
100
500
1.2
-
VGS
VDS = 600 V, VGS = 0 V
DS = 480 V, VGS = 0 V, TJ = 125 °C
VGS = 10 V
ID = 3.7 Ab
VDS = 100 V, ID = 3.7 Ab
=
20 V
nA
-
Zero Gate Voltage Drain Current
IDSS
μA
V
-
Drain-Source On-State Resistance
Forward Transconductance
Dynamic
RDS(on)
gfs
-
4.7
S
Input Capacitance
Ciss
Coss
Crss
Qg
-
-
-
-
-
-
-
-
-
-
-
1300
160
30
-
-
-
VGS = 0 V,
DS = 25 V,
f = 1.0 MHz, see fig. 5c
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
V
pF
nC
-
60
8.3
30
-
ID = 6.2 A, VDS = 480 V,
see fig. 6 and 13b, c
Gate-Source Charge
Gate-Drain Charge
Qgs
Qgd
td(on)
tr
V
GS = 10 V
-
-
Turn-On Delay Time
Rise Time
13
18
55
20
7.5
VDD = 300 V, ID = 6.2 A,
-
Rg = 9.1 , RD = 47 ,
ns
see fig. 10b, c
Turn-Off Delay Time
Fall Time
td(off)
tf
-
-
Internal Source Inductance
Drain-Source Body Diode Characteristics
LS
Between lead, and center of die contact
-
nH
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
IS
-
-
-
-
6.2
25
A
G
ISM
S
Body Diode Voltage
VSD
trr
TJ = 25 °C, IS = 6.2 A, VGS = 0 Vb
TJ = 25 °C, IF = 6.2 A, dI/dt = 100 A/μsb
-
-
-
-
1.5
940
7.9
V
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Forward Turn-On Time
450
3.8
ns
μC
Qrr
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width 300 μs; duty cycle 2 %.
c. Uses IRFBC40, SiHFBC40 data and test conditions.
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2
Document Number: 91116
S11-1053-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
Fig. 1 - Typical Output Characteristics
Fig. 3 - Typical Transfer Characteristics
Fig. 2 - Typical Output Characteristics
Fig. 4 - Normalized On-Resistance vs. Temperature
Document Number: 91116
S11-1053-Rev. C, 30-May-11
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
Fig. 8 - Maximum Safe Operating Area
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Document Number: 91116
S11-1053-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
RD
VDS
VGS
D.U.T.
Rg
+
V
-
DD
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
Fig. 10a - Switching Time Test Circuit
VDS
90 %
10 %
VGS
Fig. 9 - Maximum Drain Current vs. Case Temperature
td(on) tr
td(off) tf
Fig. 10b - Switching Time Waveforms
Fig. 11 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
L
VDS
VDS
Vary tp to obtain
required IAS
tp
VDD
Rg
D.U.T
+
-
VDD
VDS
IAS
10 V
0.01 Ω
tp
IAS
Fig. 12a - Unclamped Inductive Test Circuit
Fig. 12b - Unclamped Inductive Waveforms
Document Number: 91116
S11-1053-Rev. C, 30-May-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
Fig. 12c - Maximum Avalanche Energy vs. Drain Current
Current regulator
Same type as D.U.T.
50 kΩ
QG
10 V
12 V
0.2 µF
0.3 µF
QGS
QGD
+
-
VDS
D.U.T.
VG
VGS
3 mA
Charge
IG
ID
Current sampling resistors
Fig. 13a - Basic Gate Charge Waveform
Fig. 13b - Gate Charge Test Circuit
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Document Number: 91116
S11-1053-Rev. C, 30-May-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
IRFBC40S, SiHFBC40S, IRFBC40L, SiHFBC40L
Vishay Siliconix
Peak Diode Recovery dV/dt Test Circuit
+
Circuit layout considerations
• Low stray inductance
• Ground plane
D.U.T.
• Low leakage inductance
current transformer
-
+
-
-
+
Rg
• dV/dt controlled by Rg
• Driver same type as D.U.T.
• ISD controlled by duty factor “D”
• D.U.T. - device under test
+
-
VDD
Driver gate drive
P.W.
P.W.
D =
Period
Period
VGS = 10 Va
D.U.T. lSD waveform
D.U.T. VDS waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
Diode recovery
dV/dt
VDD
Re-applied
voltage
Body diode forward drop
Inductor current
ISD
Ripple ≤ 5 %
Note
a. VGS = 5 V for logic level devices
Fig. 14 - For N-Channel
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?91116.
Document Number: 91116
S11-1053-Rev. C, 30-May-11
www.vishay.com
7
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TO-263AB (HIGH VOLTAGE)
A
B
(Datum A)
3
4
A
A
E
c2
H
L1
4
Gauge
plane
0° to 8°
4
B
5
Detail A
Seating plane
D
H
L
C
C
A1
L3
L4
Detail “A”
1
2
3
L2
Rotated 90° CW
B
B
scale 8:1
A
2 x b2
2 x b
c
E
M
M
B
0.010
A
M
0.004
B
2 x e
Base
metal
5
D1
4
Plating
(c)
b1, b3
5
c1
(b, b2)
Lead tip
4
E1
Section B - B and C - C
Scale: none
View A - A
MILLIMETERS
INCHES
MILLIMETERS
INCHES
DIM.
A
MIN.
4.06
0.00
0.51
0.51
1.14
1.14
0.38
0.38
1.14
8.38
MAX.
4.83
0.25
0.99
0.89
1.78
1.73
0.74
0.58
1.65
9.65
MIN.
0.160
0.000
0.020
0.020
0.045
0.045
0.015
0.015
0.045
0.330
MAX.
0.190
0.010
0.039
0.035
0.070
0.068
0.029
0.023
0.065
0.380
DIM.
D1
E
MIN.
6.86
MAX.
MIN.
MAX.
-
10.67
-
0.270
0.380
0.245
-
0.420
-
A1
b
9.65
6.22
E1
e
b1
b2
b3
c
2.54 BSC
0.100 BSC
H
14.61
15.88
2.79
1.65
1.78
0.575
0.625
0.110
0.066
0.070
L
1.78
0.070
L1
L2
L3
L4
-
-
-
-
c1
c2
D
0.25 BSC
0.010 BSC
4.78
5.28
0.188
0.208
ECN: S-82110-Rev. A, 15-Sep-08
DWG: 5970
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimensions are shown in millimeters (inches).
3. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm (0.005") per side. These dimensions are measured at the
outmost extremes of the plastic body at datum A.
4. Thermal PAD contour optional within dimension E, L1, D1 and E1.
5. Dimension b1 and c1 apply to base metal only.
6. Datum A and B to be determined at datum plane H.
7. Outline conforms to JEDEC outline to TO-263AB.
Document Number: 91364
Revision: 15-Sep-08
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1
Package Information
Vishay Siliconix
I2PAK (TO-262) (HIGH VOLTAGE)
A
B
A
(Datum A)
E
c2
A
E
L1
D
Seating
plane
D1
C
C
L2
B
B
L
A
c
E1
3 x b2
3 x b
A1
Section A - A
Base
metal
2 x e
b1, b3
Plating
M
M
B
0.010
A
c1
c
(b, b2)
Lead tip
Section B - B and C - C
Scale: None
MILLIMETERS
INCHES
MAX.
MILLIMETERS
INCHES
MAX.
DIM.
A
MIN.
MAX.
4.83
3.02
0.99
0.89
1.78
1.73
0.74
0.58
1.65
MIN.
0.160
0.080
0.020
0.020
0.045
0.045
0.015
0.015
0.045
DIM.
MIN.
MAX.
MIN.
0.330
0.270
0.380
0.245
4.06
2.03
0.51
0.51
1.14
1.14
0.38
0.38
1.14
0.190
0.119
0.039
0.035
0.070
0.068
0.029
0.023
0.065
D
D1
E
8.38
6.86
9.65
6.22
9.65
0.380
A1
b
-
10.67
-
-
0.420
-
b1
b2
b3
c
E1
e
2.54 BSC
0.100 BSC
L
13.46
-
14.10
1.65
3.71
0.530
-
0.555
0.065
0.146
L1
L2
c1
c2
3.56
0.140
ECN: S-82442-Rev. A, 27-Oct-08
DWG: 5977
Notes
1. Dimensioning and tolerancing per ASME Y14.5M-1994.
2. Dimension D and E do not include mold flash. Mold flash shall not exceed 0.127 mm per side. These dimensions are measured at the outmost
extremes of the plastic body.
3. Thermal pad contour optional within dimension E, L1, D1, and E1.
4. Dimension b1 and c1 apply to base metal only.
Document Number: 91367
Revision: 27-Oct-08
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1
AN826
Vishay Siliconix
2
RECOMMENDED MINIMUM PADS FOR D PAK: 3-Lead
0.420
(10.668)
0.145
(3.683)
0.135
(3.429)
0.200
0.050
(5.080)
(1.257)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
Document Number: 73397
11-Apr-05
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1
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Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
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“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
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the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
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with the properties described in the product specification is suitable for use in a particular application. Parameters provided in
datasheets and / or specifications may vary in different applications and performance may vary over time. All operating
parameters, including typical parameters, must be validated for each customer application by the customer's technical experts.
Product specifications do not expand or otherwise modify Vishay's terms and conditions of purchase, including but not limited
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Revision: 09-Jul-2021
Document Number: 91000
1
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