SI91821DH-18-T1 [VISHAY]
Micropower 300-mA CMOS LDO Regulator With Error Flag; 微功耗300 mA的CMOS LDO稳压器，错误标记
| 型号： | SI91821DH-18-T1 |
| 厂家： | 
VISHAY |
| 描述： | Micropower 300-mA CMOS LDO Regulator With Error Flag |
| 文件： | 总10页 (文件大小：136K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Si91821
Vishay Siliconix
Micropower 300-mA CMOS LDO Regulator With Error Flag
FEATURES
D Input Voltage: 2.35−6.0 V
D 1-mA Maximum Shutdown Current
D Fixed 1.8-V, 2.5-V, 2.8-V, 3.0-V, 3.3-V, 5.0-V, or
D Built-in Short Circuit and Thermal Protection
D Out-Of-Regulation Error Flag (Power_Good)
Available
Adjustable Output Voltage Options
D Low 120-mV Dropout at 300-mA Load
D Guaranteed 300-mA Output Current
D 500-mA Peak Output Current Capability
D Uses Low ESR Ceramic Output Capacitor
D Fast Load and Line Transient Response
APPLICATIONS
D Cellular Phones
D Laptop and Palm Computers
D PDA, Digital Still Cameras
D Only 100-mV(rms) Noise With Noise Bypass
Capacitor
DESCRIPTION
The Si91821 is a 300-mA CMOS LDO (low dropout) voltage
regulator. The device features ultra low ground current and
dropout voltage to prolong battery life in portable electronics.
The Si91821 offers line and load transient response and ripple
rejection superior to that of bipolar or BiCMOS LDO regulators.
The device is designed to maintain regulation while delivering
500-mA peak current. This is useful for systems that have high
surge current upon turn-on. The Si91821 is designed to drive
the lower cost ceramic, as well as tantalum, output capacitors.
The device is guaranteed stable from maximum load current
down to 0-mA load. In addition, an external noise bypass
capacitor connected to the device’s CNOISE pin will lower the
LDO’s output noise for low noise applications.
The Si91821 also includes an out-of-regulation error flag.
When the output voltage is 5% below its nominal output
voltage, the error flag output goes low.
The Si91821 is available in both standard and lead (Pb)-free
MSOP-8 packages and is specified to operate over the
industrial temperature range of −40 _C to 85 _C.
TYPICAL APPLICATIONS CIRCUITS
7
2
6
3
8
7
2
6
3
8
SD
ERROR
SD
ERROR
1, 4
5
1, 4
5
V
IN
V
IN
V
OUT
V
OUT
V
V
IN
V
V
OUT
IN
OUT
C
NOISE
C
NOISE
SET
SET
2.2 mF
GND
2.2 mF
2.2 mF
2.2 mF
GND
GND
GND
Optional
Si91821
Si91821
Figure 1.
Fixed Output
Figure 2.. Adjustable Output
7
8
SD
ERROR
ON/OFF
POWER_GOOD
1 MW
2
6
3
1, 4
5
V
V
V
IN
IN
V
OUT
OUT
C
SET
NOISE
2.2 mF
2.2 mF
0.033 mF
GND
GND
Si91821
Fixed Output, Low Noise, Full Features Application
Figure 3.
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
1
Si91821
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
a
Input Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
Power Dissipation (Package)
b
IN
8-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 666 mW
a
SD Input Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V
IN
SD
Output Current, I
. . . . . . . . . . . . . . . . . . . . . . . . . . Short Circuit Protected
Thermal Impedance (Q
)
JA
OUT
b
8-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 185_C/W
Output Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to V
+ 0.3 V
OUT
O(nom)
Notes
Maximum Junction Temperature, T
. . . . . . . . . . . . . . . . . . . . . . . 150_C
J(max)
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 10 mW/_C above T = 25_C
Storage Temperature, T
. . . . . . . . . . . . . . . . . . . . . . . . . . −55_C to 150_C
STG
A
ESD (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Input Voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.35 V to 6 V
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 300 mA
IN
OUT
Output Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 to 5.0 V
Operating Ambient Temperature, T . . . . . . . . . . . . . . . . . . . . −40_C to 85_C
OUT
A
SD Input Voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
IN
Operating Junction Temperature, T . . . . . . . . . . . . . . . . . . . −40_C to 125_C
SD
J
C
IN
= 2.2 mF, C
= 2.2 mF (ceramic, X5R or X7R type) , C
= 0.033 mF (ceramic)
OUT
NOISE
C
OUT
Range = 1 mF to 10 mF ("10%, x5R or x7R type)
C
IN
w C
OUT
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Limits
−40 to 85_C
V
IN
= V
+ 1 V, I
= 1 mA
OUT(nom)
OUT
C
IN
= 2.2 mF, C = 2.2 mF, V = 1.5 V
OUT SD
Parameter
Symbol
Tempa
Minb
Typc
Maxb
Unit
Input Voltage
V
2.35
1.5
6.0
5.0
IN
V
Output Voltage
V
OUT
Adjustable Version
1 mA v I v 300 mA
Full
Room
Full
−1.5
−2.5
1.191
1.179
1.5
Output Voltage Accuracy
(to stated output voltage)
%
V
OUT
OUT
V
2.5
OUT(nom)
Room
Full
1.215
1.239
1.251
Feedback Voltage (ADJ Version)
V
SET
V
Line Regulation
(Except 5-V Version)
From V = V
+ 1 V
IN
OUT(nom)
Full
−0.18
0.18
to V
+ 2 V
OUT(nom)
DV
100
Line Regulation (5-V Version)
OUT
From V = 5.5 V to 6 V
Full
Full
−0.18
−0.18
−0.18
0.18
0.18
0.18
20
IN
%/V
V
V
OUT(nom)
IN
V
= 1.5 V From V = 2.5 V to 3.5 V
IN
OUT
Line Regulation (ADJ Version)
V
OUT
= 5 V From V = 5.5 V to 6 V
Full
IN
I
= 10 mA
= 200 mA
= 300 mA
Room
Full
5
OUT
d
I
80
135
200
270
Dropout Voltage
V
IN
− V
mV
OUT
OUT
OUT
I
Full
120
150
500
600
0.1
I
= 0 mA
Full
OUT
I
I
= 200 mA
= 300 mA
Room
Room
Room
Room
Room
Room
Ground Pin Current
I
GND
OUT
OUT
mA
Shutdown Supply Current
Peak Output Current
I
V
SD
= 0 V
1
IN(off)
I
V
w 0.95 x V , t = 2 ms
OUT(nom) pw
500
mA
O(peak)
OUT
w/o C
260
37
NOISE
BW = 10 Hz to 100 kHz
= 150 mA
I
OUT
C
= 0.1 mF
NOISE
Output Noise Voltage
Ripple Rejection
e
mV (rms)
N
BW = 10 to 100 kHz
C
NOISE
= 33 nF
Room
54
I
= 10 mA
OUT
f = 1 kHz
Room
Room
Room
60
50
40
f = 10 kHz
DV
/DV
I = 150 mA
OUT
dB
OUT
IN
f = 100 kHz
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
2
Si91821
Vishay Siliconix
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
Limits
−40 to 85_C
V
IN
= V
+ 1 V, I
= 1 mA
OUT(nom)
OUT
Tempa
Minb
Typc Maxb
Unit
C
IN
= 2.2 mF, C = 2.2 mF, V = 1.5 V
OUT SD
Parameter
Symbol
V
IN
: V
+ 1 V to V
+ 2 V
OUT(nom)
OUT(nom)
Dynamic Line Regulation
Dynamic Load Regulation
Turn-on Overshoot
DV
Room
Room
Room
10
30
2.5
O(line)
t /t = 5 ms, I = 250 mA
OUT
r
f
mV
DV
O(load)
I
: 1 mA to 150 mA, t /t = 2 ms
OUT r f
V
IN
followed by SD = High Event
DV
%
OOS
C
v 100 nF
NOISE
C
OUT
= 10 mF, V
to 90% of final value,
OUT
IN
V
OUT
Turn-On-Time
t
Room
350
mS
ON
V
= 3.6 V
Thermal Shutdown
Thermal Shutdown Junction Temp
Thermal Hysteresis
T
Room
Room
Room
165
20
J(s/d)
_C
T
HYST
Short Circuit Current
I
V
OUT
= 0 V
800
mA
SC
Shutdown Input
V
High = Regulator ON (Rising)
Low = Regulator OFF (Falling)
Full
Full
1.5
V
IN
IH
SD Input Voltage
V
V
0.4
IL
I
V
= 0 V, Regulator OFF
= 6 V, Regulator ON
Room
Room
Full
0.01
1.0
IH
SD
e
SD Input Current
mA
I
V
SD
IL
Shutdown Hysteresis
V
100
mV
HYST
Error Output
Output High Leakage
Output Low Voltage
I
ERROR = V
Full
Full
0.01
2
mA
V
OFF
OUT(nom)
V
I
= 2 mA
0.4
OL
SINK
f, g
Power_Good Trip Threshold
(Rising)
0.93 x
OUT
0.95 x
0.97 x
OUT
V
Full
TH
V
V
OUT
V
2% x
OUT
f
Hysteresis
V
Room
Full
HYST
V
Error Delay
t
C
NOISE
v 100 nF
10
mS
DELAY
Notes
a. Room = 25_C, Full = −40 to 85_C.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing and are measured at T = 25_C.
A
d. The dropout voltage is defined as V − V
when V
is 100 mV below the value of V
for V = V
+ 2 V. This is applicable for voltages of 2.5 V or
IN
OUT
OUT
OUT
IN
OUT
higher.
e. The device’s shutdown pin includes a typical 6-MW internal pull-down resistor connected to ground.
f.
V
is defined as the output voltage of the DUT at 1 mA.
OUT
g. Typical only, from V
= 2.0 V to V
= 1.5 V.
OUT
OUT
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
3
Si91821
Vishay Siliconix
TIMING WAVEFORMS
V
IH
SD
V
IL
t
ON
V
NOM =
0.95 V
NOM
V
OUT
t
t
DELAY
DELAY
ERROR
Figure 4.
Timing Diagram for Power-Up
PIN CONFIGURATION
MSOP-8
1
8
v
ERROR
SD
OUT
2
3
4
7
6
5
v
IN
GND
C
NOISE
V
SET
OUT
Top View
PIN DESCRIPTION
Pin Number
Name
Function
1, 4
2
V
Output voltage. Connect C
between this pin and ground.
OUT
OUT
V
Input supply pin. Bypass this pin with a 2.2-mF ceramic or tantalum capacitor to ground.
Ground pin. Local ground for C and C
IN
3
GND
SET
.
OUT
NOISE
For fixed output voltage versions, this pin could be connected to GND. For adjustable output voltage version, this
voltage feedback pin sets the output voltage via an external resistor divider.
5
6
Noise bypass pin. For low noise applications, a 0.01-mF or larger ceramic capacitor should be connected from this pin
to ground.
C
NOISE
7
8
SD
By applying less than 0.4 V to this pin, the device will be turned off. Connect this pin to V if unused.
IN
ERROR
This open drain output is an error flag output which goes low when V
drops 5% below its nominal voltage.
OUT
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
4
Si91821
Vishay Siliconix
BLOCK DIAGRAM
Switches shown for device in normal operating mode (SD = HIGH)
5
SET
6
C
NOISE
2
V
IN
C
IN
2.2 mF
7
SD
ON
+
−
RFB2
RFB1
OFF
To V
1, 4
IN
V
OUT
60 mV
6 MW
C
OUT
2.2 mF
2 mA
+
+
R
EXT
−
ERROR
8
+
−
1.215 V
+
V
REF
−
3
GND
Figure 5.
300-mA CMOS LDO Regulator
5
SET
6
C
NOISE
2
7
V
IN
C
IN
2.2 mF
R
R
2
V
SET
SD
ON
1
+
OFF
−
To V
IN
1, 4
V
OUT
60 mV
6 MW
C
OUT
2.2 mF
2 mA
+
+
−
R
EXT
ERROR
8
+
−
1.215 V
+
V
REF
−
3
GND
Figure 6.
300-mA CMOS LDO Regulator (Adjustable Output)
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
5
Si91821
Vishay Siliconix
DETAILED DESCRIPTION
The Si91821 is a low drop out, low quiescent current, and very
linear regulator with very fast transient response. It is primarily
designed for battery powered applications where battery run
time is at a premium. The low quiescent current allows
extended standby time while low drop out voltage enables the
system to fully utilize battery power before recharge. The
Si91821 is a very fast regulator with bandwidth exceeding
50 kHz while maintaining low quiescent current at light load
conditions. With this bandwidth, the Si91821 is the fastest
LDO available today. The Si91821 is stable with any output
capacitor type from 1 mF to 10.0 mF. However, X5R or X7R
ceramic capacitors are recommended for best output noise
and transient performance.
SET
SET is not connected internally for the fixed voltage version.
Therefore, it can be connected to GND optionally. For the
adjustable output version, use a resistor divider R1 and R2,
connect R1 from VOUT to SET and R2 from SET to ground. R2
should be in the 25-kW to 150-kW range for low power
consumption, while maintaining adequate noise immunity.
The formula below calculates the value of R1, given the
desired output voltage and the R2 value.
ǒ
Ǔ
VOUT * VSET R2
R1 +
(1)
VSET
VIN
V
is nominally 1.215 V.
SET
VIN is the input supply pin. The bypass capacitor for this pin
is not critical as long as the input supply has low enough source
impedance. For practical circuits, a 1.0-mF or larger ceramic
capacitor is recommended. When the source impedance is
not low enough and/or the source is several inches from the
Si91821, then a larger input bypass capacitor is needed. It is
required that the equivalent impedance (source impedance,
wire, and trace impedance in parallel with input bypass
capacitor impedance) must be smaller than the input
impedance of the Si91821 for stable operation. When the
source impedance, wire, and trace impedance are unknown,
it is recommended that an input bypass capacitor be used of
a value that is equal to or greater than the output capacitor.
SHUTDOWN (SD)
SD controls the turning on and off of the Si91821. VOUT is
guaranteed to be on when the SD pin voltage equals or is
greater than 1.5 V. VOUT is guaranteed to be off when the SD
pin voltage equals or is less than 0.4 V. During shutdown
mode, the Si91821 will draw less than 2-mA current from the
source. To automatically turn on VOUT whenever the input is
applied, tie the SD pin to VIN.
ERROR
ERROR is an open drain output that goes low when VOUT is
less than 5% of its normal value. As with any open drain output,
an external pull up resistor is needed. This function is active
in shutdown.
VOUT
VOUT is the output voltage of the regulator. Connect a bypass
capacitor from VOUT to ground. The output capacitor can be
any value from 1.0 mF to 10.0 mF. A ceramic capacitor with
X5R or X7R dielectric type is recommended for best output
noise, line transient, and load transient performance.
The ERROR pin must be left opened if not used.
CNOISE
GND
For low noise application, connect a high frequency ceramic
capacitor from CNOISE to ground. A 0.01-mF or a 0.1-mF X5R
or X7R is recommended.
Ground is the common ground connection for VIN and VOUT
It is also the local ground connection for CNOISE, SET, and SD.
.
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
6
Si91821
Vishay Siliconix
ORDERING INFORMATION
Standard
Part Number
Lead (Pb)-Free
Part Number
Temperature
Range
Marking Voltage
Package
1821
1.80 V
1800
Si91821DH-18-T1
Si91821DH-25-T1
Si91821DH-28-T1
Si91821DH-30-T1
Si91821DH-33-T1
Si91821DH-50-T1
Si91821DH-AD-T1
Si91821DH-18-T1—E3
1821
2.50 V
2500
Si91821DH-25-T1—E3
Si91821DH-28-T1—E3
Si91821DH-30-T1—E3
Si91821DH-33-T1—E3
Si91821DH-50-T1—E3
Si91821DH-AD-T1—E3
1821
2.80 V
2800
1821
3.00 V
3000
−40 to 85_C
MSOP-8
1821
3.30 V
3300
1821
5.00 V
5000
1821
Adjustable
ADJ
Eval Kit
Temperature Range
Board Type
Si91821DB
−40 to 85_C
Surface Mount
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Dropout Voltage vs. Load Current
Dropout Characteristic
250
200
150
100
50
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
= 2.775 V
V
R
= 2.775 V
= 16.5 W
OUT
OUT
LOAD
0
0
100
200
300
(mA)
400
500
0
1
2
3
4
5
6
I
V
(V)
LOAD
IN
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
7
Si91821
Vishay Siliconix
TYPICAL CHARACTERISTICS (INTERNALLY REGULATED, 25_C UNLESS NOTED)
Dropout Voltage vs. Temperature
Normalized Output Voltage vs. Load Current
180
150
120
90
0.30
0.15
I
= 300 mA
OUT
V
= 2.775 V
OUT
0.00
I
= 200 mA
OUT
−0.15
−0.30
−0.45
−0.60
−0.75
60
30
I
I
= 10 mA
= 0 mA
OUT
0
OUT
−50 −25
0
25
50
75
100 125 150
0
50
100
150
200
250
300
350
Junction Temperature (_C)
Load Current (mA)
Normalized V
vs. Temperature
Dropout Voltage vs. V
OUT
OUT
0.6
0.4
180
160
140
120
100
80
0.2
−0.0
−0.2
−0.4
−0.6
−0.8
−1.0
−1.2
−1.4
−1.6
I
= 300 mA
OUT
I
= 0 mA
OUT
60
I
= 200 mA
OUT
I
I
= 100 mA
= 300 mA
OUT
40
OUT
20
I
= 10 mA
OUT
0
−40 −20
0
20
40
60
80 100 120 140
2.0
2.5
3.0
3.5
4.0
4.5
5.0
Junction Temperature (_C)
V
OUT
No Load Current vs. Input Voltage
GND Pin Current vs. Temperature and Load
250
200
150
100
50
1500
1200
900
600
300
0
85_C
I
I
= 300 mA
= 200 mA
OUT
25_C
OUT
−40_C
I
= 0 mA
OUT
0
0
1
2
3
4
5
6
7
−40 −20
0
20
40
60
80 100 120 140
Input Voltage (V)
Junction Temperature (_C)
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
8
Si91821
Vishay Siliconix
TYPICAL WAVEFORMS
Load Transient Response-1
Load Transient Response-2
V
OUT
10 mV/div
V
OUT
10 mV/div
I
LOAD
100 mA/div
I
LOAD
100 mA/div
5.00 ms/div
5.00 ms/div
V
= 2.775 V
= 2.2 mF
V
= 2.775 V
OUT
OUT
OUT
OUT
C
C
= 2.2 mF
I
t
= 1 to 150 mA
I
t
= 150 to 1 mA
LOAD
rise
LOAD
= 2 msec
fall
= 2 msec
Load Transient Response-3
Load Transient Response-4
V
OUT
10 mV/div
V
OUT
10 mV/div
I
LOAD
100 mA/div
I
LOAD
100 mA/div
5.00 ms/div
5.00 ms/div
V
= 2.775 V
= 1.0 mF
V
= 2.775 V
= 1.0 mF
OUT
OUT
OUT
C
C
OUT
I
t
= 1 to 150 mA
I
t
= 150 to 1 mA
LOAD
rise
LOAD
= 2 msec
fall
= 2 msec
LineTransient Response-1
LineTransient Respons-2
V
OUT
2 V/div
V
IN
2 V/div
V
V
OUT
10 mV/div
OUT
10 mV/div
20 ms/div
20 ms/div
V
V
C
C
= 4.77 to 5.77 V
V
OUT
C
C
= 5.77 to 4.77 V
INSTEP
INSTEP
OUT
OUT
IN
= 2.775 V
V
= 2.775 V
= 2.2 mF
= 2.2 mF
OUT
= 2.2 mF
= 2.2 mF
IN
I
t
= 300 mA
I
t
= 300 mA
LOAD
rise
LOAD
= 5 msec
fall
= 5 msec
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
9
Si91821
Vishay Siliconix
TYPICAL WAVEFORMS
Turn-On Sequence
Turn-Off Sequence
V
IN
CH-3 2 V/div
V
2 V/div
2 V/div
IN
V
OUT
CH-1 2 V/div
V
OUT
ERROR 2 V/div
ERROR
CH-2 2 V/div
100 ms/div
20 ms/div
V
V
= 4 V
V
V
= 4 V
IN
OUT
C
IN
OUT
C
= 2.775 V
= 0.033 mF
= 2.775 V
= 0.033 mF
NOISE
NOISE
I
= 300 mA
I
= 300 mA
LOAD
LOAD
Output Noise
Noise Spectrum
20.0
Ǹ
mVń Hz
200 mV/div
0.01
10 ms/div
10 Hz
1 MHz
V
V
OUT
C
= 3.80 V
V
V
= 3.80 V
IN
IN
= 2.775 V
= 2.775 V/10 mA
OUT
OUT
I
= 300 mA
C
= 0.033 mF
NOISE
= 0.033 mF
NOISE
BW = 10 Hz to 1 MHz
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?71614.
Document Number: 71614
S-51147–Rev. E, 20-Jun-05
www.vishay.com
10
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