SI786DSG-T1-E3 [VISHAY]
DUAL PWM BUCK CONTROLLER -10 TO 90C-LEAD - Tape and Reel;型号: | SI786DSG-T1-E3 |
厂家: | VISHAY |
描述: | DUAL PWM BUCK CONTROLLER -10 TO 90C-LEAD - Tape and Reel 信息通信管理 开关 光电二极管 |
文件: | 总16页 (文件大小:236K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Product is End of Life 3/2014
Si786
Vishay Siliconix
Dual-Output Power-Supply Controller
FEATURES
•
•
•
•
Fixed 5 V and 3.3 V Step-down Converters
Less than 500 µA Quiescent Current per Converter
25 µA Shutdown Current
5.5 V to 30 V Operating Range
DESCRIPTION
The Si786 Dual Controller for Portable Computer Power
Conversion is pin and functionally compatible with the
MAX786 dual-output power supply controller for notebook
computers. The device is designed as a drop-in replacement
for that circuit.
A complete power conversion and management system can
be implemented with the Si786 Dual Controller for Portable
Computer Power Conversion, an inexpensive linear regula-
tor, the Si9140 SMP Controller for High Performance Proces-
®
sor Power Supplies, five Si4410 N-Channel TrenchFET
Power MOSFETs, one Si4435 P-Channel TrenchFET Power
MOSFET, and two Si9712 PC Card (PCMCIA) Interface
Switches.
The circuit is a system level integration of two step-down
controllers, micropower 5 V and 3.3 V linear regulators, and
two comparators. The controllers perform high efficiency
conversion of the battery pack energy (typically 12 V) or the
output of an ac to dc wall converter (typically 18 V to 24 V dc)
to 5 V and 3.3 V system supply voltages. The micropower lin-
ear regulator can be used to keep power management and
back-up circuitry alive during the shutdown of the step-down
converters. The comparators can be biased at any voltage
between 2.7 V and the input voltage, simplifying battery mon-
itoring or providing sufficient voltage to enhance the gate of
a low on-resistance N-Channel FET used in switching power
to different zones in the system.
The Si9130 Pin-Programmable Dual Controller for Portable
PCs is another integrated system level devices for portable
PC power systems.
The Si786 is available in both standard and lead (Pb)-free
28-pin SSOP packages and specified to operate over the
(0 °C to 70 °C), (- 10 °C to 90 °C) and (- 40 °C to 85 °C) tem-
perature ranges. See Ordering Information for corresponding
part numbers.
FUNCTIONAL BLOCK DIAGRAM
3.3 V
µP
5.5. V
to
30 V
Power
Memory
Section
5 V
Peripherals
Si786
SHUTDOWN
5 V ON/OFF
3.3 V ON/OFF
SYNC
Low-Battery Warning
Power-Good
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
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Product is End of Life 3/2014
Si786
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
V+ to GND
PGND to GND
VL to GND
Limit
Unit
- 0.3 V to 36 V
2
- 0.3 V to 7 V
BST3, BST5 to GND
LX3 to BST3
- 0.3 V to 36 V
- 7 V to 0.3 V
- 7 V to 0.3 V
LX5 to BST5
Inputs/Outputs to GND (D1, D2, SHDN, ON5, REF, SS5, CS5, FB5, SYNC, CS3, FB3,
SS3, ON3)
V
- 0.3 V, (VL + 0.3 V)
V
H to GND
- 0.3 V to 20 V
Q1, Q2 to GND
DL3, DL5 to PGND
DH3 to LX3
- 0.3 V, (VH + 0.3 V)
- 0.3 V, (VL + 0.3 V)
- 0.3 V (BST3 + 0.3 )
- 0.3 V (BST5 + 0.3 )
DH5 to LX5
REF, VL Short to GND
Momentary
REF Current
VL Current
20
50
mA
Continuous Power Dissipation (TA = 70 °C)a
28-Pin SSOPb
762
mW
°C
Si786CG/CRG/CSG (C-Grade)
Si786LG/LRG/LSG (L-Grade)
Si786DG/DRG/DSG (D-Grade)
0 to 70
- 10 to 90
- 40 to 85
300
Operating Temperature Range:
(TMIN to TMAX
)
Lead Temperature (soldering, 10 sec)
Notes:
a. Device Mounted with all leads soldered or welded to PC board.
b. Derate 9.52 mW/°C above 70 °C.
Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent
damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any
one time.
SPECIFICATIONS
Limitse
Specific Test Conditions
V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V
Parameter
Unit
Mina
Typb
Maxa
Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX
3.3 V and 5 V Step-Down Controllers
Input Supply Range
5.5
30
0 mV < (CS5 - FB5) < 70 mV, 6 V < V + < 30 V
(includes load and line regulation)
FB5 Output Voltage
FB3 Output Voltage
4.80
5.08
5.20
V
Si786CG/LG/DG
3.17
3.32
3.46
3.35
3.50
3.65
2.5
3.46
3.60
3.75
0 mV < (CS3 - FB3) < 70 mV
Si786CRG/LRG/DRG
Si786CSG/LSG/DSG
6 V < V + < 30 V
(includes load and line regulation)
Load Regulation
Line Regulation
Either Controller (CS_ to FB_ = 0 to 70 mV)
Either Controller (V+ = 6 V to 30 V)
%
0.03
100
100
4.0
%/V
80
77
2.5
2.3
2
120
120
6.5
CS3 - FB3 or CS5 - FB5
Current-Limit Voltage
mV
Si786DG/DRG/DSG
Si786DG/DRG/DSG
SS3/SS5 Source Current
µA
4.0
6.5
SS3/SS5 Fault Sink Current
mA
Internal Regulator and Reference
ON5 = ON3 = 0 V, 5.5 V < V+ < 30 V
VL Output Voltage
4.5
3.6
5.5
4.2
0 mA < IL < 25 mA
V
VL Fault Lockout Voltage
Falling Edge, Hysteresis = 1 %
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Document Number: 70189
S-40807-Rev. J, 26-Apr-04
Product is End of Life 3/2014
Si786
Vishay Siliconix
SPECIFICATIONS
Limitse
Specific Test Conditions
V+ = 15 V, IVL = IREF = 0 mA, SHDN = ON3 = ON5 = 5 V
Parameter
Unit
Mina
Typb
Maxa
Other Digital Input Levels 0 V or 5 V, TA = TMIN to TMAX
Internal Regulator and Reference
VL/FB5 Switchover Voltage
Rising Edge of FB5, Hysteresis = 1 %
4.2
3.24
2.4
4.7
3.36
3.2
75
No External Loadc
Falling Edge
0 mA < IL < 5 mAd
V
REF Output Voltage
REF Fault Lockout Voltage
REF Load Regulation
30
25
mV
SHDN = D1 = D2 = ON3 = ON5 = 0 V
V+ = 30 V
V+ Shutdown Current
V+ Standby Current
40
µA
70
70
110
115
8.6
9.0
60
D1 = D2 = ON3 = ON5 = 0 V
V+ = 30 V
Si786DG/DRG/DSG
5.5
5.5
30
D1 = D2 = 0 V, FB5 = CS5 = 5.25 V
FB3 = CS3 = 3.5 V
Quiescent Power Consumption (both
PWM controllers on)
mV
µA
Si786DG/DRG/DSG
FB5 = CS5 = 5.25 V, VL Switched Over to FB5
V+ Off Current
Comparators
1.61
1.60
1.69
1.69
100
D1, D2 Trip Voltage
Falling Edge Hysteresis = 1 %
V
Si786DG/DRG/DSG
D1, D2 Input Current
D1 = D2 = 0 V, 5 V
nA
Q1, Q2 Source Current
Q1, Q2 Sink Current
12
200
20
30
V
H = 15 V, VOUT = 2.5 V
µA
500
1000
Q1, Q2 Output High Voltage
Q1, Q2 Output Low Voltage
Quiescent VH Current
ISOURCE = 5 A, VH = 3 V
ISINK = 20 A, VH = 3 V
VH - 0.5
V
0.4
10
VH = 18 V, D1 = D2 = 5 V, No External Load
4
µA
Oscillator and Inputs/Outputs
270
260
170
165
200
200
300
300
200
200
330
330
230
230
SYNC = 3.3 V
Si786DG/DRG/DSG
Si786DG/DRG/DSG
Oscillator Frequency
kHz
ns
SYNC = 0 V, 5 V
SYNC High Pulse Width
SYNC Low Pulse Width
SYNC Rise/Fall Time
Oscillator SYNC Range
Not Tested
200
350
240
89
kHz
%
SYNC = 3.3 V
92
95
Maximum Duty Cycle
Input Low Voltage
SYNC = 0 V, 5 V
92
SHDN, ON3, ON5 SYNC
SHDN, ON3, ON5
0.8
1
2.4
V
Input High Voltage
VL - 0.5
SYNC
SHDN, ON3, ON5, VIN = 0 V, 5 V
VOUT = 2 V
Input Current
µA
A
DL3/DL5 Sink/Source Current
DH3/DH5 Sink/Source Current
DL3/DL5 On-Resistance
1
1
BST3 - LX3 = BST5 - LX5 = 4.5 V, VOUT = 2 V
High or Low
7
7
Ω
High or Low
BST3 - LX3 = BST5 - LX5 = 4.5 V
DH3/DH5 On-Resistance
Notes:
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
b. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
c. The main switching outputs track the reference voltage. Loading the reference reduces the main outputs slightly according to the closed-loop
gain (AVCL) and the reference voltage load-regulation error. AVCL for the 3.3 V supply is unity gain. AVCL for the 5 V supply is 1.54.
d. Since the reference uses VL as its supply, its V+ line regulation error is insignificant.
e. Limits are for all temperature grades unless otherwise noted.
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
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Product is End of Life 3/2014
Si786
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C unless noted
100
90
80
70
60
50
100
V + = 6 V
V + = 6 V
90
V + = 15 V
V + = 15 V
80
V + = 30 V
V + = 30 V
70
3.3 V Off
SYNC = 0 V, 3.3 V Off
60
50
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
5 V Output Current (A)
5 V Output Current (A)
Efficiency vs. 5 V Output Current, 300 kHz
Efficiency vs. 5 V Output Current, 200 kHz
100
90
80
70
60
50
100
90
80
70
60
50
V + = 6 V
V + = 6 V
V + = 15 V
V + = 15 V
V + = 30 V
V + = 30 V
5 V On
SYNC = 0 V, 5 V On
0.001
0.01
0.1
1
10
0.001
0.01
0.1
1
10
3.3 V Output Current (A)
3.3 V Output Current (A)
Efficiency vs. 3.3 V Output Current, 300 kHz
Efficiency vs. 3.3 V Output Current, 200 kHz
0.5
0.4
0.3
0.2
0.1
0.0
30
25
20
15
10
5
ON = ON = 0 V
ON = ON = High
3
5
3
5
0
0
6
12
18
24
30
0
6
12
18
24
30
Supply Voltage (V)
Standby Supply Current vs. Supply Voltage
Supply Voltage (V)
Quiescent Supply Current vs. Supply Voltage
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Document Number: 70189
S-40807-Rev. J, 26-Apr-04
Product is End of Life 3/2014
Si786
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C unless noted
100
75
50
25
0
1.0
0.8
0.6
0.4
0.2
0.0
5 V Output
Still Regulating
SHDN = 0 V
300 kHz
200 kHz
0
6
12
18
24
30
0.001
0.01
0.1
5 V Output Current (A)
1
10
Supply Voltage (V)
Shutdown Supply Current vs. Supply Voltage
Minimum VIN to VOUT Differential
vs. 5 V Output Current
1000.0
SYNC = REF (300 kHz)
ON = ON = 5 V
3
5
100.0
10.0
1.0
5 V, V + = 30 V
5 V, V + = 7.5 V
3.3 V, V + = 7.5 V
0.1
0.1
1
10
Load Current (mA)
Switching Frequency vs. Load Current
100
1000
5 V Output
50 mV/div
LX 10 V/div
2 V/div
5 V Output
50 mV/div
500 ns/div
200 µS/div
= 100 mA
5 V Output Current = 1 A
I
Load
V
IN
= 16 V
V
IN
= 10 V
Pulse-Width Modulation Mode Waveforms
Pulse-Skipping Waveforms
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
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Si786
Vishay Siliconix
TYPICAL CHARACTERISTICS 25 °C unless noted
3 A
3 A
LOAD CURRENT
LOAD CURRENT
0 A
0 A
5 V Output
50 mV/div
3.3 V Output
50 mV/div
200 µS/div
= 15 V
200 µS/div
IN
V
V
= 15 V
IN
5 V Load-Transient Response
3.3 V Load-Transient Response
5 V Output
50 mV/div
5 V Output
50 mV/div
V
, 16 to 10 V
V
, 10 to 16 V
IN
2 V/div
IN
2 V/div
20 µS/div
LOAD
20 µS/div
LOAD
I = 2 A
I
= 2 A
5 V Line-Transient Response, Rising
5 V Line-Transient Response, Falling
3.3 V Output
50 mV/div
3.3 V Output
50 mV/div
V
, 10 to 16 V
V
, 16 to 10 V
IN
2 V/div
IN
2 V/div
20 µS/div
LOAD
20 µS/div
LOAD
I
= 2 A
I
= 2 A
3.3 V Line-Transient Response, Rising
3.3 V Line-Transient Response, Falling
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Document Number: 70189
S-40807-Rev. J, 26-Apr-04
Product is End of Life 3/2014
Si786
Vishay Siliconix
PIN CONFIGURATION AND ORDERING INFORMATION
CS
3
1
28
FB
3
SS
2
3
27
26
25
24
23
22
21
20
19
18
17
16
15
DH
3
3
3
1
2
ON
D
LX
3
BST
4
3
D
5
DL
V+
3
V
H
6
Q
7
V
L
2
1
SSOP-28
Q
8
FB
5
GND
REF
9
PGND
DL
5
10
11
12
13
14
SYNC
SHDN
BST
5
LX
5
ON
DH
5
5
SS
5
CS
5
Top View
PIN DESCRIPTION
Pin
Symbol
CS3
SS3
ON3
D1
Description
1
Current-sense input for 3.3 V Buck controller - this pins over current threshold is 100 mV with respect to FB3.
Soft-start input for 3.3 V. Connect capacitor from SS3 to GND.
2
3
ON/OFF logic input disables the 3.3 V Buck controller. Connect directly to VL for automatic turn-on.
Comparator #1 noninverting input, threshold = 1.650 V. Comparator #1 output = Q1. Connect to GND if unused.
Comparator #2 noninverting input (see D1).
4
5
D2
6
VH
External bias supply-voltage input for comparators #1 and #2.
Comparator #2 output. Sources 20 µA from VH when D2 is high. Sinks 500 µA to GND when D2 is low regardless of VH
input voltage.
Q2
7
8
9
Q1
Comparator #1 output (see Q2).
GND
REF
Analog ground.
10
3.3 V reference output. Supplies external loads up to 5 mA.
Oscillator control/synchronization input. Connect capacitor to GND, 1 µF/mA output or 0.22 µF minimum. For external clock
synchronization, a rising edge starts a new cycle to start. To use internal 200 kHz oscillator, connect to VL or GND. For
300 kHz oscillator, connect to REF.
11
SYNC
Shutdown logic input, active low. Connect to VL for automatic turn-on. The 5 V VL supply will not be disabled in shutdown
allowing connection to SHDN.
12
SHDN
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
ON5
SS5
CS5
DH5
LX5
ON/OFF logic input disables the 5 V Buck Controller. Connect to VL for automatic turn-on.
Soft-start control input for 5 V Buck controller. Connect capacitor from SS5 to GND.
Current-sense input for 5 V Buck controller - this pins over current threshold is 100 mV referenced to FB3.
Gate-drive output for the 5 V supply high-side N-Channel MOSFET.
Inductor connection for the 5 V supply.
BST5
DL5
Boost capacitor connection for the 5 V supply.
Gate-drive output for the 5 V supply rectifying N-Channel MOSFET.
PGND Power Ground.
FB5
VL
Feedback input for the 5 V Buck controller.
5 V logic supply voltage for internal circuitry - able to source 5 mA external loads. VL remains on with valid voltage at V+.
Supply voltage input.
V+
DL3
BST3
LX3
DH3
FB3
Gate-drive output for the 3.3 V supply rectifying N-Channel MOSFET.
Boost capacitor connection for the 3.3 V supply.
Inductor connection for the 3.3 V supply.
Gate-drive output for the 3.3 V supply high-side N-Channel MOSFET.
Feedback input for the 3.3 V Buck controller.
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
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Product is End of Life 3/2014
Si786
Vishay Siliconix
ORDERING INFORMATION
Lead (Pb)-free
VOUT
3.3 V
3.45 V
3.6 V
3.3 V
3.45 V
3.6 V
3.3 V
3.45 V
3.6 V
Part Number
Temp Range
Part Number
Si786CG-T1-E3
Si786CRG-T1-E3
Si786CSG-T1-E3
Si786LG-T1-E3
Si786LRG-T1-E3
Si786LSG-T1-E3
Si786DG-T1-E3
Si786DRG-T1-E3
Si786DSG-T1-E3
Si786CG
Si786CG-T1
Si786CRG
Si786CRG-T1
Si786CSG
C-Grade
0 to 70 °C
Si786CSG-T1
Si786LG
Si786LG-T1
Si786LRG
L-Grade
- 10° to 90 °C
Si786LRG-T1
Si786LSG
Si786LSG-T1
Si786DG
Si786DG-T1
Si786DRG
Si786DRG-T1
Si786DSG
D-Grade
- 40° to 85 °C
Si786DSG-T1
Demo Board
Temp Range
Board Type
Si786DB
0 to 70 °C
Surface Mount
DESCRIPTION OF OPERATION
The Si786 is a dual step-down converter, which takes a 5.5 V
to 30 V input and supplies power via two PWM controllers
(see Figure 1). These 5 V and 3.3 V supplies run on an
optional 300 kHz or 200 kHz internal oscillator, or an external
sync signal. Amount of output current is limited by external
components, but can deliver greater than 6 A on either sup-
ply. As well as these two main Buck controllers, additional
loads can be driven from two micropower linear regulators,
one 5 V (VL) and the other 3.3 V (REF) - see Figure 2. These
supplies are each rated to deliver 5 mA. If the linear regulator
circuits fall out of regulation, both Buck controllers are shut
down.
A low-side switching MOSFET connected to DL3 increases
efficiency by reducing the voltage across the rectifier diode.
A low value sense resistor in series with the inductor sets the
maximum current limit, to disallow current overloads at
power-on or in short-circuit situations.
The soft-start feature on the Si786 is capacitor programma-
ble; pin SS3 functions as a constant current source to the
external capacitor connected to GND. Excess currents at
power-on are avoided, and power-supplies can be
sequenced with different turn-on delay times by selecting the
correct capacitor value.
Two voltage comparators with adjustable output voltages are
included in the Si786. They can be used for gate drive in load
switching applications, where N-Channel MOSFETs are
used. Logic level voltages can be generated as well, for
instance to serve as P interfacing (e.g. a Power-good signal).
5 V Switching Supply
The 5 V supply is regulated by a current-mode PWM control-
ler which is nearly the same as the 3.3 V output. The dropout
voltage across the 5 V supply, as shown in the schematic in
Figure 1, is 400 mV (typ) at 2 A. If the voltage at V+ falls,
nearing 5 V, the 5 V supply will lower as well, until the VL lin-
ear regulator output falls below the 4 V undervoltage lockout
threshold. Below this threshold, the 5 V controller is shut off.
3.3 V Switching Supply
The 3.3 V supply is regulated by a current-mode PWM con-
troller in conjunction with several externals: two N-Channel
MOSFETs, a rectifier, an inductor and output capacitors (see
Figure 1). The gate drive supplied by DH3 needs to be
greater than VL , so it is provided by the bootstrap circuit con-
sisting of a 100 nF capacitor and diode connected to BST3 .
The frequency of both PWM controllers is set at 300 kHz
when the SYNC pin is tied to REF. Connecting SYNC to
either GND or VL sets the frequency at 200 kHz.
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Document Number: 70189
S-40807-Rev. J, 26-Apr-04
Product is End of Life 3/2014
Si786
Vishay Siliconix
3.3 V and 5 V Switching Controllers
Soft start helps prevent current spikes at turn-on and allows
separate supplies to be delayed using external programma-
bility.
Each PWM controller on the Si786 is identical with the
exception of the preset output voltages. The controllers only
share three functional blocks (see Figure 2): the oscillator,
the voltage reference (REF) and the 5 V logic supply (VL).
The 3.3 V and 5 V controllers are independently enabled with
pins ON3 and ON5 , respectively. The PWMs are a direct-
summing type, without the typical integrating error amplifier
along with the phase shift which is a side effect of this type of
topology. Feedback compensation is not needed, as long as
the output capacitance and its ESR requirements are met,
according to the Design Considerations section of this data
sheet.
Synchronous Rectifiers
Synchronous rectification replaces the Schottky rectifier with
a MOSFET, which can be controlled to increase the effi-
ciency of the circuit.
When the high-side MOSFET is switched off, the inductor will
try to maintain its current flow, inverting the inductor’s polar-
ity. The path of current then becomes the circuit made of the
Schottky diode, inductor and load, which will charge the out-
put capacitor. The diode has a 0.5 V forward voltage drop,
which contributes a significant amount of power loss,
decreasing efficiency. A low-side switch is placed in parallel
with the Schottky diode and is turned on just after the diode
begins to conduct. Because the rDS(ON) of the MOSFET is
low, the I*R voltage drop will not be as large as the diode,
which increases efficiency. The low-side rectifier is shut off
when the inductor current drops to zero.
The main PWM comparator is an open loop device which is
comprised of three comparators summing four signals: the
feedback voltage error signal, current sense signal, slope-
compensation ramp and voltage reference as shown in Fig-
ure 3. This method of control comes closer to the ideal of
maintaining the output voltage on a cycle-by-cycle basis.
When the load demands high current levels, the controller is
in full PWM mode. Every cycle from the oscillator asserts the
output latch and drives the gate of the high-side MOSFET for
Shoot-through current is the result when both the high-side
and rectifying MOSFETs are turned on at the same time.
Break-before-make timing internal to the Si786 manages this
potential problem. During the time when neither MOSFET is
on, the Schottky is conducting, so that the body diode in the
low-side MOSFET is not forced to conduct.
a period determined by the duty cycle (approximately VOUT
/
VIN 100 %) and the frequency. The high-side switch turns off,
setting the synchronous rectifier latch and 60 ns later, the
rectifier MOSFET turns on. The low-side switch stays on until
the start of the next clock cycle in continuous mode, or until
the inductor current becomes positive again in discontinuous
mode. In over-current situations, where the inductor current
is greater than the 100 mV current-limit threshold, the high-
side latch is reset and the high-side gate drive is shut off.
Synchronous rectification is always active when the Si786 is
powered-up, regardless of the operational mode.
Gate-Driver Boost
During low-current load requirements, the inductor current
will not deliver the 25 mV minimum current threshold. The
Minimum Current comparator signals the PWM to enter
pulse-skipping mode when the threshold has not been
reached. Pulse-skipping mode skips pulses to reduce
switching losses, the losses which decrease efficiency the
most at light load. Entering this mode causes the minimum
current comparator to reset the high-side latch at the begin-
ning of each oscillator cycle.
The high-side N-Channel drive is supplied by a flying-capac-
itor boost circuit (see Figure 4). The capacitor takes a charge
from VL and then is connected from gate to source of the
high-side MOSFET to provide gate enhancement. At power-
up, the low-side MOSFET pulls LX_ down to GND and
charges the BST_ capacitor connected to 5 V. During the
second half of the oscillator cycle, the controller drives the
gate of the high-side MOSFET by internally connecting node
BST_ to DH_. This supplies a voltage 5 V higher than the
battery voltage to the gate of the high-side MOSFET.
Soft-Start
Oscillations on the gates of the high-side MOSFET in discon-
tinuous mode are a natural occurrence caused by the LC net-
work formed by the inductor and stray capacitance at the LX_
pins. The negative side of the BST_ capacitor is connected
to the LX_ node, so ringing at the inductor is translated
through to the gate drive.
To slowly bring up the 3.3 V and 5 V supplies, connect
capacitors from SS3 and SS5 to GND. Asserting ON3 or ON5
starts a 4 µA constant current source to charge these capac-
itors to 4 V. As the voltage on these pins ramps up, so does
the current limit comparator threshold, to increase the duty
cycle of the MOSFETs to their maximum level. If ON3 or ON5
are left low, the respective capacitor is discharged to GND.
Leaving the SS3 or SS5 pins open will cause either controller
to reach the terminal over-current level within 10 µs.
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
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Product is End of Life 3/2014
Si786
Vishay Siliconix
SCHEMATIC DRAWINGS
INPUT
5.5 V to 30 V
100 Ω
C1
22 µF
C10
22 µF
D2A
1N4148
0.1 µF
D2B
1N4148
5 V at 5 mA
Si786
10 µF
C5
0.1 µF
C4
0.1 µF
23
25
27
26
22
18
16
17
V
V+
L
BST
BST
3
5
N1
N3
N2
N3
DH
DH
LX
3
5
R1
25 mΩ
L1
10 µH
L2
10 µH
R2
25 mΩ
LX
3
5
5 V at
3 A
3.3 V
at 3 A
D1
D1FS4
D1
D1FS4
24
19
C7
150 µF
C6
330 µF
DL
DL
3
5
1
28
2
15
21
14
CS
CS
FB
SS
3
3
3
5
5
5
C12
150 µF
(Note 1)
(Note 1)
FB
SS
C9
0.01 µF
C8
0.01 µF
3
6
4
ON
ON
3.3 V ON/OFF
5 V ON/OFF
SHUTDOWN
V
COMPARATOR SUPPLY INPUT
3
H
13
12
11
9
IN
D
5
1
1
COMPARATOR 1
8
OUT
SHDN
SYNC
GND
Q
5
D
IN
OSC SYNC
2
2
COMPARATOR 2
7
Q
OUT
10
20
REF
PGND
Note 1: Use short, Kelvin-connected
PC board traces placed very
close to one another.
3.3 V at 5 mA
C3
1 µF
Figure 1. Si786 Application Circuit
5 V LDO
Linear
Regulator
FB
CS
BST
3
V+
3
3.3 V
PWM
3
V
L
DH
LX
3
Controller
(See Figure 3)
3.3 V
Reference
3
REF
DL
3
ON
ON
SS
3
4.5 V
SHDN
PGND
4 V
ON
3
FB
5
CS
5
2.8 V
5 V
PWM
Controller
(See Figure 3)
BST
5
DH
5
STANDBY
300 kHz/200 kHz
Oscillator
SYNC
ON
LX
5
DL
5
ON
SS
5
ON
5
V
H
D
1
Q
1
1.65 V
D
2
Q
2
1.65 V
Figure 2. Si786 Block Diagram
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Document Number: 70189
S-40807-Rev. J, 26-Apr-04
Product is End of Life 3/2014
Si786
Vishay Siliconix
CS
_
1X
60 kHz
LPF
FB_
REF, 3.3 V
(or Internal 5 V
Reference)
Summing
Comparator
BST_
R
S
Q
Level
DH
Shift
_
LX_
OSC
Slope
Comp
Minimum Current
(Pulse-Skipping)
25 mV
V
L
Current
Limit
4 µA
Shoot-
Through
Control
0 mV to
100 mV
SS_
ON_
30R
1R
3.3 V
Synchronous
Rectifier Control
V
L
R
S
Q
Level
Shift
DL_
PGND
Figure 3. Si786 Controller Block Diagram
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
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Product is End of Life 3/2014
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BATTERY
INPUT
V
L
V
L
BST_
DH_
Level
Translator
PWM
LX_
DL_
V
L
Figure 4. Boost Supply for Gate Drivers
Pulse-Skipping Mode
OPERATIONAL MODES
PWM Mode
The 3.3 V and 5 V Buck controllers operate in continuous-
current PWM mode when the load demands more than
approximately 25 % of the maximum current (see typical
curves). The duty cycle can be approximated as Duty_Cycle
When the load requires less than 25 % of its maximum, the
Si786 enters a mode which drives the gate for one clock
cycle and skips the majority of the remaining cycles. Pulse-
skipping mode cuts down on the switching losses, the domi-
nant power consumer at low current levels.
= VOUT/VIN
.
In this mode, the inductor current is continuous; in the first
half of the cycle, the current slopes up when the high-side
MOSFET conducts and then, in the second half, slopes back
down when the inductor is providing energy to the output
capacitor and load. As current enters the inductor in the first
half-cycle, it is also continuing through to the load; hence, the
load is receiving continuous current from the inductor. By
using this method, output ripple is minimized and smaller
form-factor inductors can be used. The output capacitor’s
ESR has the largest effect on output ripple. It is typically
under 50 mV; the worst case condition is under light load with
higher input battery voltage.
In the region between pulse-skipping mode and PWM mode,
the controller may transition between the two modes, deliv-
ering spurts of pulses. This may cause the current waveform
to look irregular, but will not overly affect the ripple voltage.
Even in this transitional mode efficiency will stay high.
Current Limit
The current through an external resistor, is constantly moni-
tored to protect against over-current. A low value resistor is
placed in series with the inductor. The voltage across it is
measured by connecting it between CS_ and FB_. If this volt-
age is larger than 100 mV, the high-side MOSFET drive is
shut down. Eliminating over-currents protects the MOSFET,
the load and the power source. Typical values for the sense
resistors with a 3 A load will be 25 mΩ.
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Document Number: 70189
S-40807-Rev. J, 26-Apr-04
Product is End of Life 3/2014
Si786
Vishay Siliconix
Oscillator and SYNC
DESIGN CONSIDERATIONS
There are two ways to set the Si786 oscillator frequency: by
using an external SYNC signal, or using the internal oscilla-
tor. The SYNC pin can be driven with an external CMOS
level signal with frequency from 240 kHz and 350 kHz to syn-
chronize to the internal oscillator. Tying SYNC to either VL or
GND sets the frequency to 200 kHz and to REF sets the fre-
quency to 300 kHz.
Inductor Design
Three specifications are required for inductor design: induc-
tance (L), peak inductor current (ILPEAK), and coil resistance
(RL). The equation for computing inductance is:
VOUT VIN(MAX)- VOUT
( )
L
Operation at 300 kHz is typically used to minimize output
passive component sizes. Slower switching speeds of
200 kHz may be needed for lower input voltages.
(
)
VIN(MAX) f IOUT LIR
Where:
VOUT = Output voltage (3.3 V or 5 V);
VIN(MAX) = Maximum input voltage (V);
f = Switching frequency, normally 300 kHz;
IOUT = Maximum dc load current (A);
LIR = Ratio of inductor peak-to-peak ac current to
average dc load current, typically 0.3.
Internal VL and REF
A 5 V linear regulator supplies power to the internal logic cir-
cuitry. The regulator is available for external use from pin VL,
able to source 5 mA. A 10 µF capacitor should be connected
between VL and GND. To increase efficiency, when the 5 V
switching supply has voltage greater than 4.5 V, VL is inter-
nally switched over to the output of the 5 V switching supply
and the linear regulator is turned off.
When LIR is higher, smaller inductance values are accept-
able, at the expense of increased ripple and higher losses.
The peak inductor current (ILPEAK) is equal to the steady-
state load current (IOUT) plus one half of the peak-to-peak ac
current (ILPP). Typically, a designer will select the ac inductor
current to be 30 % of the steady-state current, which gives
The 5 V linear regulator provides power to the internal 3.3 V
bandgap reference (REF). The 3.3 V reference can supply
5 mA to an external load, connected to pin REF. Between
REF and GND connect a capacitor, 0.22 µF plus 1 µF per mA
of load current. The switching outputs will vary with the refer-
ence; therefore, placing a load on the REF pin will cause the
main outputs to decrease slightly, within the specified regu-
lation tolerance.
ILPEAK equal to 1.15 times IOUT
.
The equation for computing peak inductor current is:
VOUT VIN(MAX)- VOUT
ILPEAK
IOUT
+
(2)(f)(L) VIN(MAX)
VL and REF supplies stay on as long as V+ is greater than
4.5 V, even if the switching supplies are not enabled. This
feature is necessary when using the micropower regulators
to keep memory alive during shutdown.
Output Capacitors
The output capacitors determine loop stability and ripple volt-
age at the output. In order to maintain stability, minimum
capacitance and maximum ESR requirements must be met
according to the following equations:
Both linear regulators can be connected to their respective
switching supply outputs. For example, REF would be tied to
the output of the 3.3 V and VL to 5 V. This will keep the main
supplies up in standby mode, provided that each load current
in shutdown is not larger than 5 mA.
VREF
CF
VOUT RCS (2)(π)(GBWP)
Fault Protection
and,
The 3.3 V and 5 V switching controllers as well as the com-
parators are shut down when one of the linear regulators
drops below 85 % of its nominal value; that is, shut down will
occur when VL < 4.0 V or REF < 2.8 V.
VOUT RCS
ESRCF
VREF
Where: CF = Output filter capacitance (F)
VREF = Reference voltage, 3.3 V;
VOUT = Output voltage, 3.3 V or 5 V;
RCS = Sense resistor (Ω);
GBWP = Gain-bandwidth product, 60 kHz;
ESRCF = Output filter capacitor ESR (Ω).
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
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13
Product is End of Life 3/2014
Si786
Vishay Siliconix
Both minimum capacitance and maximum ESR require-
ments must be met. In order to get the low ESR, a capaci-
tance value of two to three times greater than the required
minimum may be necessary.
Lower Voltage Input
The application circuit shown here can be easily modified to
work with 5.5 V to 12 V input voltages. Oscillation frequency
should be set at 200 kHz and increase the output capaci-
tance to 660 µF on the 5 V output to maintain stable perfor-
mance up to 2 A of load current. Operation on the 3.3 V
supply will not be affected by this reduced input voltage.
The equation for output ripple in continuous current mode is:
1
x f
+
ESRCF
VOUT(RPL)
ILPP(MAX)
x
2
C
x
F
x
The equations for capacitive and resistive components of the
ripple in pulse-skipping mode are:
(4) 10- 4 (L)
1
1
V
OUT(RPL)(C)
+
x
2
VOUT VIN- VOUT
RCS CF
(0.02) ESRCF
RCS
VOUT(RPL)(R)
The total ripple, VOUT(RPL), can be approximated as follows:
if
then
VOUT(RPL)(R) < 0.5 VOUT(RPL)(C),
VOUT(RPL) = VOUT(RPL)(C),
otherwise,
V
V
OUT(RPL) = 0.5 VOUT(RPL)(C) +
OUT(RPL)(R).
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see http://www.vishay.com/ppg?70189.
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14
Document Number: 70189
S-40807-Rev. J, 26-Apr-04
Package Information
Vishay Siliconix
SSOP: 28-LEAD (5.3 MM) (POWER IC ONLY)
28
15
−B−
E
1
E
1
14
−A−
D
e
GAUGE PLANE
R
c
A
2
A
1
A
−C−
L
SEATING PLANE
ꢀ
SEATING PLANE
0.076
C
L
1
b
S
M
0.12
A
B
C
MILLIMETERS
Dim
A
A1
A2
b
c
D
E
E1
e
Min
Nom
1.88
Max
1.99
0.21
1.78
0.38
0.20
10.33
8.00
5.40
1.73
0.05
1.68
0.25
0.09
10.07
7.60
5.20
0.13
1.75
0.30
0.15
10.20
7.80
5.30
0.65 BSC
0.75
0.63
0.95
L
1.25 BSC
0.15
L1
R
0.09
− − −
0_
4_
8_
ꢀ
ECN: S-40080—Rev. A, 02-Feb-04
DWG: 5915
Document Number: 72810
28-Jan-04
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Revision: 02-Oct-12
Document Number: 91000
1
相关型号:
SI786LRG-T1-E3
IC DUAL SWITCHING CONTROLLER, 330 kHz SWITCHING FREQ-MAX, PDSO28, 5.30 MM, LEAD FREE, SSOP-28, Switching Regulator or Controller
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