JM38510/19003BXX [VISHAY]
IC 8-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP28, SIDE BRAZED, DIP-28, Multiplexer or Switch;
| 型号： | JM38510/19003BXX |
| 厂家： | 
VISHAY |
| 描述： | IC 8-CHANNEL, DIFFERENTIAL MULTIPLEXER, CDIP28, SIDE BRAZED, DIP-28, Multiplexer or Switch CD |
| 文件： | 总9页 (文件大小：155K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG506A_MIL/507A_MIL
Vishay Siliconix
Single 16-Ch/Differential 8-Ch CMOS Analog Multiplexers
(Obsolete for non-hermetic. Use DG406/407 as pin-for-pin replacements.)
FEATURES
BENEFITS
APPLICATIONS
D Low On-Resistance: 240 W
D TTL and CMOS Logic Compatible
D Low Power: 30 mW
D Easily Interfaced
D Communication Systems
D ATE
D Low Power Consumption
D Low System Crosstalk
D Wide Analog Signal Range
D Data Acquisition Systems
D Audio Signal Routing and Multiplexing
D Medical Instrumentation
D Break-Before-Make Switching
D 44-V Power Supply Rating
D Transition Time: 600 ns
DESCRIPTION
A channel in the on state conducts current equally well in both
directions. In the off state each channel blocks voltages up to
the power supply rails, normally 30 V peak-to-peak. An enable
(EN) function allows for device selection when several
multiplexers are used. All control inputs, address (AX) and
enable (EN) are TTL or CMOS compatible over the full
specified operating temperature range.
ESD protection for ruggedness. An epitaxial layer prevents
latch up.
The DG506A_MIL/507A_MIL are available in hermetic
packages. For plastic packages, use the DG406/407 as
pin-for-pin replacements.
The DG506A_MIL/507A_MIL are fabricated in the
Vishay Siliconix PLUS-40 process, which includes improved
For wideband/video multiplexing, the DG536 is
recommended.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
Dual-In-Line
Dual-In-Line
D
V+
NC
NC
V+
D
a
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
1
2
28
27
26
25
24
23
22
21
20
19
18
17
16
15
DG507A_MIL
V–
D
b
V–
S
DG506A_MIL
S
8
NC
8a
3
3
S
7
S
16
S
8b
S
S
S
S
S
S
S
7a
6a
5a
4a
3a
2a
4
4
S
6
S
15
S
7b
5
5
S
5
S
14
S
6b
6
6
S
4
S
13
S
5b
7
7
S
3
S
12
S
4b
8
8
S
2
S
11
S
3b
9
9
S
1
S
10
S
2b
1a
10
11
12
13
14
10
11
12
13
14
EN
S
9
S
1b
EN
A
0
GND
NC
GND
NC
A
0
Decoders/Drivers
Top View
Decoders/Drivers
A
1
A
1
A
2
A
3
NC
A
2
Top View
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-1
DG506A_MIL/507A_MIL
Vishay Siliconix
TRUTH TABLES AND ORDERING INFORMATION
TRUTH TABLE
Ċ
DG506A_MIL
TRUTH TABLE
Ċ
DG507A_MIL
A3
A2
A1
A0
EN
On Switch
A2
A1
A0
EN
On Switch
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
None
1
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
None
1
2
3
4
5
6
7
8
2
3
4
5
6
7
8
9
Logic “0” = V v 0.8 V
AL
10
11
12
13
14
15
16
Logic “1” = V w 2.4 V
AH
X = Don’t Care
ORDERING INFORMATION
Ċ
DG507A_MIL
Temp Range
Package
Part Number
DG507AAK
28-Pin CerDIP
ORDERING INFORMATION
Ċ
DG506A_MIL
DG507AAK/883
JM38510/19003BXC
DG507AAZ/883
–55 to 125_C
28-Pin Sidebraze
28-Pin LCC
Temp Range
Package
Part Number
DG506AAK
28-Pin CerDIP
DG506AAK/883
JM38510/19001BXC
DG506AAZ/883
–55 to 125_C
28-Pin Sidebraze
LCC-28*
*Block Diagram and Pin Configuration not shown.
ABSOLUTE MAXIMUM RATINGS
b
Voltage Referenced to V–
Power Dissipation (Package)
28-Pin CerDIP and Sidebraze . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200 mW
NO TAG
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 V
28-Pin PLCC
c
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1200 mW
GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 V
a
LCC-20,28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1000 mW
Digital Inputs , V , V . . . . . . . . . . . . . . . . . . . . . . . . (V–) –2 V to (V+) +2 V or
S
D
20 mA, whichever occurs first
Current (Any Terminal, Except S or D) . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Notes:
a. Signals on S , D or IN exceeding V+ or V– will be clamped by internal
diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 14 mW/_C above 75_C.
Peak Current, S or D
(Pulsed at 1 ms, 10% Duty Cycle Max) . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
X
X
X
Storage Temperature
(CerDIP) . . . . . . . . . . . . . . . . . . . . –65 to 150_C
(Plastic DIP) . . . . . . . . . . . . . . . . –65 to 125_C
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-2
DG506A_MIL/507A_MIL
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
A Suffix
–55 to 125_C
V+ = 15 V, V– = –15 V
f
Parameter
Symbol
Tempb Mind
Typc
Maxd Unit
V
IN
= 2.4 V, 0.8 V
Analog Switch
e
Analog Signal Range
V
Full
–15
15
V
W
%
ANALOG
Drain-Source
On-Resistance
Room
Full
240
6
400
500
r
V
D
= "10 V, I = –200 mA
–10 V < V < 10 V
S
DS(on)
S
g
r
Matching
Dr
Room
DS(on)
DS(on)
Source Off
Leakage Current
V
S
= "10 V, V = #10 V
Room
Full
–1
–50
1
50
D
= 0 V
I
S(off)
V
EN
Room
Full
–10
–300
10
300
DG506A_MIL
DG507A_MIL
DG506A_MIL
DG507A_MIL
V = #10 V
D
Drain Off
Leakage Current
I
V
= 10 V
D(off)
D(on)
S
Room
Full
–5
–200
5
200
V
EN
= 0 V
nA
Room
Full
–10
–300
10
300
Drain On
Leakage Current
I
V
= V = "10 V
S
D
Room
Full
–5
–200
5
200
Digital Control
Room
Full
–10
–30
V
= 2.4 V
= 15 V
A
Logic Input Current
Input Voltage High
I
AH
Room
Full
10
30
V
mA
A
Logic Input Current
Input Voltage Low
Room
Full
–10
–30
I
AL
V = 0 V, 2.4 V, V = 0 V
EN A
Dynamic Characteristics
Transition Time
t
See Figure 2
See Figure 4
Room
Room
Room
Room
Room
0.6
0.2
1
1.0
TRANS
Break-Before-Make Time
Enable Turn-On Time
Enable Turn-Off Time
Charge Injection
t
OPEN
ms
t
1.5
1.0
ON(EN)
See Figure 3
t
0.4
6
OFF(EN)
Q
pC
dB
V
EN
= 0 V, R = 1 kW, C = 15 pF
L
L
h
Off Isolation
OIRR
Room
68
V
S
= 7 V
, f = 500 kHz
RMS
Source Off Capacitance
Drain Off Capacitance
C
V
= 0 V, V = 0 V, f = 140 kHz
Room
Room
Room
6
S(off)
D(off)
EN
S
V
= 0 V
= 0 V
DG506A_MIL
DG507A_MIL
45
23
EN
pF
C
V
D
f = 140 kHz
Power Supplies
Positive Supply Current
Negative Supply Current
I+
I–
Room
Room
1.3
2.4
V
EN
= 0 V, V = 0 V
mA
A
–1.5
–0.7
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f.
V
IN
= input voltage to perform proper function.
r
MAX – r
MIN
DS(on)
g.
DS(on)
Dr
+
ǒ
Ǔ
DS(on)
r
AVE
DS(on)
V
D
h.
Off isolation + 20 log
, V + input to off switch, V + output due to V .
D
S
S
V
S
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-3
DG506A_MIL/507A_MIL
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Input Switching Threshold vs.
V+ and V– Supply Voltages
r
vs. V and Power Supply
DS(on)
D
2.5
2.0
1.5
600
500
400
300
200
100
"5 V
"7.5 V
1.0
0.5
0
"10 V
"15 V
"20 V
”5
”10
”15
”20
0
–20
–10
0
10
20
V
D
– Drain Voltage (V)
V+, V– Positive and Negative Supplies (V)
Charge Injection vs. Analog Voltage
r
vs. V and Temperature
DS(on)
D
400
350
16
14
12
10
8
V+ = 15 V
V– = –15 V
V+ = 15 V
V– = –15 V
300
125_C
25_C
250
200
150
6
–55_C
100
50
4
2
0
0
–15
–10
–5
0
5
10
15
–15
–10
–5
0
5
10
15
V
S
– Source Voltage (V)
V – Drain Voltage (V)
D
Supply Current vs. Switching Frequency
Crosstalk vs. Frequency
6
4
0
V+ = 15 V
V– = –15 V
V+ = 15 V
V– = –15 V
ref. 0.0 dBm
–20
CerDIP
I+
I–
–40
2
Plastic
0
–60
–80
–2
–4
–6
–100
–120
10 k
100 k
1 M
1 k
10 k
100 k
1 M
10 M
f – Frequency (Hz)
f – Frequency (Hz)
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-4
DG506A_MIL/507A_MIL
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Off Isolation vs. Frequency
Switching Time vs. Temperature
0
1000
900
V+ = 15 V
V– = –15 V
ref. 0 dBm
V+ = 15 V
V– = –15 V
–20
CerDIP
t
RANS
800
700
–40
Plastic
–60
–80
600
500
t
OPEN
400
300
–100
–120
200
1 k
10 k
100 k
1 M
10 M
–55 –35 –15
5
25
45
65
85 105 125
f – Frequency (Hz)
Temperature (_C)
Switching Time vs. Positive Supply Voltage
Leakages vs. Temperature
100 nA
10 nA
1100
1000
900
V+ = 15 V
V– = –15 V
V
D
= "14 V
800
700
1 nA
100 pA
10 pA
I
, I
D(on) D(off)
t
RANS
600
I
S(off)
500
400
t
OPEN
1 pA
300
200
0.1 pA
10
12
14
16
18
20
22
–55 –35 –15
5
25
45
65
85
105 125
V+ – Positive Supply (V)
Temperature (_C)
I
vs. Analog Voltage
I
, I
vs. Analog Voltage
S(off)
D(on) D(off)
15
20
V+ = 15 V
V– = –15 V
V+ = 15 V
V– = –15 V
10
5
V
T
= –V
= 25_C
S
A
D
T
A
= 25_C
0
I
D(on)
–20
I
D(off)
0
I
S(off)
–40
–60
–80
–5
–10
–15
–15
–10
–5
0
5
10
15
–15
–10
–5
V – Drain Voltage (V)
D
0
5
10
15
V
– Source Voltage (V)
S
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-5
DG506A_MIL/507A_MIL
Vishay Siliconix
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
S
S
1
GND
V+
–
+
A
0
n
V–
V+
V+
V+
V–
V–
Decode/
Drive
–
+
V–
V+
A
X
V–
V+
–
+
EN
V–
D
FIGURE 1.
TEST CIRCUITS
+15 V
V+
+2.4 V
EN
"10 V
#10 V
S
1
A
A
3
2
S
– S
15
2
t <20 ns
r
t <20 ns
f
DG506A_MIL
3 V
0 V
A
A
S
16
Logic
Input
1
50%
0
V
O
D
GND
V–
35 pF
50 W
1 M
V
S1
–15 V
90%
Switch
Output
V
O
0 V
+15 V
90%
V
S8
V+
+2.4 V
EN
S
1b
"10 V
#10 V
t
t
TRANS
TRANS
S ON
1
S ON
8
*
A
A
A
2
DG507A_MIL
S
8b
1
0
D
b
V
O
GND
V–
35 pF
50 W
1 M
–15 V
* = S – S , S – S , D
a
1a
8a 2b
7b
FIGURE 2. Transition Time
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-6
DG506A_MIL/507A_MIL
Vishay Siliconix
TEST CIRCUITS
+15 V
V+
A
A
3
S
1
–5 V
2
S
– S
16
2
A
A
1
DG506A_MIL
0
V
O
EN
D
GND
V–
t <20 ns
r
t <20 ns
f
35 pF
1 k
50 W
3 V
Logic
Input
–15 V
50%
0 V
t
t
ON(EN)
OFF(EN)
0 V
10%
+15 V
Switch
Output
V+
A
A
A
2
S
–5 V
1b
V
O
S
S
– S
– S
1
0
1a
2b
8a
8b
90%
V
O
DG507A_MIL
D
a
and D
EN
V
O
b
GND
V–
35 pF
50 W
1 k
–15 V
FIGURE 3. Enable Switching Time
+15 V
t <20 ns
r
3 V
t <20 ns
f
Logic
Input
V+
All S and D
50%
+2.4 V
EN
+5 V
a
0 V
A
A
A
A
3
DG506A_MIL
DG507A_MIL
2
1
0
V
S
V
O
D,D
b
80%
Switch
Output
GND
V–
35 pF
50 W
1 k
V
O
t
OPEN
0 V
–15 V
FIGURE 4. Break-Before-Make Interval
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-7
DG506A_MIL/507A_MIL
Vishay Siliconix
a
APPLICATION HINTS
V+
V–
VIN
VS or VD
Analog Voltage
Range
Positive Supply
Negative Supply
Logic Input Voltage
VINH(min)/VINL(max)
(V)
Voltage
(V)
Voltage
(V)
(V)
b
15
–15
–12
–10
–8
2.4/0.8
2.4/0.8
2.2/0.6
2.0/0.5
–15 to 15
–12 to 12
–10 to 10
–8 to 8
12
10
c
8
Notes:
a. Application Hints are for DESIGN AID ONLY, not guaranteed and not subject to production testing.
b. Electrical Parameter Chart based on V+ = 15 V, V– = –15 V.
c. Operation below "8 V is not recommended due to shift in V
.
INL(MAX)
+V
Overvoltage Protection
V+ v V vV–
g
1N4148
A very convenient form of overvoltage protection consists of
addingtwo small signal diodes (1N4148, 1N914 type) in series
with the supply pins (see Figure 5). This arrangement
effectively blocks the flow of reverse currents. It also floats the
supply pin above or below the normal V+ or V– value. In this
case the overvoltage signal actually becomes the power
supply of the IC. From the point of view of the chip, nothing has
changed, as long as the difference between VS and the V– rail
doesn’t exceed +44 V. The addition of these diodes will reduce
the analog signal range to 1 V below V+ and 1 V above V–, but
it preserves the low channel resistance and low leakage
characteristics.
+V
Internal
Junction
S
X
Internal
Junction
DG506A_MIL
DG507A_MIL
V
g
–V
1N4148
–V
FIGURE 5. Overvoltage Protection Using Blocking Diodes
Channel 1
Channel 2
D
DG506A_MIL
#1
EN
Channel 16
A
0
A
1
A A
2 3
Data
Bus
A
S/H
A/D
Channel 17
Channel 18
D
DG419
DG506A_MIL
#2
EN
Channel 32
A
0
A
1
A A
2 3
Controller
FIGURE 6. A 32-Channel Data Acquisition System
Document Number: 70066
S-00405—Rev. D, 21-Feb-00
www.vishay.com S FaxBack 408-970-5600
5-8
Legal Disclaimer Notice
Vishay
Disclaimer
All product specifications and data are subject to change without notice.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf
(collectively, “Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained herein
or in any other disclosure relating to any product.
Vishay disclaims any and all liability arising out of the use or application of any product described herein or of any
information provided herein to the maximum extent permitted by law. The product specifications do not expand or
otherwise modify Vishay’s terms and conditions of purchase, including but not limited to the warranty expressed
therein, which apply to these products.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this
document or by any conduct of Vishay.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications unless
otherwise expressly indicated. Customers using or selling Vishay products not expressly indicated for use in such
applications do so entirely at their own risk and agree to fully indemnify Vishay for any damages arising or resulting
from such use or sale. Please contact authorized Vishay personnel to obtain written terms and conditions regarding
products designed for such applications.
Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 18-Jul-08
www.vishay.com
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