DG613AZ/883 [VISHAY]
High-Speed, Low-Glitch D/CMOS Analog Switches; 高速，低毛刺D / CMOS模拟开关
| 型号： | DG613AZ/883 |
| 厂家： | 
VISHAY |
| 描述： | High-Speed, Low-Glitch D/CMOS Analog Switches |
| 文件： | 总8页 (文件大小：90K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG611/612/613
Vishay Siliconix
High-Speed, Low-Glitch D/CMOS Analog Switches
FEATURES
BENEFITS
APPLICATIONS
D Fast Switching— tON: 12 ns
D Low Charge Injection: "2 pC
D Wide Bandwidth: 500 MHz
D 5-V CMOS Logic Compatible
D Low rDS(on): 18 W
D Improved Data Throughput
D Minimal Switching Transients
D Improved System Performance
D Easily Interfaced
D Fast Sample-and-Holds
D Synchronous Demodulators
D Pixel-Rate Video Switching
D Disk/Tape Drives
D Low Insertion Loss
D DAC Deglitching
D Low Quiescent Power : 1.2 nW
D Single Supply Operation
D Minimal Power Consumption
D Switched Capacitor Filters
D GaAs FET Drivers
D Satellite Receivers
DESCRIPTION
The DG611/612/613 feature high-speed low-capacitance
lateral DMOS switches. Charge injection has been minimized
to optimize performance in fast sample-and-hold applications.
switching FETs with low-power CMOS control logic and
drivers. An epitaxial layer prevents latchup.
The DG611 and DG612 differ only in that they respond to
opposite logic levels. The versatile DG613 has two normally
openandtwonormallyclosedswitches. Itcanbegivenvarious
configurations, including four SPST, two SPDT, one DPDT.
Each switch conducts equally well in both directions when on
and blocks up to 16 Vp-p when off. Capacitances have been
minimized to ensure fast switching and low-glitch energy. To
achieve such fast and clean switching performance, the
DG611/612/613 are built on the Vishay Siliconix proprietary
D/CMOS process. This process combines n-channel DMOS
For additional information see Applications Note AN207
(FaxBack number 70605).
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG611
DG611
D
1
IN NC IN
D
1
2 2
Key
3
2
1
20 19
IN
D
IN
2
1
2
3
4
5
6
7
8
16
15
14
1
1
1
4
5
6
7
8
18
17
16
D
2
S
S
2
Four SPST Switches per Package
1
S
S
2
V–
V+
TRUTH TABLE
Dual-In-Line
and SOIC
V–
13 V+
LCC
Top View
NC
NC
Logic
DG611
DG612
12
11
10
9
GND
V
S
L
15
14
GND
V
L
Top View
0
1
ON
OFF
ON
S
4
3
S
4
S
3
OFF
D
D
3
4
4
Logic “0” v 1 V
Logic “1” w 4 V
9
10 11 12 13
IN NC IN
IN
IN
3
D
D
3
4
4
3
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-1
DG611/612/613
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG613
DG613
D
IN NC IN
D
1
1
2 2
Key
IN
D
IN
2
1
1
1
3
2
1
20 19
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Four SPST Switches per Package
TRUTH TABLE
D
2
4
5
6
7
8
18
17
16
S
S
2
1
S
S
2
V–
NC
V+
Dual-In-Line
and SOIC
V–
V+
Logic SW1, SW4 SW2, SW3
LCC
NC
Top View
GND
V
L
S
3
0
1
OFF
ON
ON
Top View
15
14
GND
V
L
S
3
S
OFF
4
4
4
S
4
Logic “0” v 1 V
Logic “1” w 4 V
D
D
3
9
10 11 12 13
IN NC IN
IN
IN
3
D
D
3
4
4
3
ORDERING INFORMATION
Temp Range
DG611/612
Package
Part Number
DG611DJ
DG612DJ
DG611DY
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin CerDIP
LCC-20
–40 to 85_C
DG612DY
DG611AK/883, 5962-9325501MEA
DG612AK/883, 5962-9325502MEA
DG611AZ/883, 5962-9325501M2A
DG612AZ/883, 5962-9325502M2A
–55 to 125_C
DG613
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin CerDIP
LCC-20
DG613DJ
–40 to 85_C
DG613DY
DG613AK/883, 5962-9325503MEA
DG613AZ/883, 5962-9325503M2A
–55 to 125_C
ABSOLUTE MAXIMUM RATINGS
V+ to V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 21 V
V+ to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 21 V
V– to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –19 V to 0.3 V
Storage Temperature:
CerDIP . . . . . . . . . . . . . . . . . . . . . –65 to 150_C
Plastic . . . . . . . . . . . . . . . . . . . . . . –65 to 125_C
Power Dissipation (Package)b
c
16-Pin Plastic DIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 470 mW
d
16-Pin Narrow SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600 mW
V
L
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –1 V to (V+) + 1 V
or 20 mA, whichever occurs first
e
16-Pin CerDIP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
e
20-Pin LCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW
a
V
IN
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –1 V to (V+) + 1 V
or 20 mA, whichever occurs first
Notes:
a. Signals on S , D , or IN exceeding V+ or V– will be clamped by internal
a
X
X
X
V , V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (V–) –0.3 V to (V–) + 16 V
or 20 mA, whichever occurs first
S
D
diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/_C above 75_C
Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . "30 mA
Current, S or D (Pulsed at 1 ms, 10% Duty Cycle) . . . . . . . . . . . . . "100 mA
d. Derate 7.6 mW/_C above 75_C
e. Derate 12 mW/_C above 75_C
RECOMMENDED OPERATING RANGE
V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V to 21 V
V– . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –10 V to 0 V
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to V
I
N
L
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V– to (V+) – 5 V
ANALOG
V
L
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V to V+
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-2
DG611/612/613
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
Unless Otherwise Specified
A Suffix
–55 to 125_C
D Suffix
–40 to 85_C
V+ = 15 V, V– = –3 V
Mind Maxd Mind Maxd
Parameter
Symbol
Tempb Typc
Unit
f
V = 5 V, V = 4 V, 1 V
L
IN
Analog Switch
e
Analog Signal Range
V
V– = –5 V, V+ = 12 V
Full
–5
7
–5
7
V
ANALOG
Room
Full
18
45
60
45
60
Switch On-Resistance
r
DS(on)
I
= –1 mA, V = 0 V
W
S
D
Resistance
Match Bet Ch.
Dr
Room
2
DS(on)
S(off)
Room
Hot
"0.001
–0.25
–20
0.25
20
–0.25
–20
0.25
20
Source Off Leakage
I
I
V
V
= 0 V, V = 10 V
D
S
Drain Off
Leakage Current
Room
Hot
"0.001
"0.001
–0.25
–20
0.25
20
–0.25
–20
0.25
20
= 10 V, V = 0 V
D
nA
D(off)
S
Switch On
Leakage Current
Room
Hot
–0.4
–40
0.4
40
–0.4
–40
0.4
40
I
V = V = 0 V
S D
D(on)
Digital Control
Input Voltage High
Input Voltage Low
V
Full
Full
4
4
IH
V
V
1
1
IL
Room
Hot
0.005
5
–1
–20
1
20
–1
–20
1
20
Input Current
I
mA
IN
Input Capacitance
C
Room
pF
IN
Dynamic Characteristics
Off State Input Capacitance
Off State Output Capacitance
On State Input Capacitance
Bandwidth
C
C
C
V
= 0 V
= 0 V
Room
Room
Room
Room
Room
Room
3
2
S(off)
D(off)
S(on)
S
pF
V
D
V
= V = 0 V
10
500
12
8
S
D
BW
R
L
= 50 W
MHz
e
Turn-On Time
t
25
20
25
20
ON
R
L
= 300 W, C = 3 pF, V = "2 V
L S
See Test Circuit, Figure 2
e
Turn-Off Time
t
OFF
Room
Full
19
35
50
35
50
ns
Turn-On Time
Turn-Off Time
t
ON
R
= 300 W, C = 75 pF
L
L
V
S
= "2 V
Room
Full
16
25
35
25
35
See Test Circuit, Figure 2
t
OFF
e
Charge Injection
Q
C
= 1 nF, V = 0 V
Room
Room
4
3
L
S
pC
dB
e, g
Ch. Injection Change
DQ
4
4
C
= 1 nF, bV b v 3 V
L
S
R
= 50 W, R = 50 W
f = 5 MHz
IN
L
e
Off Isolation
OIRR
Room
Room
74
87
e
Crosstalk
X
TALK
R
= 10 W, R = 50 W, f = 5 MHz
IN L
Power Supplies
Positive
Supply Curent
Room
Full
0.005
–0.005
0.005
1
5
1
5
I+
I–
Negative
Supply Current
Room
Full
–1
–5
–1
–5
V
IN
= 0 V or 5 V
mA
Room
Full
1
5
1
5
Logic Supply Current
Ground Current
I
L
Room
Full
–0.005
–1
–5
–1
–5
I
GND
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-3
DG611/612/613
Vishay Siliconix
a
SPECIFICATIONS
FOR UNIPOLAR SUPPLIES
Test Conditions
Unless Otherwise Specified
A Suffix
–55 to 125_C
D Suffix
–40 to 85_C
V+ = 15 V, V– = –3 V
f
Parameter
Symbol
Tempb Typc Mind Maxd Mind Maxd Unit
V
L
= 5 V, V = 4 V, 1 V
IN
Analog Switch
e
Analog Signal Range
V
Full
0
7
0
7
V
ANALOG
Switch On-Resistance
r
I
S
= –1 mA, V = 1 V
Room
25
60
60
W
DS(on)
D
Dynamic Characteristics
e
Turn-On Time
t
Room
Room
15
10
30
25
30
25
ON
R
L
= 300 W, C = 3 pF, V = 2 V
L S
See Test Circuit, Figure 2
ns
e
Turn-Off Time
t
OFF
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25_C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum.
e. Guaranteed by design, not subject to production test.
f.
V
IN
= input voltage to perform proper function.
g. DQ = bQ at V = 3 V – Q at V = –3 Vb.
S
S
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-4
DG611/612/613
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
r
vs. V and Power Supply Voltages
r
vs. V and Temperature
DS(on)
D
DS(on)
D
400
350
300
250
200
150
100
50
400
350
300
250
200
150
100
50
I
S
= –1 mA
V+ = 15 V
V– = –3 V
I
S
= –1 mA
V+ = 12 V
V– = –5 V
V+ = 5 V
V– = –5 V
V+ = 15 V
V– = –3 V
25_C
125_C
–55_C
0
0
–5 –4
–2
0
2
4
6
8
10
12
10
15
–4
–2
0
2
4
6
8
10
12
V
– Drain Voltage (V)
V – Drain Voltage (V)
D
D
Leakage Current vs. Analog Voltage
Leakage Currents vs. Temperature
10 nA
1 nA
3
2
V+ = 15 V
V– = –3 V
1
100 pA
I
I
I
S(off), D(off)
D(on)
0
10 pA
1 pA
I
I
S(off), D(off)
–1
–2
–3
I
D(on)
0.1 pA
–4
–2
V
0
2
4
6
8
–55
–25
0
25
50
75
100 125
or V – Drain or Source Voltage (V)
Temperature (_C)
D
S
Switching Times vs. Temperature
Input Switching Threshold vs. V
L
6
5
4
3
2
1
0
24
22
20
18
16
14
12
10
8
V+ = 15 V
V– = –3 V
t
ON
t
OFF
V+ = 15 V
V– = –3 V
= 300 W
C = 10 pF
6
4
R
L
L
2
0
–55 –35 –15
5
25
45
65
85 105 125
0
5
10
Temperature (_C)
V
L
– Logic Supply Voltage (V)
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-5
DG611/612/613
Vishay Siliconix
TYPICAL CHARACTERISTICS (_2C5 UNLESS NOTED)
Charge Injection vs. Analog Voltage
Crosstalk and Off Isolation vs. Frequency
20
–120
–100
–80
V+ = 15 V
V– = –3 V
V+ = 15 V
V– = –3 V
10
Qd
Crosstalk
0
–60
Qs
Off Isolation
–10
–20
–40
–20
–3 –2 –1
0
1
2
3
4
5
6
7
8
9
10
1
10
100
V
– Analog Voltage (V)
f – Frequency (MHz)
ANALOG
–3 dB Bandwidth/Insertion Loss vs. Frequency
Supply Currents vs. Switching Frequency
0
–4
6
5
R
L
= 50 W
V+ = 15 V
V– = –3 V
4
V
L
= 5 V
C
X
= 0, 5 V
3
I+
I–
–8
2
1
I
L
–12
–16
–20
–24
0
–3 dB Point
–1
–2
–3
–4
–5
1 k
100 k
100 k
1 M
10 M
1
10
100
1000
f – Frequency (MHz)
f – Frequency (Hz)
SCHEMATIC DIAGRAM (TYPICAL CHANNEL)
V+
V
L
S
D
Input
Logic
Level
Translator
Driver
IN
X
DMOS Switch
V–
FIGURE 1.
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-6
DG611/612/613
Vishay Siliconix
TEST CIRCUITS
+5 V
+15 V
t < 10 ns
t < 10 ns
f
r
5 V
50%
Logic Input
0 V
V
L
V+
V
O
S
D
"2 V
V = "2 V
S
90%
IN
GND
R
300 W
C
L
Switch Output
0 V
L
V–
V–
20%
t
t
ON
OFF
C
L
(includes fixture and stray capacitance)
R
L
V
O
= V
S
R
L
+ r
DS(on)
FIGURE 2. Switching Time
+5 V
+15 V
V+
C
C
V
L
+5 V
+15 V
S
1
D
1
V
S
R
g
= 50 W
50 W
IN
1
V
V+
L
R
g
V
O
1 V, 4 V
S
D
V
R
O
S
D
2
2
NC
IN
GND
C
L
1 nF
V
g
L
5 V
IN
2
1 V, 4 V
V–
GND
V–
C
–3 V
V
S
X
TALK
Isolation = 20 log
V
O
–3 V
C = RF bypass
FIGURE 3. Charge Injection
FIGURE 4. Crosstalk
APPLICATIONS
High-Speed Sample-and-Hold
GaAs FET Drivers
In a fast sample-and-hold application, the analog switch
characteristics are critical. A fast switch reduces aperture
uncertainty. A low charge injection eliminates offset (step)
errors.Alowleakagereducesdrooperrors.TheCLC111,afast
input buffer, helps to shorten acquisition and settling times. A
low leakage, low dielectric absorption hold capacitor must
be used. Polycarbonate, polystyrene and polypropylene
are good choices. The JFET output buffer reduces droop
due to its low input bias current. (See Figure 5.)
Figure 7 illustrates a high-speed GaAs FET driver. To turn the
GaAs FET on 0 V are applied to its gate via S1, whereas to turn
it off, –8 V are applied via S2. This high-speed, low-power
driver is especially suited for applications that require a large
number of RF switches, such as phased array radars.
Pixel-Rate Switch
Windows, picture-in-picture, title overlays are economically
generated using a high-speed analog switch such as the
DG613. For this application the two video sources must be
sync locked. The glitch-less analog switch eliminates halos.
(See Figure 6.)
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-7
DG611/612/613
Vishay Siliconix
APPLICATIONS
+5 V
+12 V
D
Input Buffer
CLC111
Output Buffer
+
S
Analog
Input
"5 V Output
to A/D
LF356
–
75 W
IN
5 V Control
C
HOLD
1
/ DG611
4
650 pF Polystyrene
–5 V
FIGURE 5. High-Speed Sample-and-Hold
+5 V
+12 V
D
Output Buffer
+
Background
Composite
Output
75 W
CLC410
–
75 W
1
/ CLC114
2
Titles
250 W
250 W
75 W
5 V Control
1
/ DG613
2
–5 V
FIGURE 6. A Pixel-Rate Switch Creates Title Overlays
+5 V
GaAs
V
V+
L
RF
IN
RF
OUT
S
D
1
1
2
IN
1
1
/ DG613
2
S
2
D
IN
2
5 V
GND
V–
–8 V
FIGURE 7. A High-Speed GaAs FET Driver that Saves Power
Document Number: 70057
S-00399—Rev. G, 13-Sep-99
www.vishay.com S FaxBack 408-970-5600
4-8
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