DG444BDN-T1-E4 [VISHAY]
Improved Quad SPST CMOS Analog Switches; 改进的四路SPST CMOS模拟开关
| 型号： | DG444BDN-T1-E4 |
| 厂家： | 
VISHAY |
| 描述： | Improved Quad SPST CMOS Analog Switches |
| 文件： | 总15页 (文件大小：243K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG444B, DG445B
Vishay Siliconix
Improved Quad SPST CMOS Analog Switches
FEATURES
DESCRIPTION
•
Halogen-free according to IEC 61249-2-21
Definition
The DG444B, DG445B are monolithic quad analog switches
designed to provide high speed, low error switching of analog
and audio signals. The DG444B, DG445B are upgrades to
the original DG444, DG445.
•
•
•
•
•
•
Low On-Resistance: 45 W
Low Power Consumption: 1 mW
Fast Switching Action - tON: 120 ns
Low Charge Injection
TTL/CMOS-Compatible Logic
Compliant to RoHS Directive 2002/95/EC
Combing low on-resistance (45 , typ.) with high speed
(tON 120 ns, typ.), the DG444B, DG445B are ideally suited
for Data Acquisition, Communication Systems, Automatic
Test Equipment, or Medical Instrumentation. Charge
injection has been minimized on the drain for use in
sample-and-hold circuits.
BENEFITS
•
•
•
•
•
Low Signal Errors and Distortion
Reduced Power Supply Consumption
Faster Throughput
Reduced Pedestal Errors
Simple Interfacing
The DG444B, DG445B are built using Vishay Siliconix’s
high-voltage silicon-gate process. An epitaxial layer prevents
latchup.
APPLICATIONS
When on, each switch conducts equally well in both
directions and blocks input voltages to the supply levels
when off.
•
•
•
•
•
•
Audio Switching
Data Acquisition
Sample-and-Hold Circuits
Communication Systems
Automatic Test Equipment
Medical Instruments
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG444B
Dual-In-Line and SOIC
IN
D
IN
D
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
2
1
1
1
TRUTH TABLE
2
Logic
DG444B
ON
DG445B
OFF
S
S
2
0
1
V+
V-
OFF
ON
V
L
GND
Logic "0" 0.8 V
Logic "1" 2.4 V
S
3
S
4
D
4
D
3
IN
4
IN
3
Top View
DG444B
QFN16 (4 x 4 mm)
ORDERING INFORMATION
D
1
IN IN
D
2
1
2
Temp Range
Package
Part Number
16 15 14 13
DG444BDJ
DG444BDJ-E3
DG445BDJ
S
1
2
3
4
S
16-pin Plastic DIP
12
1
2
V-
V+
11
10
9
DG445BDJ-E3
DG444BDY-E3
DG444BDY-T1-E3
DG445BDY-E3
DG445BDY-T1-E3
DG444BDN-T1-E4
DG445BDN-T1-E4
V
L
GND
- 40 °C to 85 °C
S
4
S
3
16-pin Narrow SOIC
16 pin QFN 4 x 4 mm
5
6
7
8
D
IN IN
D
3
4
4
3
Top View
Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
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1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG444B, DG445B
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted)
A
Parameter
V+ to V-
GND to V-
VL
Symbol
Limit
Unit
44
25
V
(GND - 0.3 V) to (V+) + 0.3 V
(V-) - 2 to (V+) + 2 or
30 mA, whichever occurs first
Digital Inputsa, VS, VD
Continuous Current (Any Terminal)
Current, S or D (Pulsed at 1 ms, 10 % duty cycle)
Storage Temperature
30
100
mA
°C
- 65 to 125
470
16-pin Plastic DIPc
Power Dissipation (Package)b
640
850
16-pin Narrow Body SOICd
QFN-16
mW
Notes:
a. Signals on SX, DX, or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC Board.
c. Derate 6 mW/°C above 75 °C.
d. Derate 8 mW/°C above 75 °C.
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Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG444B, DG445B
Vishay Siliconix
SPECIFICATIONS (for dual supplies)
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 15 V
Limits
- 40 °C to 85 °C
VL = 5 V, VIN = 2.4 V, 0.8 Ve
Parameter
Symbol
Temp.a Min.b
Typ.c
Max.b Unit
Analog Switch
Analog Signal Ranged
Drain-Source
VANALOG
RDS(on)
Full
- 15
15
V
Room
Full
Room
Full
Room
Full
Room
Full
45
80
95
0.5
5
0.5
5
IS = 1 mA, VD
=
10 V
14 V
On-Resistance
- 0.5
- 5
- 0.5
- 5
- 0.5
- 10
0.01
0.01
0.02
IS(off)
ID(off)
ID(on)
VD
=
14 V, VS =
Switch Off Leakage Current
Channel On Leakage Current
nA
0.5
10
VS = VD
=
14 V
Digital Control
VINL
VINH
Input Voltage Low
Input Voltage High
Full
Full
0.8
V
2.4
- 1
VIN under test = 0.8 V
All Other = 2.4 V
VIN under test = 2.4 V
All Other = 0.8 V
Input Current VIN Low
Input Current VIN High
IINL
IINH
Full
Full
- 0.01
0.01
1
1
µA
- 1
Dynamic Characteristics
Turn-On Time
tON
Room
Room
RL = 1 k, CL = 35 pF
300
200
ns
pC
dB
VS
=
10 V, See Figure 2
tOFF
Turn-Off Time
CL = 1 nF, VS = 0 V
Charge Injectione
Off Isolatione
Crosstalk (Channel-to-Channel)d
Source Off Capacitance
Drain Off Capacitance
Channel On Capacitance
Power Supplies
Q
Room
Room
1
Vgen = 0 V, Rgen = 0
OIRR
XTALK
CS(off)
CD(off)
CD(on)
RL = 50 , CL = 15 pF
VS = 1 VRMS, f = 100 kHz
- 90
- 95
5
Room
Room
Room
Room
VS = 0 V, f = 100 kHz
5
pF
VS = VD = 0 V, f = 1 MHz
16
Room
Full
Room
Full
Room
Full
1
5
Positive Supply Current
Negative Supply Current
Logic Supply Current
I+
I-
- 1
- 5
V
IN = 0 V or 5 V
µA
1
5
IIN
Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG444B, DG445B
Vishay Siliconix
SPECIFICATIONS (for unipolar supplies)
Test Conditions
Unless Otherwise Specified
V+ = 12 V, V- = 0 V
D Suffix
- 40 °C to 85 °C
VL = 5 V, VIN = 2.4 V, 0.8 Ve
Parameter
Symbol
Temp.a Min.b
Typ.c
Max.b Unit
Analog Switch
Analog Signal Ranged
Drain-Source
On-Resistanced
VANALOG
RDS(on)
Full
0
12
V
90
Room
Full
160
200
IS = 1 mA, VD = 3 V, 8 V
Dynamic Characteristics
tON
tOFF
Q
Room
Room
Room
120
60
4
Turn-On Time
Turn-Off Time
Charge Injection
Power Supplies
300
200
RL = 1 k, CL = 35 pF, VS = 8 V
See Figure 2
ns
CL = 1 nF, Vgen = 6 V, Rgen = 0
pC
Room
Full
Room
Full
1
5
Positive Supply Current
Negative Supply Current
I+
I-
VIN = 0 or 5 V
- 1
- 5
µA
Room
Full
1
5
IIN
VL = 5.25 V, VIN = 0 or 5 V
Logic Supply Current
Notes:
a. Room = 25 °C, Full = as determined by the operating temperature suffix.
b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. Guaranteed by design, not subject to production test.
e. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
TYPICAL CHARACTERISTICS (T = 25 °C, unless otherwise noted)
A
110
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
0
V+ = 15 V
V- = - 15 V
5 V
125 °C
85 °C
10 V
25 °C
15 V
- 55 °C
20 V
- 15
- 10
- 5
0
5
10
15
- 20 - 16 - 12 - 8 - 4
0
4
8
12 16 20
V
– Drain Voltage (V)
V – Drain Voltage (V)
D
D
RDS(on) vs. VD and Power Supply Voltages
RDS(on) vs. VD and Temperature
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Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG444B, DG445B
Vishay Siliconix
TYPICAL CHARACTERISTICS (T = 25 °C, unless otherwise noted)
A
250
225
200
175
150
125
100
75
40
30
V+ = 22 V
V- = - 22 V
V+ = 5 V
T
A
= 25 °C
20
10
I
D(on)
7 V
I
, I
S(off) D(off)
0
10 V
12 V
- 10
15 V
- 20
- 30
50
25
- 40
0
0
2
4
6
8
10
12
14
16
- 20 - 15 - 10 - 5
0
5
10
15
20
V
– Drain Voltage (V)
V
– Analog Voltage (V)
D
ANALOG
RDS(on) vs. VD and Single Power Supply Voltages
Leakage Currents vs. Analog Voltage
1 nA
30
20
V+ = 15 V
V- = - 15 V
V
V = - 14 V
D
S,
10
100 pA
V+ = 15 V
V- = - 15 V
V+ = 12 V
V- = 0 V
0
I
, I
S(off) D(off)
- 10
- 20
- 30
10 pA
1 pA
- 15
- 10
- 5
0
5
10
15
- 55 - 35 - 15
5
25
45
65
85 105 125
V
– Analog Voltage (V)
ANALOG
Temperature (°C)
Leakage Current vs. Temperature
QS, QD - Charge Injection vs. Analog Voltage
120
110
100
90
V+ = + 15 V
V- = - 15 V
R
L
= 50 Ω
80
70
60
50
40
10 k
100 k
1 M
10 M
f – Frequency (Hz)
Off Isolation vs. Frequency
Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG444B, DG445B
Vishay Siliconix
SCHEMATIC DIAGRAM (typical channel)
V+
S
V
L
V-
Level
Shift/
Drive
V
IN
V+
GND
D
V-
Figure 1.
TEST CIRCUITS
+ 5 V
+ 15 V
3 V
0 V
Logic
Input
t < 20 ns
t < 20 ns
f
r
50 %
50 %
V
V+
D
L
S
10 V
V
O
t
OFF
Switch
Input
V
IN
S
R
1 kΩ
C
L
35 pF
L
V
O
3 V
80 %
80 %
V-
GND
Switch
Output
0 V
t
- 15 V
ON
Note:
Logic input waveform is inverted for DG445.
C
L
(includes fixture and stray capacitance)
Figure 2. Switching Time
+ 5 V
+ 15 V
ΔV
O
V
O
V
V+
D
L
R
g
S
V
O
IN
X
OFF
OFF
ON
ON
OFF
OFF
IN
C
1 nF
V
L
g
(DG444B)
3 V
V-
GND
IN
X
- 15 V
Q = ΔV x C
O
L
(DG445B)
Figure 3. Charge Injection
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Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG444B, DG445B
Vishay Siliconix
TEST CIRCUITS
C = 1 mF tantalum in parallel with 0.01 mF ceramic
C
+ 5 V
+ 15 V
V+
+ 5 V
+ 15 V
V+
C
V
L
S
D
1
V
S
1
V
L
V
O
R
= 50 Ω
S
D
V
g
S
50 Ω
IN
S
1
R
g
= 50 Ω
0 V, 2.4 V
NC
R
L
IN
V
O
D
2
2
0 V, 2.4 V
GND
V-
R
L
C
IN
2
0 V, 2.4 V
GND
V-
C
- 15 V
V
V
S
- 15 V
Off Isolation = 20 log
O
V
V
S
X
Isolation = 20 log
TA L K
O
C = RF bypass
Figure 5. Off Isolation
Figure 4. Crosstalk
+ 5 V
+ 15 V
V+
C
V
L
S
D
Meter
IN
HP4192A
Impedance
Analyzer
0 V, 2.4 V
or Equivalent
GND
V-
f = 1 MHz
C
- 15 V
Figure 6. Source/Drain Capacitances
APPLICATIONS
+ 5 V
+ 15 V
V+
V
L
+ 15 V
+ 15 V
1
/ DG444B
4
V
0 V
OUT
+ 5 V
10 kΩ
V
IN
0 V
GND
V-
Figure 7. Level Shifter
Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG444B, DG445B
Vishay Siliconix
APPLICATIONS
V
IN
+
-
V
OUT
+ 5 V
+ 15 V
V+
Gain error is determined only by the resistor
tolerance. Op amp offset and CMRR will limit ac-
curacy of circuit.
V
L
GAIN
1
2
R
90 kΩ
1
A
= 1
V
With SW Closed:
4
R
2
5 kΩ
GAIN
A
= 10
V
V
R + R + R + R
1 2 3 4
OUT
=
= 100
V
R
4
IN
R
4 kΩ
3
GAIN
3
A
= 20
V
R
1 kΩ
4
GAIN
4
A
= 100
V
DG444B or DG445B
V-
GND
- 15 V
Figure 8. Precision-Weighted Resistor Programmable-Gain Amplifier
+ 5 V + 15 V
V
1
Logic Input
Low = Sample
High = Hold
DG444B
+ 15 V
15 V
+ 15 V
-
J202
C
50 pF
1
+
R
V
5 MΩ
5.1 MΩ
1
IN
2N4400
200 kΩ
V
OUT
J500
J507
V
C
2
2
GND
1000 pF
30 pF
- 15 V
Figure 9. Precision Sample-and-Hold
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see www.vishay.com/ppg?72626.
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Document Number: 72626
S11-1350-Rev. B, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SOIC (NARROW): 16ĆLEAD
JEDEC Part Number: MS-012
MILLIMETERS
INCHES
Dim
A
A1
B
C
D
Min
1.35
0.10
0.38
0.18
9.80
3.80
Max
1.75
0.20
0.51
0.23
10.00
4.00
Min
Max
0.069
0.008
0.020
0.009
0.393
0.157
0.053
0.004
0.015
0.007
0.385
0.149
E
16 15
14 13
12 11
10
7
9
8
1.27 BSC
0.050 BSC
e
H
L
Ĭ
5.80
0.50
0_
6.20
0.93
8_
0.228
0.020
0_
0.244
0.037
8_
E
1
2
3
4
5
6
ECN: S-03946—Rev. F, 09-Jul-01
DWG: 5300
H
D
C
All Leads
0.101 mm
0.004 IN
A1
Ĭ
L
e
B
Document Number: 71194
02-Jul-01
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Package Information
Vishay Siliconix
PDIP: 16ĆLEAD
16
1
15
2
14
3
13
4
12
5
11
6
10
7
9
8
E
E
1
D
S
Q
1
A
L
A
1
15°
MAX
C
e
1
B
B
1
e
A
MILLIMETERS
INCHES
Min
Dim
A
A1
B
B1
C
D
Min
3.81
0.38
0.38
0.89
0.20
18.93
7.62
5.59
2.29
7.37
2.79
1.27
0.38
Max
5.08
1.27
0.51
1.65
0.30
21.33
8.26
7.11
2.79
7.87
3.81
2.03
1.52
Max
0.200
0.050
0.020
0.065
0.012
0.840
0.325
0.280
0.110
0.310
0.150
0.080
0.060
0.150
0.015
0.015
0.035
0.008
0.745
0.300
0.220
0.090
0.290
0.110
0.050
.015
E
E1
e1
eA
L
Q1
S
ECN: S-03946—Rev. D, 09-Jul-01
DWG: 5482
Document Number: 71261
06-Jul-01
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Package Information
Vishay Siliconix
QFN−16 (4 4 mm)
JEDEC Part Number: MO-220
D
-B-
D/2
AA
Index Area
(Dń2 Eń2)
4
E/2
BB
E
-A-
CC
DD
aaa
aaa
C
C
2 X
2 X
Detail A
Top View
// ccc
Nx
C
C
Seating Plane
-C-
0.08
9
Side View
D2
A
A1
A3
N L
Detail B
D2/2
Datum A or B
N r
E2/2
(NE-1) x
e
6
E2
2
1
Terminal Tip
Terminal Tip
5
e
Exposed Pad
8
5
e/2
5
N b
N
N-1
M
bbb
C A B
e
(ND-1) x
8
e
Detail A
Even Terminal/Side
Odd Terminal/Side
Detail B
Bottom View
Document Number: 71921
19-Aug-02
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Package Information
Vishay Siliconix
QFN−16 (4 4 mm)
JEDEC Part Number: MO-220
MILLIMETERS*
INCHES
Dim
Min
Nom
Max
Min
Nom
Max
Notes
A
A1
A3
AA
aaa
BB
b
0.80
0.90
0.02
1.00
0.0315
0.0354
0.0008
0.0079
0.0136
0.0098
0.0136
0.0118
0.0039
0.0071
0.0039
0.1575 BSC
0.0846
0.0071
0.1575 BSC
0.0846
0.0256 BSC
0.0217
16
0.0394
0
0.05
0
0.0020
-
0.20 Ref
0.345
0.25
-
-
-
-
-
-
-
-
-
-
-
-
0.345
0.30
-
-
-
0.23
0.38
0.0091
0.0150
5
bbb
CC
ccc
D
-
-
-
0.10
-
-
-
-
-
-
-
-
-
0.18
0.10
4.00 BSC
2.15
D2
DD
E
2.00
-
2.25
-
0.0787
-
0.0886
-
0.18
4.00 BSC
2.15
E2
e
2.00
0.45
2.25
0.65
0.0787
0.0177
0.0886
0.0256
0.65 BSC
0.55
L
N
16
3, 7
6
ND
NE
r
-
4
-
-
-
-
4
-
-
-
-
4
-
4
6
b(min)/2
-
b(min)/2
-
* Use millimeters as the primary measurement.
ECN: S-21437—Rev. A, 19-Aug-02
DWG: 5890
NOTES:
1.
2.
3.
4.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
All dimensions are in millimeters. All angels are in degrees.
N is the total number of terminals.
The terminal #1 identifier and terminal numbering convention shall conform to JESD 95-1 SPP-012. Details of terminal #1 identifier are optional, but must
be located within the zone indicated. The terminal #1 identifier may be either a molded or marked feature. The X and Y dimension will vary according to
lead counts.
5.
6.
7.
8.
9.
Dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from the terminal tip.
ND and NE refer to the number of terminals on the D and E side respectively.
Depopulation is possible in a symmetrical fashion.
Variation HHD is shown for illustration only.
Coplanarity applies to the exposed heat sink slug as well as the terminals.
Document Number: 71921
19-Aug-02
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2
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-16
0.372
(9.449)
0.047
(1.194)
0.022
0.050
0.028
(0.559)
(1.270)
(0.711)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
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24
Document Number: 72608
Revision: 21-Jan-08
AN505
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR QFN-16 (4 x 4 MM BODY)
C1
X2
16
15
14
13
E
12
11
10
9
1
2
3
4
Keep Out
Zone
C2
Y2
5
6
7
8
Y1
X1
Inches
0.142
0.142
0.026
0.014
0.089
0.037
0.089
Millimeters
3.60
C1
C2
E
3.60
0.65
X1
X2
Y1
Y2
0.35
2.25
0.95
2.25
Note:
QFN-16 (4 x 4) has an exposed center pad that must not come into contact with any metalized structure on the PCB. This area is considered a Keep Out Zone.
Document Number: 74976
19-Apr-07
www.vishay.com
1
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to
obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 11-Mar-11
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1
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