DG429DN-T1 [VISHAY]
IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PQCC20, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, LCC-20, Multiplexer or Switch;
| 型号： | DG429DN-T1 |
| 厂家： | 
VISHAY |
| 描述： | IC 4-CHANNEL, DIFFERENTIAL MULTIPLEXER, PQCC20, HALOGEN FREE AND ROHS COMPLIANT, PLASTIC, LCC-20, Multiplexer or Switch |
| 文件： | 总14页 (文件大小：173K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DG428, DG429
Vishay Siliconix
Single 8-Ch/Differential 4-Ch Latchable Analog Multiplexers
FEATURES
DESCRIPTION
•
Halogen-free according to IEC 61249-2-21
Definition
The DG428, DG429 analog multiplexers have on-chip
address and control latches to simplify design in
microprocessor based applications. Break-before-make
switching action protects against momentary crosstalk of
adjacent input signals.
•
•
•
•
•
•
•
Low RDS(on): 55
Low Charge Injection: 1 pC
On-Board TTL Compatible Address Latches
High Speed - tTRANS: 160 ns
Break-Before-Make
Low Power Consumption: 0.3 mW
Compliant to RoHS Directive 2002/95/EC
The DG428 selects one of eight single-ended inputs to a
common output, while the DG429 selects one of four
differential inputs to a common differential output.
An on channel conducts current equally well in both
directions. In the off state each channel blocks voltages up to
the power supply rails. An enable (EN) function allows the
user to reset the multiplexer/demultiplexer to all switches off
for stacking several devices. All control inputs, address (Ax)
and enable (EN) are TTL compatible over the full specified
operating temperature range.
BENEFITS
•
Improved System Accuracy
• Microprocessor Bus Compatible
• Easily Interfaced
• Reduced Crosstalk
• High Throughput
• Improved Reliability
The silicon-gate CMOS process enables operation over a
wide range of supply voltages. The absolute maximum
voltage rating is extended to 44 V. Additionally, single supply
operation is also allowed and an epitaxial layer prevents
latchup.
APPLICATIONS
•
Data Acquisition Systems
• Automatic Test Equipment
• Avionics and Military Systems
• Communication Systems
• Microprocessor-Controlled Analog Systems
• Medical Instrumentation
On-board TTL-compatible address latches simplify the digital
interface design and reduce board space in bus-controlled
systems such as data acquisition systems, process controls,
avionics, and ATE.
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG428
Dual-In-Line
DG428
PLCC
WR
18
17
16
15
14
13
12
11
10
RS
1
2
3
4
5
6
7
8
9
3
2
1
20 19
A
0
A
1
Latches
EN
V-
A
2
EN
V-
4
5
6
7
8
18
A
2
Latches
17 GND
Decoders/Drivers
Decoders/Drivers
GND
V+
V+
S
1
S
2
S
3
16
15
14
S
1
S
5
S
2
S
5
S
6
S
3
S
6
9
10 11 12 13
Top View
S
4
S
7
D
S
8
Top View
Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
www.vishay.com
1
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG429
Dual-In-Line and SOIC
DG429
PLCC
WR
RS
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
3
2
1
20 19
A
0
A
1
Latches
EN
V-
GND
V+
EN
V-
4
5
6
7
8
18 GND
Latches
17
16
15
14
V
S
Decoders/Drivers
DD
Decoders/Drivers
1b
S
1a
2a
3a
S
S
S
S
S
1a
2a
3a
1b
2b
3b
S
S
S
S
2b
S
S
S
3b
9
10 11 12 13
Top View
4a
4b
D
a
D
b
Top View
TRUTH TABLE - DG428
TRUTH TABLE - DG429
8-Channel Single-Ended Multiplexer
Differential 4-Channel Multiplexer
A2
A1
A0
A1
A0
EN
WR
RS
On Switch
EN
WR
RS
On Switch
Latching
Latching
Maintains previous
switch condition
Maintains previous
switch condition
X
X
X
X
1
X
Reset
X
X
X
1
Reset
X
None (latches
cleared)
None (latches
cleared)
X
X
X
X
0
X
X
X
0
Transparent Operation
Transparent Operation
X
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
None
X
0
0
1
1
X
0
1
0
1
0
1
1
1
1
0
0
0
0
0
1
1
1
1
1
None
1
2
3
4
5
6
7
8
1
2
3
4
Logic "0" = VAL 0.8 V
Logic "1" = VAH 2.4 V
X = Don’t Care
ORDERING INFORMATION - DG428
ORDERING INFORMATION - DG429
Temp Range
Package
Part Number
Temp Range
Package
Part Number
DG428DJ
DG429DJ
18-pin Plastic DIP
18-pin Plastic DIP
DG428DJ-E3
DG428DN
DG429DJ-E3
DG429DN
- 40 °C to 85 °C
20-pin PLCC
- 40 °C to 85 °C
20-pin PLCC
DG428DN-E3
DG429DN-E3
DG429DW
18-pin Widebody SOIC
DG429DW-E3
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Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS (T = 25 °C, unless otherwise noted)
A
Parameter
V+
Symbol
Limit
44
Unit
Voltages Referenced to V-
GND
25
V
(V-) - 2 V to (V+) + 2 V
or 30 mA, whichever occurs first
Digital Inputsa, VS, VD
Current (Any Terminal)
30
100
mA
°C
Peak Current, S or D (Pulsed at 1 ms, 10 % Duty Cycle Max)
(AK Suffix)
Storage Temperature
- 65 to 150
- 65 to 125
470
(DJ, DN Suffix)
18-pin Plastic DIPc
18-pin CerDIPd
Power Dissipation (Package)b
20-pin PLCCf
900
mW
800
28-Pin Widebody SOICf
450
Notes:
a. Signals on SX, DX or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads soldered or welded to PC board.
c. Derate 6.3 mW/°C above 75 °C.
d. Derate 12 mW/°C above 75 °C.
e. Derate 10 mW/°C above 75 °C.
f. Derate 6 mW/°C above 75 °C.
Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
a
SPECIFICATIONS
Test Conditions
A Suffix
D Suffix
Unless Otherwise Specified
V+ = 15 V, V- = - 15 V, WR = 0,
RS = 2.4 V, VIN = 2.4 V, 0.8 Vf
- 55 °C to 125 °C - 40 °C to 85 °C
Parameter
Symbol
Temp.b Typ.c
Min.d
Max.d Min.d Max.d Unit
Analog Switch
Analog Signal Rangee
VANALOG
RDS(on)
Full
- 15
15
- 15
15
V
VD
=
10 V, VAL = 0.8 V
55
100
125
Drain-Source
On-Resistance
Room
Full
100
125
I
S = - 1 mA, VAH = 2.4 V
- 10 V < VS < 10 V
Greatest Change in RDS(on)
Between Channelsg
RDS(on)
Room
5
%
I
S = - 1 mA
VS 10 V,
=
0.03
0.5
50
Room
Full
- 0.5
- 50
0.5
50
- 0.5
- 50
IS(off)
Source Off Leakage Current
V
EN = 0 V, VD
=
10 V
DG428
0.07
0.05
0.07
0.05
1
100
1
50
1
Room
Full
- 1
- 100
1
100
- 1
- 100
VEN = 0 V
ID(off)
VD
VS
=
=
10 V
10 V
Drain Off Leakage Current
Room
Full
- 1
- 50
1
50
- 1
- 50
DG429
DG428
nA
VS = VD
EN = 2.4 V
AL= 0.8 V
AH = 2.4 V
=
10 V
Room
Full
- 1
- 100
1
100
- 1
- 100
100
V
V
V
ID(on)
Drain On Leakage Current
1
50
Room
Full
- 1
- 50
1
50
- 1
- 50
DG429
Digital Control
VA = 2.4 V
VA = 15 V
Full
Full
0.01
0.01
1
1
1
1
Logic Input Current
Input Voltage High
IAH
µA
pF
VEN = 0 V, 2.4 V, VA = 0 V
RS = 0 V, WR = 0 V
f = 1 MHz
Logic Input Current
Input Voltage Low
IAL
Cin
Full
- 0.01
8
- 1
10
- 1
10
Logic Input Capacitance
Room
Dynamic Characteristics
250
300
Room
Full
150
250
300
tTRANS
tOPEN
Transition Time
See Figure 5
See Figure 4
Break-Before-Make Interval
Enable and Write Turn-On Time
Full
30
90
ns
150
225
150
300
Room
Full
150
225
tON(EN,WR)
See Figure 6 and 7
Room
Full
55
1
150
300
tOFF(EN,RS)
Q
Enable and Reset Turn-Off Time
Charge Injection
See Figure 6 and 8
V
GEN = 0 V, RGEN = 0
CL = 1 nF, See Figure 9
EN = 0 V, RL = 300
CL = 15 pF, VS = 7 VRMS
f = 100 kHz
Room
pC
dB
V
Off Isolation
OIRR
Room
Room
- 75
CS(off)
CD(off)
VS = 0 V, VEN = 0 V, f = 1 MHz
11
40
20
54
34
Source Off Capacitance
Drain Off Capacitance
DG428 Room
DG429 Room
DG428 Room
DG429 Room
VD = 0 V
EN = 0 V
f = 1 MHz
pF
V
CD(on)
Drain On Capacitance
Minimum Input Timing Requirements
tW
Write Pulse Width
Full
Full
Full
100
100
10
100
100
10
AX, EN Data Set Up time
AX, EN Data Hold Time
tS
tH
See Figure 2
ns
tRS
VS = 5 V, See Figure 3
VEN = VA = 0, RS = 5 V
Reset Pulse Width
Full
100
100
Power Supplies
Positive Supply Current
Negative Supply Current
I+
I-
Room
20
100
100
µA
Room - 0.001
- 5
- 5
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Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
a
SPECIFICATIONS (for single supply)
Test Conditions
A Suffix
D Suffix
Unless Otherwise Specified
- 55°C to 125 °C - 40 °C to 85 °C
V+ = 12 V, V- = 0 V, WR = 0,
RS = 2.4 V, VIN = 2.4 V, 0.8 Vf
Parameter
Symbol
Temp.b Typ.c Min.d
Max.d
Min.d
Max.d Unit
Analog Switch
Analog Signal Rangee
VANALOG
RDS(on)
Full
0
12
0
12
V
VD
=
10 V, VAL = 0.8 V
Drain-Source
On-Resistance
Room
80
150
150
IS = - 500 µA, VAH = 2.4 V
0 V < VS < 10 V
IS = - 1 mA
DS(on) Matchg
RDS(on)
Room
5
%
R
VS = 0 V, 10 V,
VEN = 0 V, VD = 10 V, 0 V
0.03
Room
Full
- 0.5
- 50
0.5
50
- 0.5
- 50
0.5
50
IS(off)
Source Off Leakage Current
Drain Off Leakage Current
Room
Full
Room
Full
Room
Full
0.07
0.05
0.07
0.05
- 1
- 100
- 1
- 50
- 1
- 100
1
100
1
50
1
100
- 1
- 100
- 1
- 50
- 1
- 100
1
100
1
50
1
100
VD = 0 V, 10 V
VS = 10 V, 0 V
VEN = 0 V
DG428
DG429
DG428
ID(off)
nA
VS = VD = 0 V, 10 V
VEN = 2.4 V
ID(on)
Drain On Leakage Current
VAL= 0.8 V
VAH = 2.4 V
Room
Full
- 1
- 50
1
50
- 1
- 50
1
50
DG429
Digital Control
VA = 2.4 V
VA = 12 V
VEN = 0 V, 2.4 V, VA = 0 V
RS = 0 V, WR = 0 V
Full
Full
1
1
1
1
Logic Input Current
Input Voltage High
IAH
IAL
µA
ns
Logic Input Current
Input Voltage Low
Full
- 1
- 1
Dynamic Characteristics
S1 = 10 V/ 2 V, S8 = 2 V/ 10 V
See Figure 5
Room
Full
160
40
280
350
280
350
tTRANS
tOPEN
tON(EN,WR)
tOFF(EN,RS)
Transition Time
Room
Full
25
10
25
10
Break-Before-Make Interval
See Figure 4
S1 = 5 V
See Figure 6 and 7
S1 = 5 V
See Figure 6 and 8
Room
Full
110
70
300
400
300
400
Enable and WriteTurn-On Time
Enable and Reset Turn-Off Time
Room
Full
300
400
300
400
VGEN = 6 V, RGEN = 0
CL = 1 nF, See Figure 9
Charge Injection
Off Isolation
Q
Room
4
pC
dB
V
EN = 0 V, RL = 300
OIRR
CL = 15 pF, VS = 7 VRMS
f = 100 kHz
Room
- 75
Minimum Input Timing Requirements
Write Pulse Width
AX, EN Data Set Up time
AX, EN Data Hold Time
tW
tS
Full
Full
Full
Full
100
100
10
100
100
10
See Figure 2
ns
tH
tRS
I+
VS = 5 V, See Figure 3
VEN = 0 V, VA = 0, RS = 5 V
Reset Pulse Width
Power Supplies
Positive Supply Current
Notes:
100
100
Room
20
100
100
µA
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
g. RDS(on) = RDS(on) MAX – RDS(on) MIN
x 100 %
(
RDS(on) AVE
)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
TYPICAL CHARACTERISTICS (T = 25 °C, unless otherwise noted)
A
100
90
80
70
60
50
40
30
20
10
0
140
120
100
5 V
125 °C
85 °C
10 V
80
60
12 V
15 V
8 V
25 °C
- 55 °C
40
20 V
- 40 °C
- 5
20
0
V+ = 15 V
V- = - 15 V
- 15
- 10
0
5
10
15
- 20 - 16 - 12 - 8 - 4
0
4
8
12 16 20
V
D
– Drain Voltage (V)
V
D
– Drain Voltage (V)
RDS(on) vs. VD and Supply Voltage
RDS(on) vs. VD and Temperature
40
30
200
160
120
80
V+ = 15 V
V- = - 15 V
V- = 0 V
V
S
V
D
= -V for I
D
D(off)
D(on)
V+ = 7.5 V
= V for I
S
20
10 V
12 V
10
I
S(off)
0
15 V
20 V
I
I
D(on), D(off)
- 10
- 20
- 30
40
0
0
4
8
12
16
20
- 15
- 10
- 5
0
5
10
15
V
D
– Drain Voltage (V)
V
S,
V – Source, Drain Voltage (V)
D
I
D , IS Leakage Currents vs. Analog Voltage
Single Supply RDS(on) vs. VD and Supply
10 nA
1 nA
250
200
150
100
50
V+ = 15 V
V- = - 15 V
V
S,
V
D
=
14 V
t
TRANS
I
S (off)
I
I
100 pA
10 pA
1 pA
D(on), D(off)
t
ON(EN)
t
OFF(EN)
0
"5
"10
"15
Supply Voltage (V)
"20
- 55 - 35 - 15
5
25
45
65
85 105 125
Temperature (°C)
Switching Times vs. Power Supply Voltage
ID , IS Leakages vs. Temperature
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Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
TYPICAL CHARACTERISTICS (T = 25 °C, unless otherwise noted)
A
350
V- = 0 V
60
40
300
250
200
150
100
50
V+ = 12 V
V- = 0 V
20
t
TRANS
0
t
ON
- 20
- 40
- 60
t
OFF
V+ = 15 V
V- = - 15 V
0
5
10
15
20
- 15
- 10
- 5
0
5
10
15
V+ – Positive Supply (V)
V
S
– Source Voltage (V)
Switching Times vs. Single Supply
Charge Injection vs. Analog Voltage
8
6
- 140
- 120
- 100
- 80
I+
E
N
A
X
= 5 V
= 0 or 5 V
4
2
I
GND
0
- 2
- 4
- 6
- 8
- 60
- 40
I-
- 20
1 k
10 k
100 k
1 M
10 M
1 k
10 k
100 k
1 M
10 M
f – Frequency (Hz)
f – Frequency (Hz)
Supply Currents vs. Switching Frequency
Off-Isolation vs. Frequency
200
150
100
50
3
2.5
2
V+ = 15 V
V- = - 15 V
t
TRANS
t
ON
1.5
1
t
OFF
0.5
0
0
- 55 - 35 - 15
25
45
85
125
5
65
105
0
5
10
15
20
Temperature (°C)
V+ Positive – Supply Voltage (V)
Input Switching Threshold vs. Positive Supply Voltage
Switching Times vs. Temperature
Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
SCHEMATIC DIAGRAM (Typical Channel)
V+
V
REF
GND
EN
D
D
D
Q
Q
O
O
V+
V-
Level
Shift
Decode/
Drive
A
X
n
n
S
1
Latches
WR
CLK
V+
V-
RESET
S
n
RS
V-
Figure 1.
TIMING DIAGRAMS
3 V
0 V
RS
50 %
3 V
WR
50 %
t
RS
0 V
t
W
t
OFF(RS)
t
H
t
S
V
O
80 %
Switch
Output
3 V
A , A , (A )
20 %
0
1
2
80 %
EN
0 V
0 V
Figure 2.
Figure 3.
TEST CIRCUITS
+ 15 V
t < 20 ns
r
t < 20 ns
f
V+
+ 2.4 V
RS
3 V
0 V
Logic
Input
50 %
EN
All S and D
+ 5 V
a
DG428
DG429
A , A , (A )
D , D
b
0
1
2
V
O
V
S
WR
GND
V-
80 %
Switch
Output
50 Ω
300 Ω
35 pF
- 15 V
V
O
t
OPEN
0 V
Figure 4. Break-Before-Make
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Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
TEST CIRCUITS
+ 15 V
V+
RS
10 V
10 V
S
+ 2.4 V
1
EN
S
- S
7
2
A
A
A
0
t < 20 ns
r
DG428
t < 20 ns
f
1
3 V
0 V
S
8
Logic
Input
2
50 %
V
O
D
WR
GND
V-
35 pF
50 Ω
300 Ω
- 15 V
V
S1
90 %
Switch
Output
+ 15 V
V
O
0 V
V+
RS
EN
10 %
+ 2.4 V
S
10 V
10 V
1b
V
S8
S
1a
- S , D
4a
and S
a
3b
S
t
t
2b
TRANS
TRANS
A
0
S ON
1
S ON
8
S
4b
DG429
A
1
D
V
O
b
WR
GND
V-
35 pF
50 Ω
300 Ω
- 15 V
Figure 5. Transition Time
+ 15 V
V+
+ 2.4 V
RS
EN
S
1
- 5 V
DG428
S
- S
8
2
A
A
A
0
1
2
V
D
O
t < 20 ns
t < 20 ns
f
r
WR
GND
V-
3 V
Logic
Input
50 Ω
50 %
35 pF
300 Ω
0 V
t
- 15 V
t
ON(EN)
OFF(EN)
0 V
+ 15 V
Switch
Output
V+
+ 2.4 V
RS
EN
S
1b
- 5 V
V
O
DG429
90 %
V
O
S
1a
- S , D
4a
a
A
0
S
2b
- S
4b
A
1
D
b
V
O
WR
GND
V-
50 Ω
35 pF
300 Ω
- 15 V
Figure 6. Enable tON/tOFF Time
Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
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9
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
TEST CIRCUITS
+ 15 V
V+
S
or S
1b
EN
0
+ 5 V
3 V
0 V
1
+ 2.4 V
A , A , (A )
1
2
WR
50 %
t
Remaining
Switches
RS
V
O
ON(WR)
DG428
Switch
Output
DG429 D , D
WR
b
V
O
GND
V-
20 %
35 pF
300 Ω
- 15 V
0 V
Figure 7. Write Turn-On Time tON(WR)
+ 15 V
V+
3 V
RS
S
1
or S
1b
EN
0
+ 5 V
+ 2.4 V
A , A , (A )
50 %
1
2
Remaining
Switches
0 V
t
OFF(RS)
DG42
DG429
V
O
D , D
b
RS
80 %
V
O
Switch
Output
WR
GND
V-
35 pF
300 Ω
- 15 V
0 V
Figure 8. Reset Turn-Off Time tOFF(RS)
+ 15 V
V+
A , A , (A )
OFF
ON
OFF
RS
0
1
2
2.4 V
EN
R
g
ΔV
O
S
D
V
O
V
O
IN
GND
C
L
1 nF
V
g
3 V
WR
V-
ΔV is the measured voltage error due to
O
charge injection. The charge in coulombs is Q =
x ΔV
C
L
O
- 15 V
Figure 9. Charge Injection
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Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG428, DG429
Vishay Siliconix
DETAILED DESCRIPTION
APPLICATIONS HINTS
Bus Interfacing
The internal structure of the DG428, DG429 includes a 5 V
logic interface with input protection circuitry followed by a
latch, level shifter, decoder and finally the switch constructed
with parallel n- and p-channel MOSFETs (see Figure 1).
The DG428, DG429 minimize the amount of interface
hardware between a microprocessor system bus and the
analog system being controlled or measured. The internal
TTL compatible latches give these multiplexers write-only
memory, that is, they can be programmed to stay in a
particular switch state (e.g., switch
microprocessor determines it is necessary to turn different
switches on or turn all switches off (see Figure 10).
The input protection on the logic lines A0, A1, A2, EN and
control lines WR, RS shown in Figure 1 minimizes
susceptibility to ESD that may be encountered during
handling and operational transients.
1 on) until the
The logic interface is a CMOS logic input with its supply
voltage from an internal + 5 V reference voltage. The output
of the input inverter feeds the data input of a D type latch.
The level sensitive D latch continuously places the DX input
signal on the QX output when the WR input is low, resulting
in transparent latch operation. As soon as WR returns high
the latch holds the data last present on the Dn input, subject
to the "Minimum Input Timing Requirements" table.
The input latches become transparent when WR is held low;
therefore, these multiplexers operate by direct command of
the coded switch state on A2, A1, A0. In this mode the DG428
is identical to the popular DG408. The same is true of the
DG429 versus the popular DG409.
During system power-up, RS would be low, maintaining all
eight switches in the off state. After RS returned high the
DG428 maintains all switches in the off state.
Following the latches the Qn signals are level shifted and
decoded to provide proper drive levels for the CMOS
switches. This level shifting ensures full on/off switch
operation for any analog signal level between the V+ and
V- supply rails.
When the system program performs a write operation to the
address assigned to the DG428, the address decoder
provides a CS active low signal which is gated with the
WRITE (WR) control signal. At this time the data on the
DATA BUS (that will determine which switch to close) is
stabilizing. When the WR signal returns to the high state,
(positive edge) the input latches of the DG428 save the data
from the DATA BUS. The coded information in the A0, A1, A2
and EN latches is decoded and the appropriate switch is
turned on.
The EN pin is used to enable the address latches during the
WR pulse. It can be hard wired to the logic supply or to V+ if
one of the channels will always be used (except during a
reset) or it can be tied to address decoding circuitry for
memory mapped operation. The RS pin is used as a master
reset. All latches are cleared regardless of the state of any
other latch or control line. The WR pin is used to transfer the
state of the address control lines to their latches, except
during a reset or when EN is low (see Truth Tables).
The EN latch allows all switches to be turned off under
program control. This becomes useful when two or more
DG428s are cascaded to build 16-line and larger
multiplexers.
+ 15 V
15 V
Analog
Inputs
S
1
V+
Data Bus
A , A , A , EN
0
1
2
DG428
RS
RESET
Processor
System
+ 5 V
Bus
S
8
WRITE
WR
D
Address
Bus
Analog
Output
V-
Address
Decoder
- 15 V
Figure 10. Bus Interface
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Tech-
nology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see www.vishay.com/ppg?70063.
Document Number: 70063
S11-1350–Rev. K, 04-Jul-11
www.vishay.com
11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
PLCC: 2OĆLEAD
D–SQUARE
A
2
MILLIMETERS
INCHES
D –SQUARE
1
Dim
A
A1
A2
B
B1
D
D1
D2
e1
Min
4.20
Max
4.57
3.04
–
Min
Max
0.180
0.120
–
B
1
0.165
0.090
0.020
0.013
0.026
0.385
0.350
0.290
2.29
B
0.51
0.331
0.661
9.78
0.553
0.812
10.03
9.042
8.38
0.021
0.032
0.395
0.356
0.330
e
1
D
2
8.890
7.37
1.27 BSC
0.050 BSC
ECN: S-03946—Rev. C, 09-Jul-01
DWG: 5306
A
1
A
0.101 mm
0.004″
Document Number: 71263
02-Jul-01
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1
Package Information
Vishay Siliconix
SOIC (WIDEĆBODY): 18ĆLEAD
MILLIMETERS
INCHES
Dim
A
A1
B
C
D
Min
2.15
0.10
0.35
0.23
11.25
7.25
Max
2.90
0.30
0.45
0.28
12.45
8.00
Min
Max
0.114
0.012
0.018
0.011
0.490
0.315
18 17 16 15 14 13 12 11
10
0.085
0.004
0.014
0.009
0.443
0.285
E
E
1.27 BSC
0.050 BSC
e
1
2
3
4
5
6
7
8
9
9.80
0.60
0_
10.60
1.00
8_
0.386
0.024
0_
0.417
0.039
8_
H
L
ꢀ
ECN: S-03946—Rev. C, 09-Jul-01
DWG: 5302
D
H
C
A
ALL LEADS
0.101 mm
A
1
ꢀ
0.004″
B
L
e
Document Number: 71266
02-Jul-01
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1
Legal Disclaimer Notice
www.vishay.com
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to
obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Material Category Policy
Vishay Intertechnology, Inc. hereby certifies that all its products that are identified as RoHS-Compliant fulfill the
definitions and restrictions defined under Directive 2011/65/EU of The European Parliament and of the Council
of June 8, 2011 on the restriction of the use of certain hazardous substances in electrical and electronic equipment
(EEE) - recast, unless otherwise specified as non-compliant.
Please note that some Vishay documentation may still make reference to RoHS Directive 2002/95/EC. We confirm that
all the products identified as being compliant to Directive 2002/95/EC conform to Directive 2011/65/EU.
Revision: 12-Mar-12
Document Number: 91000
1
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