PI2121 [VICOR]
8 Volt, 24 Amp Full-Function Active ORing Solution; 8伏特， 24安培全功能有源或门方案
| 型号： | PI2121 |
| 厂家： | 
VICOR CORPORATION |
| 描述： | 8 Volt, 24 Amp Full-Function Active ORing Solution |
| 文件： | 总21页 (文件大小：1279K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PI2121
Cool-ORingTM Series
8 Volt, 24 Amp Full-Function Active ORing Solution
Description
Features
The Cool-ORingTM PI2121 is a complete full-function
•
•
•
Integrated High Performance 24A, 1.5mΩ
Active ORing solution with a high-speed ORing
MOSFET controller and
MOSFET
a very low on-state
Very-small, high density fully-optimized solution
providing simple PCB layout.
Fast Dynamic Response to Power Source
failures, with 160ns reverse current turn-off
delay time
resistance MOSFET designed for use in redundant
power system architectures. The PI2121 Cool-ORing
solution is offered in an extremely small, thermally
enhanced 5mm x 7mm LGA package and can be
used in low voltage (≤ 5Vbus) high side Active ORing
applications. The PI2121 enables extremely low
power loss with fast dynamic response to fault
conditions, critical for high availability systems. A
master/slave feature allows the paralleling of PI2121
•
Accurate sensing capability to indicate system
fault conditions
•
•
•
•
•
Programmable under & over-voltage functions
Over temperature fault detection
Adjustable reverse current blanking timer
Master/Slave I/O for paralleling
Active low fault flag output
solutions
for
high
current
Active
ORing
requirements.
The PI2121, with its 1.5mΩ internal MOSFET
provides very high efficiency and low power loss
during steady state operation, while achieving high-
speed turn-off of the internal MOSFET during input
power source fault conditions that cause reverse
current flow. The PI2121 provides an active low
fault flag output to the system during excessive
forward current, light load, reverse current, over-
voltage, under-voltage and over-temperature fault
conditions. A temperature sensing function indicates
a fault if the maximum junction temperature exceeds
160°C. The under-voltage and over-voltage
thresholds are programmable via an external resistor
divider.
Applications
•
•
•
•
•
N+1 Redundant Power Systems
Servers & High End Computing
Telecom Systems
High-side Active ORing
High current Active ORing (≤ 5Vbus)
Package Information
•
17-pin 5mm x 7mm Thermally Enhanced LGA
Package
Typical Application:
Figure 2: PI2121 input current de-rating based on maximum
TJ=150°C vs. ambient temperature
Figure 1: PI2121 High Side Active ORing
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 1 of 21
Pin Description
Pin
Pin
Description
Name Number
1, 15,
16, 17
D
Drain- The Drain of the internal N-channel MOSFET, connect to the output load.
Source-The source of the internal N-channel MOSFET, connect to the input power source bus
voltage.
Positive Sense Input & Clamp: Connect SP pin to the S pin. The polarity of the voltage
difference between SP and SN provides an indication of current flow direction through the
MOSFET.
S
2, 3, 4, 5
6
SP
Fault State Output: This open collector pin pulls low when a fault occurs. Fault logic inputs
are VC Under-Voltage, Input Under-Voltage, Input Over-Voltage, Forward Over-Current, light
load, reverse current, and Over-Temperature. Leave this pin open if unused.
Blanking timer Input-Output: Connect a resistor from BK to GND to set the blanking time for
the Reverse Comparator function. To configure in slave mode, connect BK to VC. To
configure in master mode with the fastest turn-off response connect BK directly to GND.
Slave Input-Output: This pin is used for paralleling multiple PI2121 solutions in high power
applications. When the PI2121 is configured as the Master, this pin functions as an output
7
8
FT
BK
9
SL
capable of driving up to 10 SL pins of slaved PI2121 devices. It serves as an input when the
PI2121 is configured in slave mode.
Input Supply Pin: This pin is the supply pin for the control circuitry and gate driver. Connect
a 1μF capacitor between VC pin and the GND pin. Voltage on this pin is limited to 15.5V by
an internal shunt regulator in high auxiliary voltage applications. For high voltage auxiliary
supply applications connect a shunt resistor between VC and the auxiliary supply.
VC
10
11
GND
Ground: This pin is ground for the gate driver and control circuitry.
Input Over Voltage Input: The OV pin is used to detect an input source over-voltage
condition in ground referenced applications. When the OV pin voltage crosses the OV
OV
12
threshold, the FT pin pulls low indicating a fault condition. The input voltage OV threshold is
programmable through an external resistor divider. Connect OV to GND to disable this
function.
Input Under-Voltage Input: The UV pin is used to detect an input source under-voltage
condition in ground referenced applications. When the UV pin voltage drops below the UV
UV
SN
13
14
threshold, the FT pin pulls low indicating a fault condition. The input voltage UV threshold is
programmable through an external resistor divider. Connect UV to VC to disable this function.
Negative Sense Input & Clamp- Connect SN to D pin. The polarity of the voltage difference
between SP and SN provides an indication of current flow direction through the MOSFET.
Package Pin-out
17 Pin LGA (5mm x 7mm)
Top view
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 2 of 21
Absolute Maximum Ratings
Drain-to-Source Voltage (VDS)
Source Current (IS ) Continuous
Source Current (IS ) Pulsed (10μs)
(3)
8V @ 25°C
24A
100A
54°C/W
-0.3V to 17.3V / 40mA
-0.3V to 8.0V / 10mA
Thermal Resistance R
VC
θJA
SP, SN, OV, SL
-0.3V to 17.3V / 10mA
UV,BK, FT
GND
-0.3V / 5A peak
-65oC to 150oC
-40oC to Over Temperature Fault (TFT)
250oC
Storage Temperature
Operating Junction Temperature
Lead Temperature (Soldering, 20 sec)
ESD Rating
2kV HBM
Electrical Specifications
Unless otherwise specified: -40°C < TJ < 125°C, VC =12V, CVc = 1uF, CSL = 10pF
Parameter
Symbol Min
Typ
Max
Units
Conditions
VC Supply
Operating Supply Range (4)
VVC-GND
IVC
VVC-CLM
RVC
4.5
15
13.2
4.2
V
No VC limiting resistors
Normal Operating Condition, No
Faults
Quiescent Current
3.7
mA
VC Clamp Voltage
15.5
16
7.5
4.5
V
Ω
IVC=10mA
VC Clamp Shunt Resistance
VC Under-voltage Rising Threshold
VC Under-voltage Falling Threshold
VC Under-voltage Hysteresis
Internal N-Channel MOSFET
Delta IVC=10mA
VVCUVR
VVCUVF
VVCUV-HS
4.3
4.15
150
V
4.0
8
V
mV
In OFF state, ID=250µA ,
Tj=25°C; Figure 10, page 11
Drain-to-Source Breakdown Voltage
BVDSS
V
Source Current Continuous
Drain Leakage Current
IS
24
10
A
In ON state, Tj=25°C
IDLK
μA
In OFF state, VDS=8V, Tj=25°C
In ON state, IS=20A, Tj=25°C
VC-V(S) ≥ 5V
Drain-to-Source On Resistance
RDSon
Vf-BD
1.5
0.7
2.0
1.0
mΩ
Body Diode Forward Voltage
FAULT
V
In ON state, IS=4A, Tj=25°C
Under-Voltage Rising Threshold
Under-Voltage Falling Threshold
Under-Voltage Threshold Hysteresis
Under-Voltage Bias Current
Over-Voltage Rising Threshold
Over-Voltage Falling Threshold
VUVR
VUVF
VUV-HS
IUV
500
475
25
540
mV
mV
mV
μA
440
-1
1
VOVR
VOVF
500
475
540
mV
mV
440
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 3 of 21
Electrical Specifications
Unless otherwise specified: -40°C < TJ < 125°C, VC =12V, CVc = 1uF, CSL = 10pF
Parameter
Symbol Min
Typ
Max
Units
Conditions
FAULT (Continued)
Over-Voltage Threshold Hysteresis
Over-Voltage Bias Current
Fault Output Low Voltage
VOV-HS
25
mV
μA
V
IOV
VFTL
-1
1
0.2
0.5
10
60
IFT=2mA, VC>3.5V
Fault Output High Leakage Current
Fault Delay Time
IFT-LC
tFT-DEL
TFT
μA
μs
°C
°C
VFT=14V
20
40
160
-10
Includes output glitch filter
Over Temperature Fault (1)
Over Temperature Fault Hysteresis(1)
TFT-HS
DIFFERENTIAL AMPLIFIER AND COMPARATORS
Common Mode Input Voltage
Differential Operating Input Voltage
SP Input Bias Current
VCM
VSP-SN
ISP
-0.1
-50
-50
5.5
V
SP to GND & SN to GND
SP-SN
125
mV
μA
μA
V
-37
3.5
SP=SN=1.25V
SP=SN=1.25V
SP=0V
SN Input Bias Current
ISN
8
5.5
-2
5
SN Voltage
VSN
Reverse Comparator Threshold
Reverse Comparator Hysteresis
VRVS-TH
VRVS-HS
tRVS-MS
-10
2
-6
mV
mV
VCM = 3.3V
VCM = 3.3V
V
SP-SN = -50mV step, VBK=0
(minimum blanking)
SP-SN = -50mV step, VBK= VVC
Reverse to Slave Low Delay Time
Reverse to Slave Low Delay Time
160
200
600
ns
ns
V
tRVS-SL
VFWD-TH
VFWD-HS
VOC-TH
430
6
(maximum blanking)
Forward Comparator Threshold
Forward Comparator Hysteresis
2
9
mV
mV
VCM = 3.3V
-5
-2
VCM = 3.3V
VCM = 3.3V
Forward Over Current Comparator
Threshold
Forward Over Current Comparator
Hysteresis
60
-8
66
70
-4
mV
mV
VOC-HS
VCM = 3.3V
SLAVE
VSL = 1V, Normal Operating
Conditions, No Faults
Normal Operating Conditions,
No Faults
Slave Source Current
ISL
-60
4.3
-25
5.5
μA
Slave Output Voltage High
VSL-Hi
V
Slave Output Voltage Low
Slave Hold-off Voltage at VC UVLO
Slave Threshold
VSL-Lo
VSL-UV
VSL-TH
tSL-FL
0.2
0.7
0.5
1
V
V
ISL=4mA
ISL=5μA,1.5V<VC<3.5V
1.75
15
2
V
Slave Fall Time
Slave Low to FET Turn Off Delay (1)
Time Master Mode
Slave Low to FET Turn Off Delay (1)
25
ns
VBK=0
VBK=0
tG-SL
tG-SL
20
30
ns
ns
100
130
VBK=VC
Time Slave Mode
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 4 of 21
Electrical Specifications
Unless otherwise specified: -40°C < TJ < 125°C, VC =12V, CVc = 1uF, CSL = 10pF
Parameter
Symbol Min
Typ
Max
Units
Conditions
BLANK
Blank Source Current
IBK
VBK
-60
1.2
-45
0.77
1.45
-30
0.9
1.7
μA
V
VBK=0V
IBK=5μA Connected to GND
Blank Output Voltage
Blank Slave Mode Threshold
VBK-TH
V
Note 1: These parameters are not production tested but are guaranteed by design, characterization and
correlation with statistical process control.
Note 2: Current sourced by a pin is reported with a negative sign.
Note 3: Thermal resistance characterized on PI2121-EVAL1 evaluation board with 0 LFM airflow.
Note 4: Refer to the Auxiliary Power Supply section in the Application Information for details on the VC
requirement to fully enhance the internal MOSFET.
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 5 of 21
Functional Description:
The PI2121 integrated Cool-ORing product takes
advantage of two different technologies combining a
1.5mΩ on-state resistance (Rds(on)) single N-
channel MOSFET with high density control circuitry.
This combination provides superior density,
minimizing PCB space to achieve an ideal ORing
diode function, significantly reducing power
dissipation and eliminating the need for heat sinking,
while minimizing design complexity.
Reverse Comparator: RVS
The reverse comparator is the most critical
comparator. It looks for negative voltage caused by
reverse current. When the SN pin is 6mV higher
than the SP pin, the reverse comparator will enable
the BK current source to charge an internal 2pF
capacitor. The blanking timer provides noise filtering
for typical switching power conversion that might
cause premature reverse current detection. Once
the voltage across the capacitor reaches the timer
threshold voltage (1.25V) the MOSFET will be
turned off. The shortest blanking time is 50ns when
BK is connected to ground. The Blanking time will
be added to the controller delay time. The Electrical
Specifications in the DIFFERENTIAL AMPLIFIER
AND COMPARATOR section for Reverse Fault to
Slave Low Delay Time “tRVS-MS or tRVS-SL” is the
controller delay time plus the blanking time.
The PI2121’s 1.5mΩ on-state resistance MOSFET
used in the conduction path enables a dramatic
reduction in power dissipation versus the
performance of a diode used in conventional ORing
applications due to its high forward voltage drop.
This can allow for the elimination of complex heat
sinking
and
other
thermal
management
requirements. Due to the inherent characteristics of
the integrated MOSFET, while the gate remains
enhanced above the gate threshold voltage it will
allow current to flow in the forward and reverse
direction. Ideal ORing applications do not allow for
reverse current flow, so the integrated controller has
to be capable of very fast and accurate detection of
reverse current caused by input power source
failures, and turn off the gate of the MOSFET as
quickly as possible. Once the gate voltage falls
below the gate threshold, the MOSFET is off and the
body diode will be reverse biased preventing reverse
current flow and subsequent excessive voltage
droop on the redundant bus. During forward over-
current conditions caused by load faults, the
controller maintains gate drive to the MOSFET to
keep power dissipation as low as possible,
otherwise the inherent body diode of the MOSFET
would conduct, which has higher effective forward
drop. Conventional ORing solutions using diodes
offer no protection against forward over-current
conditions. During the forward over-current
condition, the PI2121 will provide an active-low fault
flag to the system via the fault pin. The fault flag is
also issued during the reverse current condition,
light load conditions, VC under-voltage, Input Under-
Voltage and Over-Voltage and Over-Temperature
conditions.
Reverse Blanking Timer: BK
Connecting an external resistor ( BK ) between the
R
BK pin and ground will increase the blanking time as
shown in the following chart.
Where:
RBK ≤ 200KΩ
If BK is connected to VC for slave mode operation,
then the blanking time will be about 320ns typically,
and total delay time will be 430ns.
The reverse comparator has 3mV of hysteresis
referenced to SP-SN.
If the conditions are met for a reverse current fault,
then the active-low fault flag output will also indicate
a fault to the system after the 40µs fault delay time.
Differential Amplifier:
The PI2121 integrates a high-speed, low offset
voltage differential amplifier to sense the difference
between the Sense Positive (SP) pin voltage and
Sense Negative (SN) pin voltage with high accuracy.
The amplifier output is connected to three
comparators:
Reverse
comparator,
Forward
comparator, and Forward over-current comparator.
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 6 of 21
Forward Voltage Comparator: FWD
condition when VC is lower than the VC Under-
Voltage Threshold
The FWD comparator detects when a forward
current condition exists and SP is 6mV positive with
respect to SN. When SP-SN is less than 6mV, the
FWD comparator will assert the Fault flag to report a
fault condition indicative of a light load “load not
present” condition or possible shorted MOSFET.
UV:
The Under-Voltage (UV) input trip point can be
programmed through an external resistor divider to
monitor the input voltage. The UV comparator
initiates a fault condition and pulls the FT pin low,
when UV falls below the Under-Voltage Falling
Threshold. If the PI2121 is configured in a floating
application, where the GND pin is connected to the
input voltage, the UV pin cannot detect the input
voltage. In this case, the UV pin should be disabled
by connecting it to the VC pin.
Forward Over Current Comparator: FOC
The FOC comparator indicates an excessive forward
current condition when SP is 66mV (typical) higher
than SN. When the FET is in the on-state and SP-
SN is higher than 66mV (typical) the PI2121 will
initiate a fault condition via the FT pin.
OV:
Slave:
The Over-Voltage (OV) input trip point can be
programmed through an external resistor divider to
monitor the input voltage. The OV comparator
In high current applications that exceed the single
PI2121 current handling capability, multiple PI2121’s
can be paralleled and synchronized by using the
slave function.
initiates a fault condition and pulls the FT pin low
when OV rises above the Over-Voltage Rising
Threshold. If the PI2121 is configured in a floating
application, where the GND pin is connected to the
input voltage, the OV pin cannot detect the input
voltage. In this case, the OV pin should be disabled
by connecting it to the controller GND pin.
The Slave function synchronizes multiple PI2121’s
together and allows for localized control of each
paralleled MOSFET. One PI2121 will be designated
as the master and it will control the response of the
slaved PI2121’s.
When the PI2121 is configured in the “Master Mode”
Over-Temperature Detection:
by connecting the BK to ground, the
output having the same signal characteristics as the
internal Gate Driver. In this configuration, the
will be an
SL
The internal Over-Temperature block monitors the
junction temperature of the controller. The over-
temperature threshold is set to 160°C with -10°C of
hysteresis.
When the controller temperature
output is capable of driving up to ten PI2121’s,
SL
configured in “Slave Mode”, through their
corresponding pins. Logic high for the pin is
exceeds this threshold, the over-temperature circuit
initiates a fault condition and pulls the
pin low.
FT
SL
limited to 5.5V (max).
SL
Fault:
The fault circuit output is an open collector with 40μs
When the BK pin is tied to VC, the PI2121 becomes
a slave and the pin will be an input. The
internal Gate driver section and reverse current
section are the only active circuits in the slaved
PI2121 while the master performs the diagnostics
and gate drive control.
delay to prevent any false triggering. The pin
FT
SL
will be pulled low when any of the following faults
occur:
•
•
•
•
•
•
•
Reverse Current
Forward Over-Current
Forward Low Current
Over-Temperature
Input Under-Voltage
Input Over-Voltage
VC pin Under-Voltage
VC and Internal Voltage Regulator:
The PI2121 has a separate input (VC) that provides
power to the control circuitry and the internal gate
driver. An internal regulator clamps the VC voltage
to 15.5V.
A gate voltage detector prevents FOC or FWD from
initiating a fault when the MOSFET is in an OFF
condition.
For high side applications, the VC input should be
5V above the bus voltage to properly enhance the
internal N-channel MOSFET.
The only fault condition that initiates gate turn-off of
the MOSFET (as well as a fault flag signal) is when
the reverse current fault conditions are met. All other
fault conditions issue only a fault flag signal via the
The internal regulator circuit has a comparator to
monitor the VC voltage and initiates a FAULT
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 7 of 21
reported to a Host to signal that some system level
maintenance may be required.
pin, but do not affect the gate of the MOSFET.
FT
The
pin serves as an indicator that a fault
FT
condition may be present. This information can be
Figure 3: PI2121 Internal Block Diagram
Figure 4: Comparator hysteresis, values are for reference only, please refer to the electrical specifications.
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 8 of 21
Figure 5: Timing diagram for two PI2121 solutions in an Active ORing application
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PI2121
Rev. 1.0 Page 9 of 21
Figure 6: PI2121 State diagram, master mode.
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 10 of 21
Typical Characteristics:
Figure 8: Reverse comparator threshold vs. temperature.
VCM: Common Mode Voltage.
Figure 7: Reverse Condition internal MOSFET Turn off
delay time vs. temperature.
Figure 9: Controller bias current vs. temperature.
Figure 10: Internal MOSFET drain to source breakdown
voltage vs. temperature.
Figure 11: Internal MOSFET on-state resistance vs.
Figure 12: Internal MOSFET source to drain diode
forward voltage (pulsed ≤300µs).
temperature.
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 11 of 21
Thermal Characteristics:
Figure 13: Junction Temperature vs. Input Current
Figure 14: Junction Temperature vs. Input Current
(0LFM)
(200LFM)
Figure 16: PI2121 mounted on PI2121-EVAL1
Figure 15: PI2121 mounted on PI2121-EVAL1
Thermal Image picture, Iout=24A, TA=25°C,
Air Flow=200LFM
Thermal Image picture, Iout=24A, TA=25°C,
Air Flow=0LFM
Figure 17: PI2121 input current de-rating based on maximum TJ=150°C vs. ambient temperature
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 12 of 21
Figure 18: Plot of PI2121 response time to reverse current detection (Example 1, Figure 22)
Application Information
The PI2121 is designed to replace ORing diodes in
high current, low voltage redundant power
architectures. Replacing a traditional diode with a
PI2121 will result in significant power dissipation
reduction as well as board space reduction,
efficiency improvement and additional protection
Blanking Timer:
Connect the blanking timer pin (BK) to GND to
program the device for the fastest reverse
comparator response time of 160ns typical. To
increase the blanking time, connect the BK pin to
GND via a resistor to avoid the fault response to
short reverse current pulses. Refer to the plot in the
reverse comparator functional description for resistor
values versus the reverse blanking time.
features.
This section describes in detail the
procedure to follow when designing with the PI2121
Active ORing solution. Two Active ORing design
examples are presented.
Auxiliary Power Supply (Vaux):
Fault Indication:
Vaux is an independent power source required to
supply power to the VC input. The Vaux voltage
should be 5V higher than Vin (redundant power
source output voltage) to fully enhance the internal
MOSFET.
The
output pin is an open collector and should
FT
be pulled up to the logic voltage or to the controller
VC via a resistor (10KΩ).
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 13 of 21
A bias resistor (Rbias) is required if Vaux is higher
than 15V. Rbias should be connected between the
VC pin and Vaux.
source. At the same time the energy stored at the
drain side of the internal MOSFET will be released
and produce a voltage higher than the load voltage.
This event will create a high voltage difference
between the drain and source of the MOSFET. To
reduce the magnitude of the ringing voltage, add a
ceramic capacitor very close to the source that can
react to the voltage ringing frequency and another
capacitor close to the drain. Recommended values
for the ceramic capacitors are 1µF, refer to C5 and
C7 in Figure 24.
Minimize the resistor value for low Vaux voltage
levels to avoid a voltage drop that may reduce the
VC voltage lower than required to drive the gate of
the internal MOSFET.
Select the value of Rbias using the following
equations:
Vauxmin −VCclamp
Rbias =
Slave:
ICmax
For a high current application where one PI2121 can
not handle the total load current, multiple PI2121’s
can be paralleled in a master / slave configuration to
support the total current per input. In the Master /
Slave mode, one PI2121 is configured as the master
and the rest are configured as slaves. The slave
Rbias maximum power dissipation:
2
(Vauxmax −VCclamp
)
PdRbias
Where:
=
Rbias
Vauxmin : Vaux minimum voltage
Vauxmax : Vaux maximum voltage
VCClamp : Controller clamp voltage, 15.5V
(
) pin of the master unit will act as an output
SL
driving the units configured in slave mode. The
SL
pins of the slave units will act as inputs under the
control of the master.
ICmax : Controller maximum bias current, use
Tie the BK pin to VC to configure the unit in slave
mode.
4.2mA
Example: Vaux 20V to 30V
Power dissipation:
In Active ORing circuits the MOSFET is always on in
steady state operation and the power dissipation is
derived from the total source current and the on-
state resistance of the internal MOSFET.
Vauxmin −VCclamp
20V −15.5V
4.2mA
Rbias =
=
=1.07KΩ
ICmax
2
(30V −15.5V)2
(Vauxmax −VCclamp
)
PdRbias
=
=
=196mW
The PI2121 internal MOSFET power dissipation can
be calculated with the following equation:
Rbias
1.07KΩ
PdMOSFET = Is2 ∗Rds(on)
Where:
Internal N-Channel MOSFET BVdss:
The PI2121’s internal N-Channel MOSFET
breakdown voltage (BVdss) is rated for 8V at 25°C
and will degrade at -40°C to 7.75V, refer to Figure
10. In an application when the MOSFET is turned
off due to a reverse fault, the series parasitic
elements in the circuit may contribute to the
MOSFET being exposed to a voltage higher than its
voltage rating.
Is
: Source Current
Rds(on) : MOSFET on-state resistance
Note:
Calculate with Rds(on) at maximum MOSFET
temperature because Rds(on) is temperature
dependent. Refer to figure 11 for normalized
Rds(on) values over temperature. PI2121 nominal
Rds(on) at 25°C is 1.5mΩ and will increase by 40%
at 125°C junction temperature.
In Active ORing applications when one of the input
power sources is shorted, a large reverse current is
sourced from the circuit output through the
MOSFET. Depending on the output impedance of
the system, the reverse current may reach over 60A
in some conditions before the MOSFET is turned off.
Such high current conditions will store energy even
in a small parasitic element. For example: a 1nH
parasitic inductance with 60A reverse current will
generate 1.8µJ (½Li2). When the MOSFET is turned
off, the stored energy will be released and produce a
high negative voltage ringing at the MOSFET
The Junction Temperature rise is a function of power
dissipation and thermal resistance.
Trise= Rth ∗PdMOSFET = Rth ∗Is2 ∗Rds(on),
JA
JA
Where:
RthJA : Junction-to-Ambient thermal resistance
(54°C/Watt)(3)
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 14 of 21
Where:
This may require iteration to get to the final junction
temperature. Figures 13, 14, and 17 show the
PI2121 internal MOSFET final junction temperature
curves versus conducted current at given ambient
temperatures and air flow.
: UV threshold voltage at Vin.
: OV threshold voltage at Vin.
: UV voltage set
V(UVTH )
V(OVTH )
V (UV )
IRa
:
current.
Ra
OV/UV resistor selection:
Alternatively,
a
two-resistor voltage divider
The UV and OV comparator inputs are used to
monitor the input voltage and will indicate a fault
condition when this voltage is out of range. The UV
& OV pins can be configured in two different ways,
either with a divider on each pin, or with a three-
resistor divider to the same node, enabling the
elimination of one resistor. Under-voltage is
monitored by the UV pin input and over-voltage is
monitored with the OV pin input.
configuration can be used and is shown in (Figure
20).
The UV resistor voltage divider can be obtained from
the following equations:
V (UVTH )
R1UV
=
IRUV
Set R1UV value based on system allowable current
IRUV ≥100μA
The Fault pin (
) will indicate a fault (active low)
FT
when the UV pin is below the threshold or when the
OV pin is above the threshold. The threshold is
0.50V typical with 25mV hysteresis and the input
current is less than ±1µA. It is important to consider
the maximum current that will flow in the resistor
divider and maximum error due to UV and OV input
current. Set the resistor current to 100µA or higher
to maintain better than 1% accuracy for UV and OV
due to the bias current.
⎛
⎞
V (UV )
⎜
⎜
⎟
⎟
R2UV = R1UV
−1
V (UVTH )
⎝
⎠
Where:
V (UVTH )
: UV threshold voltage
:
current
R1UV
IRUV
V (UVTH )
R1UV
=
IRUV
The three-resistor voltage divider configuration for
both UV and OV to monitor the same voltage node
is shown in Figure 19:
Set R1OV value based on system allowable current
IRUV ≥100μA
⎛
⎞
V (OV )
V (OVTH
⎜
⎜
⎟
⎟
R2OV = R1OV
−1
)
⎝
⎠
Where:
: OV threshold voltage
)
V (OVTH
:
current
R1OV
IROV
Figure 19: UV & OV three-resistor divider
configuration
V (OVTH )
Ra =
IRa
Set Ra value based on system allowable current
IRa
⎛
⎞
V (OV )
V (UV )
Figure 20: UV & OV two-resistor divider
⎜
⎜
⎟
⎟
Rb = Ra
−1
configuration
⎝
⎠
⎛
⎜
⎞
V (UV )
⎟
⎟
Rc =
(
Ra + Rb
)
−1
⎜
V (UVTH )
⎝
⎠
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 15 of 21
Typical Application Example 1:
Rds(on) is 2.0mΩ maximum at 25°C and will
increase as the Junction temperature increases.
From Figure 11, at 118°C Rds(on) will increase by
~35%, then
Requirement:
Redundant Bus Voltage = 3.3V
Load Current = 20A (assume through each
redundant path)
Maximum Ambient Temperature = 60°C, no air flow
Auxiliary Voltage = 12V (10V to 14V)
maximum at 118°C
Rds(on) = 2.0mΩ∗1.35= 2.7mΩ
Maximum power dissipation is:
Pdmax = Iin2 ∗Rds(on) = (20A)2 ∗2.7mΩ =1.08W
Solution:
A single PI2121 for each redundant 3.3V power
source should be used, configured as shown in the
circuit schematic in Figure 22.
Recalculate TJ:
54°C
⎛
⎞
⎠
T
= 60°C +
∗(20A)2 ∗2.7mΩ =118.3°C
⎜
⎟
J max
W
⎝
Vaux:
Since the Vaux voltage does not exceed the VC pin
clamp voltage, connect the Vaux directly to the VC
pin
SP and SN pins:
Connect each SP pin to the S pins and each SN pin
to the D pins
BK pin:
Connect the BK pin to ground to achieve the
minimum reverse current response time.
SL pin: Not required, so leave floating
pin:
FT
Connect to the logic input and to the logic power
supply via a 10KΩ resistor.
Program UV and OV to monitor input voltage:
Program UV at 3.0V and OV at 3.6V
Use the three-resistor divider configuration:
Figure 21: Example 1 final junction temperature at
20A/60°C TA
IRa = 200μA
Reverse Current Threshold:
500mV
The following procedure demonstrates how to
calculate the minimum required reverse current in
the internal MOSFET to generate a reverse fault
condition and turn off the internal MOSFET.
or 2.49kΩ 1%
Ra =
= 2.5kΩ
3.6V
200μA
⎛
⎜
⎞
⎠
or 499Ω 1%
Rb = 2.49kΩ
−1 = 498Ω
⎟
3.0V
⎝
At room temperature (25°C) typical Rds(on):
3.0V
⎛
⎝
⎞
⎠
Rc =
(
2.49kΩ + 499Ω
)
−1 =14.95kΩ
⎜
⎟
500mV
Vth.reverse − 6mV
Is.reverse =
=
= −4A
or 15kΩ 1%
Rds(on)
1.5mΩ
Power Dissipation and Junction Temperature:
First use Figure 13 (Junction Temperature vs. Input
Current) to find the final junction temperature for 20A
load current at 60°C ambient temperature. In Figure
13 (illustrated in Figure 21) draw a vertical line from
20A to intersect the 60°C ambient temperature line.
At the intersection draw a horizontal line towards the
Y-axis (Junction Temperature). The Junction
Temperature at full load current (20A) and 60°C
ambient is 118°C.
At maximum junction temperature (118°C) and
maximum Rds(on):
Vth.reverse − 6mV
Is.reverse =
=
= −2.2A
Rds(on)
2.7mΩ
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 16 of 21
Typical Application Example 2:
Requirement:
Redundant Bus Voltage = 1.2V
Load Current = 100A (assume through each
redundant path)
Auxiliary Voltage = 12V
Solution:
Five PI2121’s for each redundant 1.2V power source
should be used, configured in a master / slave
configuration as shown in the circuit schematic in
Figure 23.
Vaux: Since the Vaux voltage does not exceed the
VC pin clamp voltage, connect the Vaux directly to
each PI2121 VC pin.
SP and SN pins: For each specific PI2121, connect
each SP pin to the respective S pins and each SN
pin to the respective D pins. The master unit will
perform the sensing function.
BK pin: Connect the Master PI2121 BK pin directly
to ground to achieve the minimum reverse current
response time, and connect the BK pin of the slaved
PI2121’s to the respective local VC pin.
Figure 22: Two PI2121 in High Side ORing
configuration
SL pin: For each set of parallel PI2121’s connect
the SL pins together.
pin: Connect the
pin of the Master PI2121
FT
FT
to a logic input and to the logic power supply via a
10KΩ resistor.
Program UV and OV of the Master PI2121 to
monitor Input Voltage:
Program UV at 1.1V and OV at 1.3V
Use the three-resistor divider configuration:
IRa = 200μA
500mV
or 2.49kΩ 1%
Ra =
= 2.5kΩ
200μA
1.3V
1.1V
⎛
⎝
⎞
⎠
or 453Ω 1%
Rb = 2.49kΩ
−1 = 452Ω
⎜
⎟
1.1V
⎛
⎝
⎞
⎠
Rc =
(
2.49kΩ + 453Ω
)
−1 = 3.53.kΩ
⎜
⎟
500mV
or 3.57kΩ 1%
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 17 of 21
Figure 23: PI2121 used in a 100A Active ORing application (master/slave configuration)
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 18 of 21
Layout Recommendation:
Use the following general guidelines when designing
printed circuit boards. An example of the typical
land pattern for the PI2121 is shown in Figure 24:
will produce a high voltage across the MOSFET.
If it is not possible to connect the power source
and S pins with a very short trace or common
point, connect a capacitor (shown as C5 in
figure 24), recommended value 1µF, close to the
S pins and return (ground). Also for the same
reason use C7 in figure 24 at the output.
•
Make sure to have a solid ground (return) plane
to reduce circuit parasitic.
•
Connect all S pads together with a wide trace to
reduce trace parasitics to accommodate the high
current input, and also connect all D pads
together with a wide trace to accommodate the
high current output.
•
•
Connect the SP pin to the S pins and connect
the SN pin to D pins as shown in Figure 24.
Use 1oz of copper or thicker if possible to
reduce trace resistance and reduce power
dissipation.
•
The VC bypass capacitor should be located as
close as possible to the VC and GND pins.
Place the PI2121 and bypass capacitor on the
same layer of the board. The VC pin and CVC
(shown as C2 in Figure 24) PCB trace should
not contain any vias or connect to the ground
plane close to the GND pin.
•
Keep the power source very close to the S input
pins, any parasitic in the trace connecting the
power source and S pins will have inductive kick
back when there is high current flow in the trace
and the MOSFET turns off due to reverse
current fault conditions. The inductive kick back
Figure 24: PI2121 layout recommendation
Figure 25: PI2121 Mounted on PI2121-EVAL1
Please visit www.picorpower.com for information on PI2121-EVAL1
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 19 of 21
Package Drawing
Thermal Resistance Ratings
Parameter
Symbol
θJA
Typical
Max
-
Unit
°C/W
°C/W
Junction-to-Ambient (3)
54
Junction-to-PCB
14
-
θJC
Note 3: Thermal resistance characterized on PI2121-EVAL1 evaluation board with 0 LFM airflow.
Ordering Information
Part Number
Package
Transport Media
PI2121-00-LGIZ
5x7mm 17-pin LGA
Tape & Reel
Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 20 of 21
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when in normal use and service. This warranty does not extend to products subjected to misuse, accident, or
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EXCEPT FOR THE FOREGOING EXPRESS WARRANTY, VICOR MAKES NO WARRANTY, EXPRESS OR
LIMITED, INCLUDING, BUT NOT LIMITED TO, THE WARRANTY OF MERCHANTABILITY OR FITNESS FOR A
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Information published by Vicor has been carefully checked and is believed to be accurate; however, no
responsibility is assumed for inaccuracies. Vicor reserves the right to make changes to any products without
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Information furnished by Vicor is believed to be accurate and reliable. However, no responsibility is assumed by
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Specifications are subject to change without notice.
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25 Frontage Road
Andover, MA 01810
USA
Picor Corporation
51 Industrial Drive
North Smithfield, RI 02896
USA
Customer Service: custserv@vicorpower.com
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Tel: 800-735-6200
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Picor Corporation • picorpower.com
PI2121
Rev. 1.0 Page 21 of 21
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