UC3849BG-D08-T [UTC]
LOW COST POWER-SAVING MODE PWM CONTROLLER;型号: | UC3849BG-D08-T |
厂家: | Unisonic Technologies |
描述: | LOW COST POWER-SAVING MODE PWM CONTROLLER 开关 |
文件: | 总10页 (文件大小:304K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
UC3849B
LINEAR INTEGRATED CIRCUIT
LOW COST POWER-SAVING
MODE PWM CONTROLLER
FOR FLYBACK CONVERTERS
DESCRIPTION
The UC3849B is a high performance current mode PWM
controller ideally suited for low standby power. Low VDD startup
current make the power reliable on startup design and a large
value resistor could be used in the startup circuit to minimize the
standby power. At no load condition, the IC operates in
power-saving mode for lower standby power, decreasing frequency
for Higher conversion efficiency at light load condition.
The UC3849B contains protection with automatic recovery
including OLP (over load protection), programming OTP (over
temperature protection), OVP (over voltage protection), UVLO (VDD over voltage clamp and under voltage
lockout).To protect the power MOSFET, Gate-drive output is fixed up to 16V max. The UC3849B contains protection
OCP (cycle-by-cycle current limiting).
The internal slope compensation improves system stability at high PWM duty cycle output. Leading-edge
blanking on current sense input removes the signal glitch, which offering minimal external component count in the
design. Excellent EMI performance is achieved with UTC proprietary frequency hopping technique
(ZL201020615247.1) together with soft driver control. Audio noise is eliminated due to switch frequency more than
20kHz during operation.
The UC3849B has such applications as: battery charger, power adaptor, set-top box power supplies, ink jet
printers, open-frame SMPS.
FEATURES
* UTC proprietary frequency hopping technology for Improved EMI * Programming OTP for higher security
performance.
* Fixed switch frequency 65kHz
* Gate output voltage clamped at 15V
* Low start-up current
* Power-saving mode for high light-load and standby efficiency
* Soft Start
* Dynamic peak current limiting for constant output power
* Built-in synchronized slope compensation
* OLP,OVP and VDD clamp for higher security
* Cycle-by-cycle Current Limiting
* Under voltage lockout (UVLO)
* Few external components required
ORDERING INFORMATION
Ordering Number
Package
Packing
Lead Free
Halogen Free
UC3849BL-D08-T
UC3849BL-S08-R
UC3849BG-D08-T
UC3849BG-S08-R
DIP-8
Tube
SOP-8
Tape Reel
UC3849BG-D08-T
(1) R: Tape Reel, T: Tube
(2) D08: DIP-8, S08: SOP-8
(1)Packing Type
(2)Package Type
(3)Green Package
(3) G: Halogen Free and Lead Free, L: Lead Free
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Copyright © 2017 Unisonic Technologies Co., Ltd
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UC3849B
LINEAR INTEGRATED CIRCUIT
MARKING
DIP-8
SOP-8
PIN CONFIGURATION
GND
FB
GATE
1
2
8
7
VDD
3
4
6
5
VIN
SENSE
RT
NC
PIN DESCRIPTION
PIN NO.
1
PIN NAME PIN TYPE
DESCRIPTION
GND
P
Ground.
Feedback input pin. The PWM duty cycle is determined by voltage level
into this pin and SENSE pin input.
2
FB
I
3
4
5
VIN
NC
RT
I
Connected through a start up resistor to line voltage for VCC ON
I
I
Connected through a NTC resistor to GND for OTP.
Current sense input pin. Connected to MOSFET current sensing resistor
node.
6
SENSE
7
8
VDD
P
Power supply.
GATE
O
The totem-pole output driver for driving the power MOSFET.
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LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
VIN
3
VDD
7
Frequency
Hopping
Oscillator
UVLO
Reference Voltage
Driver
OVP
8
GATE
Latch
Logic
Control
Q
S
Burstmode
Q
R
5
2
RT
OTP
FB
PWM COMP
OCP
Slope Compensation
Constant Power Limit
6
SENSE
NC
4
LEB
1
GND
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LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS (TA=25°C, VDD=15V, unless otherwise specified)
PARAMETER
SYMBOL
VDD
RATINGS
36
UNIT
V
Supply Voltage
Input Voltage to FB Pin
Input Voltage to CS Pin
Junction Temperature
Operating Temperature
Storage Temperature
VFB
-0.3~7
V
VSENSE
TJ
-0.3~7
V
+150
C
°C
C
TOPR
TSTG
-40~+125
-50~+150
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
OPERATING RANGE
PARAMETER
SYMBOL
VDD
RATINGS
9~24
UNIT
V
Supply Voltage
ELECTRICAL CHARACTERISTICS (TA=25°C, VDD=15V,unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
SUPPLY SECTION
Start Up Current
ISTR
IOP
VCLAMP
VDD =VDD(ON)-0.5V
VFB=3.5V
2
15
1.8
36
μA
mA
V
IC Operating Current
0.8
34
VCC Zener Clamp Voltage
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold Voltage
Min. Operating Voltage
CONTROL SECTION
IVCC=10mA
32
VTHD(ON)
VDD(MIN)
16.5
6
18
7
20
8
V
V
VFB Open Loop Voltage Level
PWM Input Gain
VFB-OPEN
AVCS
VFB(OUT)
VFB(IN)
4.9
5.4
3
V
V/V
V
∆VFB/∆VCS
Burst-Mode Out FB Voltage
Burst-Mode Enter FB Voltage
VSENSE =0
1.5
1.35
65
VSENSE =0
V
Normal
Switch Frequency
VFB=3.5V
60
20
70
-9
70
KHz
KHz
%
FSW
Power-Saving
Before enter burst mode
VFB=3.5V, VSENSE=0
Duty Cycle
DMAX
FJ(SW)
FDV
78
90
+9
10
10
Frequency Hopping
%
Frequency VDD Stability
VDD=12V~20V
T=-20~100°C
%
Frequency Temperature Stability
Feedback Short Current
FDT
%
IFB
240
μA
PROTECTION SECTION
VCC Over Voltage Protection Threshold
FB PIN Over Load Protection Threshold
Over Load Protection Delay-Time
Soft Start Time
VOVP
VOLP
TDelay
TSS
VFB=4.2V
25
60
27
4.2
88
5
29
V
V
120
mS
mS
CURRENT LIMITING SECTION
Peak Current Flat Threshold Voltage
Peak Current Valley Threshold Voltage
Lead Edge Blanking Time
DRIVER OUTPUT SECTION
Output Voltage Low State
Output Voltage High State
Output Voltage Rise Time
Output Voltage Fall Time
RT SECTION
VCS-F
VCS-V
TLEB
VFB=4.2V, Duty≥60%
0.92
V
V
VFB=4.2V, Duty=0%
0.60 0.65 0.70
200
350
550
ns
VOL
VOH
tR
VDD=16V,IO=-20mA
VDD=16V,IO=20mA
CL=1.0nF
1
V
V
11
150
60
ns
ns
tF
CL=1.0nF
Output Current of RT pin
Threshold Voltage for OTP
IRT
93
100
107
μA
VTH_OTP
0.98 1.04 1.10
V
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LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION
The UC3849B devices integrate many useful designs into one controller for low-power switch-mode power
supplies. The following descriptions highlight some of the features of the UC3849B series.
Start-up Current
The start-up current is only 2.5μA. Low start-up current allows a start-up resistor with a high resistance and a
low-wattage to supply the start-up power for the controller. For AC/DC adaptor with universal input range design, a
2.5~3MΩ, 1/8W startup resistor could be used together with a VDD capacitor to provide a fast startup and low power
dissipation solution.
Power-Saving Mode Operation
The proprietary Power-Saving Mode function provides linearly decreasing the switching frequency under
light-load conditions for higher efficiency. The feedback voltage, which is sampled from the voltage feedback loop, is
taken as the reference. Once the feedback voltage dropped below the threshold voltage, the switching frequency
starts to decrease. This Power-Saving Mode function dramatically reduces power consumption under light-load
conditions. The 20KHz minimum frequency control also eliminates the audio noise at any loading conditions.
At zero load condition, the magnitude of power loss is in proportion to the number of switching events within a
fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the
energy. The UC3849B enter burst mode at standby condition to minimize the switching loss and reduces the
standby power consumption. Power supplies using the UC3849B can easily meet even the strictest regulations
regarding standby power consumption.
Switch Frequency Set
The maximum switch frequency is fixed to 65KHz. Switch frequency is modulated by output power POUT during IC
operating. At no load or light load condition, most of the power dissipation in a switching mode power supply is from
switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The
magnitude of power loss is in proportion to the number of switching events within a fixed period of time. So lower
switch frequency at lower load, which more and more improve IC’s efficiency at light load. At from no load to light
load condition, The IC will operate at from Burst mode to Reducing Frequency Mode. The relation curve between fSW
and POUT/POUT (MAX) as followed Fig.1.
Fig.1 The relation curve between fSW and relative output power POUT/ POUT (MAX)
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LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION (Cont.)
Frequency Hopping For EMI Improvement
The Frequency hopping is implemented in the IC; there are two oscillators built-in the IC. The first oscillator is to
set the normal switching frequency; the switching frequency is modulated with a period signal generated by the 2nd
oscillator. The relation between the first oscillator and the 2nd oscillator as followed Fig.2. So the tone energy is
evenly spread out, the spread spectrum minimizes the conduction band EMI and therefore eases the system design
in meeting stringent EMI requirement.
Fig.2 Frequency Hopping
Built-in Slope Compensation
Built-in slope compensation circuit greatly improves the close loop stability at CCM and prevents the
sub-harmonic oscillation.
Leading-Edge Blanking
Each time the power MOSFET is switched on, a turn-on spike will inevitably occur at the sense-resistor. To avoid
premature termination of the switching pulse, a 400ns leading-edge blanking time is built in. Conventional RC
filtering can therefore be omitted. During this blanking period, the current-limit comparator is disabled and it cannot
switch off the gate driver.
Constant Output Power Limit
When the SENSE voltage, across the sense resistor RS, reaches the threshold voltage, around 0.8V, the output
GATE drive will be turned off after a small propagation delay tD. This propagation delay will introduce an additional
current proportional to tD×VIN/Lp. Since the propagation delay is nearly constant regardless of the input line voltage
VIN. Higher input line voltage will result in a larger additional current and hence the output power limit is also higher
than that under low input line voltage. To compensate this variation for wide AC input range, the threshold voltage is
adjusted by the VIN current. Since VIN pin is connected to the rectified input line voltage through a resistor RVIN, a
higher line voltage will generate higher VIN current into the VIN pin. The threshold voltage is decreased if the VIN
current is increased. Smaller threshold voltage, forces the output GATE drive to terminate earlier, thus reduce the
total PWM turn-on time and make the output power equal to that of low line input. This proprietary internal
compensation ensures a constant output power limit for wide AC input voltage from 90VAC to 264VAC.
Under Voltage Lockout (UVLO)
The turn-on and turn-off thresholds of the UC3849B are fixed internally at VTHD(ON)/VDD(MIN) During start-up, the
hold-up capacitor must be charged to VTHD(ON) through the start-up resistor, so that the UC3849B will be enabled.
The hold-up capacitor will continue to supply VDD until power can be delivered from the auxiliary winding of the main
transformer. VDD must not drop below VDD(MIN) during this start-up process. This UVLO hysteresis window ensures
that hold-up capacitor will be adequate to supply VDD during start-up.
Gate Output
The UC3849B output stage is a fast totem pole gate driver. Cross conduction has been avoided to minimize heat
dissipation, increase efficiency, and enhance reliability. A good tradeoff is achieved through dead time control. The
low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 15V
clamp is added for MOSFET gate protection at higher than expected VDD input.
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UC3849B
LINEAR INTEGRATED CIRCUIT
OPERATION DESCRIPTION (Cont.)
Protection Controls
The IC takes on more protection functions such as OVP, OLP and OTP etc. In case of those failure modes for
continual blanking time, the driver is shut down. Driver is reset after failure is eliminated.
OVP
The OVP will shut down the switching of the power MOSFET whenever VDD >VOVP. The OVP event as followed
Fig.3.
Fig.3 OVP case
Fig.4 OLP case
OLP
OLP will shut down driver when VFB> VOLP for continual a blanking time. The OLP event as followed Fig.4.
OTP
OTP will shut down driver when the NTC resistor temperature TJ>T (THR)
.
PCB Layout Note
Noise from the current sense or the control signal can cause significant pulse width jitter in
continuous-conduction mode, and slope compensation helps alleviate these problems. Good placement and layout
practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter
components near the UC3849B, and increasing the power MOS gate resistance is advised.
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UC3849B
LINEAR INTEGRATED CIRCUIT
REFRENCE CIRCUIT (19.5V / 2.05A)
BOM
Reference
BD1
C1
Component
2A_600V
Reference
Component
R 1.5MΩ
R 47kΩ
R6, R23
R7, R8
R13
R15
CC 10NF/1KV
C2
ELC 82μF/400V, 105C, ±20%
CC 1000pF/1KV
R 4.7Ω
C3
R 10Ω
C6
CC 1nF/50V
R16
R17
R18
R 47Ω
C10
C7,C46
C11
C41, C43
C45
CX1
CY1
C40
D4
ELC 10μF/50V, 105C, ±20%
CC 0.1μF/50V
R 10kΩ
R 1kΩ
CC 68pF/50V
R20, R21
R22
R40
R 1.5Ω
ELC 680uF/25V, 105C, ±20%
CC 10NF/50V
R 2.7Ω
R 47Ω
X-CAP 0.33μF/275VAC
Y-CAP 1000pF/400V
CC 100pF/1KV, SMD1206
1N4148 0.15A/75V
1N4007 1.0A/1000V
BAV20WG 1A/200V
Schottky 20A/100V
Fuse 2.0A / 250V
R41
R 820Ω
R 2.2kΩ
R 680Ω
R 68kΩ
R42
R43
R45
R46
T1
D1
R 10kΩ
D3
RM-8
D5
U1
IC UTC UC3849B
LTV-357-T-C
TL431
F1
U3
LF1, LF2
Q1
choke
U4
10N65 10A/650V
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UC3849B
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
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UC3849B
LINEAR INTEGRATED CIRCUIT
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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