U74HCT595_15 [UTC]
8-BIT SHIFT REGISTERS;
| 型号： | U74HCT595_15 |
| 厂家： | 
Unisonic Technologies |
| 描述： | 8-BIT SHIFT REGISTERS |
| 文件： | 总6页 (文件大小：191K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
U74HCT595
CMOS IC
8-BIT SHIFT REGISTERS WITH
LATCHED 3-STATE OUTPUT
REGISTERS
DESCRIPTION
The UTC 74HCT595 contains an 8-bit register with asynchronous
reset input and an 8-bit latch with output enable input. Data on the
Serial Data Input (SER) will be shift into the internal shift register
during every LOW-to-HIGH transition on the Shift Clock. The latch will
latch the 8-bit data from the shift register during the LOW-to-HIGH
transition on the Latch Clock. The shift register also provides a serial
output.
FEATURES
* Operation Voltage Range:4.5V~5.5V
* High Noise Immunity
* Output Compatibility with CMOS and TTL
* 8-Bit Serial-In,Parallel-Out Shift
* Inputs are TTL voltage compatiable
ORDERING INFORMATION
Ordering Number
Lead Free
Package
Packing
Halogen Free
U74HCT595L-P16-R
U74HCT595L-P16-T
U74HCT595G-P16-R
U74HCT595G-P16-T
TSSOP-16
TSSOP-16
Tape Reel
Tube
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Copyright © 2011 Unisonic Technologies Co., Ltd
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U74HCT595
CMOS IC
PIN CONFIGURATION
VCC
QA
QB
QC
QD
QE
QF
1
2
3
4
5
16
15
14
SER
13
12
11
OE
RCLK
QG
QH
6
SRCLK
7
10
9
SRCLR
8
GND
QH’
FUNCTION TABLE
INPUTS
OE
OUTPUTS
QH’ Qn
FUNCTION
SRCLK
X
RCLK
SER
X
SRCLR
L
A Low-Level on SRCLR only affects the shift
registers.
X
L
L
NC
Empty shift register loaded into storage register.
Shift register clear. Parallel outputs in
high-impedance OFF-state
X
X
↑
L
L
L
X
X
L
L
L
Z
X
H
Logic high level shifted into the first shift register.
Contents of all shift register stages shifted through,
e.g. previous state of stage G(internal QG’) appears
on the serial output(QH’).
↑
X
L
H
H
QG’ NC
Contents of shift register stages (internal Qn’) are
transferred to the storage register and parallel
output stages.
X
↑
↑
L
L
H
H
X
X
NC Qn’
QG’ Qn’
Contents of shift register shifted through. Previous
contents of the shift register is transferred to the
storage register and the parallel output stages.
Note:H : HIGH voltage level.
↑
L
X
Z
: LOW voltage level.
: Don’t care.
: High impedance OFF-state.
NC: No change.
↑
↓
: Low-to-High transition.
: High-to-Low transition.
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U74HCT595
CMOS IC
LOGIC DIAGRAM
SRCLR
SRCLK
R
R
R
R
R
R
R
R
D
D
D
D
D
D
D
D
SER
SRA
Q
SRB
SRC
Q
SRD
Q
SRE
SRF
SRG
SRH
Q
Q
Q
Q
Q
RCLK
D
LRE
Q
D
D
LRG
Q
D
LRH
Q
D
LRA
Q
D
D
D
LRF
Q
LRB
Q
LRC
Q
LRD
Q
QH’
OE
QA
QB
QC
QD
QE
QF
QG
QH
TIMING DIAGRAM
SRCLR
OE
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U74HCT595
CMOS IC
ABSOLUTE MAXIMUM RATING(unless otherwise specified)
PARAMETER
SYMBOL
VCC
RATINGS
-0.5~7.0
-0.5~Vcc+0.5
-0.5~VCC+0.5
±20
UNIT
V
Supply Voltage
Input Voltage
VIN
V
Output Voltage(active mode)
VOUT
IIK
V
Input Clamp Current (ViN<0)
Output Clamp Current (VOUT<0)
Output Current
mA
mA
mA
mA
°C
IOK
±20
IOUT
ICC
±35
VCC or GND Current
±70
Storage Temperature
TSTG
-65 ~ +150
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are
observed.
RECOMMENDED OPERATING COMDITIONS
PARAMETER
SYMBOL
VCC
MIN
4.5
0
TYP
5
MAX
5.5
UNIT
V
Supply Voltage
Input Voltage
Output Voltage
VIN
VCC
VCC
85
V
VOUT
TOPR
tR/tF
0
V
Operating Temperature
-40
°C
ns
Input Transition Rise or Fall Rate
VCC =4.5V
6.0
500
ELECTRICAL CHARACTERISTICS(Ta=25°С, unless otherwise specified)
PARAMETER
SYMBOL
VIH
TEST CONDITIONS
VCC=4.5V~5.5V
MIN
2.0
TYP
1.6
MAX UNIT
V
High-Level input voltage
Low-Lever output voltage
VIL
VCC=4.5V~5.5V
1.2
0.8
V
V
VCC=4.5V, IOH=-20μA
VCC=4.5V, IOH=-6mA
VCC=4.5V, IOL=20μA
VCC=4.5V, IOH=6mA
VCC=4.5V, IOH=-20μA
VCC=4.5V, IOH=-4mA
VCC=4.5V, IOL=20μA
VCC=4.5V, IOH=4mA
4.4
4.499
4.3
High-Level Output Voltage,QA-QH
Low-Level Output Voltage,QA-QH
High-Level Output Voltage,QH’
Low-Level Output Voltage,QH’
VOH
VOL
VOH
VOL
3.98
V
0.001
0.17
4.499
4.3
0.1
V
0.26
V
4.4
V
3.98
V
0.001
0.17
0.1
V
0.26
V
Input Leakage Current
II(LEAK) VCC=5.5V, VIN=VCC or GND
±0.1 ±100
±0.01 ±0.5
8
nA
μA
μA
Output OFF -state current
Quiescent Supply Current
IOZ
ICC
VCC=5.5V, VOUT=VCC or GND
VCC=5.5V, VIN=VCC or GND, IOUT=0
One input at VCC -2.1V,other inputs
at 0 or VCC
△ICC
Additional Quiescent Supply Current
Input Capacitance
100
3
450
10
uA
pF
CIN
VCC=5.5V, VIN=VCC or GND
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U74HCT595
CMOS IC
DYNAMIC CHARACTERISTICS(Ta=25°С, CL=50pF,RL=1kΩ,unless otherwise specified)
PARAMETER
SYMBOL
f(MAX)
TEST CONDITIONS
VCC=4.5V
MIN TYP MAX UNIT
Maximum clock pulse frequency
Propagation delay from input
(RCLK) to output(Qn)
30
52
MHz
t
t
PHL/tPLH
PLH/tPHL
VCC=4.5V
VCC=4.5V
24
40
42
ns
Propagation delay from input
(SRCLK) to output(QH’)
24
21
ns
ns
3-state output enable time from input
tPZH/tPZL
tPHZ/tPLZ
tPHL
VCC=4.5V
VCC=4.5V
VCC=4.5V
35
30
40
( OE ) to output(Qn)
3-state output disable time from
input ( OE ) to output(Qn)
Propagation delay from input
18
23
ns
ns
( SRCLR ) to output(QH’)
Output transition time, QH’
Output transition time, Qn
tTLH/ tTHL
tTLH/ tTHL
VCC=4.5V
VCC=4.5V
8
8
15
12
ns
ns
OPERATING CHARACTERISTICS
PARAMETER
Power Dissipation Capacitance
SYMBOL
CPD
TEST CONDITIONS
No Load
RATINGS
400
UNIT
pF
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U74HCT595
CMOS IC
TEST CIRCUIT AND WAVEFORMS
VCC
K1
From Output
RL
CL
K2
(Note)
Note: CL includes probe and jig capacitance.
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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