U74HC595AL-R16-R [UTC]
8-BIT SERIAL-IN SHIFT REGISTER;型号: | U74HC595AL-R16-R |
厂家: | Unisonic Technologies |
描述: | 8-BIT SERIAL-IN SHIFT REGISTER |
文件: | 总8页 (文件大小:248K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
U74HC595A
CMOS IC
8-BIT SERIAL-IN SHIFT
REGISTER WITH LATCHED
3-STATE PARALLEL OUTPUTS,
PROVIDING SERIAL OUTPUT
DESCRIPTION
The UTC 74HC595A contains an 8-bit register with
asynchronous reset input and an 8-bit latch with output. The Serial
Data Input (SER) will shift into the internal shift register during every
LOW-to-HIGH transition on the Shift Clock. The latch will latch the
8-bit data from the shift register during the LOW-to-HIGH transition
on the Latch Clock. The shift register also provides a serial output.
FEATURES
* Operation Voltage Range: 2~6V
* High Noise Immunity
* Output Compatibility with CMOS and TTL
* Specified from -40 ~ +125°C
ORDERING INFORMATION
Ordering Number
Lead Free
Package
Packing
Halogen Free
U74HC595AL-D16-T
U74HC595AL-S16-R
U74HC595AL-S16N-R
U74HC595AL-R16-R
U74HC595AL-P16-R
U74HC595AG-D16-T
U74HC595AG-S16-R
U74HC595AG-S16N-R
U74HC595AG-R16-R
U74HC595AG-P16-R
DIP-16
SOP-16
Tube
Tape Reel
Tape Reel
Tape Reel
Tape Reel
SOP-16N
SSOP-16
TSSOP-16
U74HC595AG-D16-T
(1) T: Tube, R: Tape Reel
(1)Packing Type
(2)Package Type
(3)Green Package
(2) D16: DIP-16, S16: SOP-16, S16N: SOP-16N
R16: SSOP-16, P16: TSSOP-16
(3) G: Halogen Free and Lead Free, L: Lead Free
MARKING
DIP-16
SOP-16 / SOP-16N / SSOP-16 / TSSOP-16
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U74HC595A
CMOS IC
PIN CONFIGURATION
FUNCTION TABLE
INPUTS
OE
OUTPUTS
QH’ Qn
FUNCTION
SRCLK
X
RCLK
X
SRCLR
L
SER
X
A Low-Level on SRCLR only affects the shift
registers.
L
L
NC
Empty shift register loaded into storage register.
Shift register clear. Parallel outputs in
high-impedance OFF-state
X
X
↑
L
L
L
X
X
L
L
L
Z
X
H
Logic high level shifted into the first shift register.
Contents of all shift register stages shifted through,
e.g. previous state of stage G(internal QG’) appears
on the serial output(QH’).
↑
X
L
H
H
QG’ NC
Contents of shift register stages (internal Qn’) are
transferred to the storage register and parallel
output stages.
X
↑
↑
L
L
H
H
X
X
NC Qn’
QG’ Qn’
Contents of shift register shifted through. Previous
contents of the shift register is transferred to the
storage register and the parallel output stages.
Note:H : HIGH voltage level.
↑
L
X
Z
: LOW voltage level.
: Don’t care.
: High impedance OFF-state.
NC: No change.
↑
↓
: Low-to-High transition.
: High-to-Low transition.
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U74HC595A
CMOS IC
LOGIC DIAGRAM
SRCLR
SRCLK
R
R
R
R
R
R
R
R
D
D
D
D
D
D
D
D
SER
SRA
Q
SRB
SRC
Q
SRD
Q
SRE
SRF
SRG
SRH
Q
Q
Q
Q
Q
RCLK
D
LRE
Q
D
D
LRG
Q
D
LRH
Q
D
LRA
Q
D
D
D
LRF
Q
LRB
Q
LRC
Q
LRD
Q
QH’
OE
QA
QB
QC
QD
QE
QF
QG
QH
TIMING DIAGRAM
SRCLK
SER
RCLK
SRCLR
OE
Z
Z
Z
Z
Z
Z
Z
Z
QA
QB
QC
QD
QE
QF
QG
QH
QH’
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U74HC595A
CMOS IC
ABSOLUTE MAXIMUM RATING (unless otherwise specified)(Note 2)
PARAMETER
SYMBOL
VCC
RATINGS
-0.5~7.0
±20
UNIT
V
Supply Voltage
Input Clamp Current (VIN <0)
Output Clamp Current (VOUT <0)
Output Current
IIK
mA
mA
mA
mA
mW
mW
mW
IOK
±20
IOUT
ICC
±35
VCC or GND Current
±75
DIP-16
750
SOP-16
500
Power Dissipation
PD
SOP-16N
SSOP-16
TSSOP-16
550
450
mW
Storage Temperature
TSTG
-65 ~ +150
°C
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING COMDITIONS
PARAMETER
SYMBOL
VCC
MIN
2
TYP
MAX
6
UNIT
V
Supply Voltage
Input Voltage
VIN
0
VCC
VCC
125
1000
500
400
V
Output Voltage
VOUT
TA
0
V
Operating Temperature
-40
°C
ns
ns
ns
VCC=2V
VCC=4.5V
VCC=6V
Input Transition Rise or Fall Rate
∆t/∆v
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U74HC595A
CMOS IC
ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
VCC=2V
VCC=3V
1.5
2.1
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
HIGH-level input voltage
LOW-lever output voltage
VIH
VCC=4.5V
CC=6V
3.15
4.2
V
VCC=2V
VCC=3V
VCC=4.5V
0.5
0.9
VIL
1.35
1.8
VCC=6V
VCC=2V, IOH=-20μA
VCC=4.5V, IOH=-20μA
VCC=6V, IOH=-20μA
VCC=3V, IOH=-2.4mA
VCC=4.5V, IOH=-6mA
VCC=6V, IOH=-7.8mA
VCC=2V, IOL=20μA
1.9
4.4
2.0
4.5
6.0
5.9
High-Level Output Voltage, QA-QH
Low-Level Output Voltage, QA-QH
High-Level Output Voltage, QH
Low-Level Output Voltage, QH
VOH
2.48
3.98
5.48
0.002 0.1
0.001 0.1
0.001 0.1
0.26
VCC=4.5V, IOL=20μA
VCC=6V, IOL=20μA
VOL
VOH
VOL
VCC=3V, IOL=2.4mA
VCC=4.5V, IOL=6mA
VCC=6V, IOL=7.8mA
VCC=2V, IOH=-20μA
VCC=4.5V, IOH=-20μA
VCC=6V, IOH=-20μA
VCC=3V, IOH=-2.4mA
VCC=4.5V, IOH=-4mA
VCC=6V, IOH=-5.2mA
VCC=2V, IOL=20μA
0.26
0.26
1.9
4.4
2.0
4.5
5.9
6.0
2.48
3.98
5.48
0.002 0.1
0.001 0.1
0.001 0.1
0.26
VCC=4.5V, IOL=20μA
VCC=6V, IOL=20μA
VCC=3V, IOL=2.4mA
VCC=4.5V, IOL=4mA
VCC=6V, IOL=5.2mA
VCC=6V, VIN=VCC or GND
VCC=6V, VOUT=VCC or GND
VCC=6V, VIN=VCC or GND, IOUT=0
VCC=6V, VIN=VCC or GND
0.26
0.26
Input Leakage Current
Output OFF -state current
Quiescent Supply Current
Input Capacitance
II(LEAK)
IOZ
±0.1 μA
±0.5 μA
ICC
4
μA
CIN
10
pF
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U74HC595A
CMOS IC
DYNAMIC CHARACTERISTICS
PARAMETER
SYMBOL
TEST CONDITIONS
VCC=2V
MIN TYP MAX UNIT
6
26
38
42
50
17
14
50
17
14
60
22
19
51
18
15
40
15
13
70
23
19
42
23
20
28
8
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Maximum clock pulse frequency
fmax
CL=50pF
VCC=4.5V
VCC=6V
30
35
VCC=2V
140
28
Propagation delay from input
(SRCLK) to output (QH’)
CL=50pF
CL=50pF
CL=150pF
CL=50pF
CL=50pF
CL=150pF
CL=50pF
CL=50pF
CL=150pF
CL=50pF
VCC=4.5V
VCC=6V
24
VCC=2V
140
28
tPD
VCC=4.5V
Propagation delay from input
(RCLK) to output (QA-QH)
VCC=6V
24
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
200
40
34
145
29
Propagation delay from input
( SRCLR ) to output (QH’)
tPHL
VCC=6V
25
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
135
27
23
Propagation delay from input ( OE )
to output (QA-QH)
ten
200
40
34
150
30
Propagation delay from input ( OE )
to output (QA-QH)
tdis
26
60
12
6
10
Propagation delay to output (QA-QH)
Propagation delay to output (QH’)
45
17
13
28
8
210
42
tt
VCC=6V
36
VCC=2V
75
VCC=4.5V
15
VCC=6V
6
13
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U74HC595A
CMOS IC
TIMING REQUIREMENTS (TA=25°С,unless otherwise specified)
PARAMETER SYMBOL TEST CONDITIONS
VCC=2V
VCC=4.5V
CC=6V
MIN TYP MAX UNIT
80
16
14
80
16
14
100
20
17
75
15
13
50
10
9
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Pulse duration, SRCLK or RCLK
high or low
V
tW
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
Pulse duration, SRCLR Low
Setup Time, SER before SRCLK↑
Setup Time, SRCLK↑ before RCLK↑
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
tSU
Setup Time, SRCLR low before
RCLK↑
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
VCC=2V
VCC=4.5V
VCC=6V
50
10
9
Setup Time, SRCLR high (inactive)
before SRCLK↑
3
Hold Time, SER after SRCLK↑
tH
3
3
OPERATING CHARACTERISTIC
PARAMETER
Power Dissipation Capacitance
SYMBOL
CPD
TEST CONDITIONS
No load
MIN TYP MAX UNIT
400
pF
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U74HC595A
CMOS IC
TEST CIRCUIT AND WAVEFORMS
Note: CL includes probe and jig capacitance. CL=50pF, RL=1KΩ
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all UTC products described or contained herein.
UTC products are not designed for use in life support appliances, devices or systems where malfunction
of these products can be reasonably expected to result in personal injury. Reproduction in whole or in
part is prohibited without the prior written consent of the copyright owner. UTC reserves the right to
make changes to information published in this document, including without limitation specifications and
product descriptions, at any time and without notice. This document supersedes and replaces all
information supplied prior to the publication hereof.
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