U3525G-S16-R [UTC]
REGULATING PWM IC;型号: | U3525G-S16-R |
厂家: | Unisonic Technologies |
描述: | REGULATING PWM IC |
文件: | 总10页 (文件大小:294K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
U3525
LINEAR INTEGRATED CIRCUIT
REGULATING PWM IC
DESCRIPTION
The UTC U3525 is a pulse width modulator IC and designed for
switching power supplies application to improve performance and
reduce external parts usage.
DIP-16
A shutdown terminal controls both the soft-start circuitry and the
output stages, providing instantaneous turn off through the PWM
latch with pulsed shutdown, as well as soft-start recycle with longer
shutdown commands. The output stage features NOR logic, giving
a LOW output for an OFF state. An under-voltage lockout circuitry,
which keeps the outputs off and the soft-start capacitor discharged
for sub-normal input voltages, includes approximately 500 mV of
hysteresis for jitter free operation. The PWM circuits also feature a
latch following the comparator. When a PWM pulses has been
terminated, the outputs will remain off for the duration of the period.
The latch is reset with each clock pulse. The output stages are
totem-pole designs capable of sourcing or sinking in excess of
200mA.
SOP-16
FEATURES
* Input Voltage: 8~35V
* On-chip +5.1V reference is trimmed to ±1%
* 100HZ ~ 500KHZ oscillator range
* Separate oscillator sync terminal
* Adjustable dead time control
* Internal soft-start
* Pulse-by-pulse shutdown
* Input under-voltage lockout with hysteresis
* Latching PWM to prevent multiple pulses
* Dual source/sink output drivers
ORDERING INFORMATION
Ordering Number
Package
Packing
Lead Free
Halogen Free
U3525G-D16-T
U3525G-S16-R
U3525L-D16-T
-
DIP-16
Tube
SOP-16
Tape Reel
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Copyright © 2016 Unisonic Technologies Co., Ltd
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U3525
LINEAR INTEGRATED CIRCUIT
MARKING
DIP-16
SOP-16
PIN CONNECTIONS (top view)
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U3525
LINEAR INTEGRATED CIRCUIT
BLOCK DIAGRAM
3
13
11
6
7
5
A
B
14
9
8
PWM
1
2
EA
50μA
12
10
5kΩ
5kΩ
15
VREF
16
FLIP/
FLOP
4
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LINEAR INTEGRATED CIRCUIT
ABSOLUATE MAXIUM RATINGS
PARAMETER
SYMBOL
RATINGS
UNIT
V
Supply Voltage
ViN
VC
IOSC
Io
40
40
Collector Supply Voltage
Oscillator Charging Current
Output Current, Source or Sink
Reference Output Current
Current through CT Terminal
Logic Inputs
V
5
mA
mA
mA
mA
V
500
IR
50
5
IT
- 0.3 ~ + 5.5
-0.3 ~ Vi
1000
Analog Inputs
V
Total Power Dissipation at Ta=70 °C
Junction Temperature
PD
TJ
mW
°C
-55 ~ +125
0 ~ +70
-65 ~ +150
Operating Ambient Temperature
Storage Temperature
TORP
TSTG
°C
°C
Note: Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
RECOMMENDED OPERATING CONDITIONS (NOTE)
PARAMETER
SYMBOL
VIN
RATINGS
8 ~ 35
UNIT
V
Input Voltage
Collector Supply Voltage
VC
4.5 ~ 35
0 ~ 100
V
Sink/Source Load Current (steady state)
Sink/Source Load Current (peak)
Reference Load Current
ISTEAD
IPEAK
ILOAD
FO
mA
mA
mA
Hz
KΩ
μF
Ω
0 ~ 400
0 ~ 20
Oscillator Frequency Range
Oscillator Timing Resistor
100 ~ 400K
2 ~ 150
RO
Oscillator Timing Capacitor
Dead Time Resistor Range
CO
0.001 ~ 0.1
0 ~ 500
RT
Note: Range over which the device is functional and parameter limits are guaranteed.
THERMAL DATA
PARAMETER
Thermal Resistance Junction-ambient
SYMBOL
θJA
RATING
80
UNIT
°C/W
°C/W
DIP16
SOP-16
θJA
50
Note: Thermal resistance junction-alumina with the device soldered on the middle of an alumina supporting substrate
measuring 15×20 mm; 0.65 mm thickness with infinite heat sink.
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U3525
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (VIN= 25V, unless otherwise specified)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
REFERENCE SECTION
Output Voltage
VREF
TJ= 25°C
5
5.1
5.2
5.25
50
V
Total Output Variation (Note 1)
Long Term Stability (Note 1)
Line Regulation
Line, Load and Temperature
TJ= 125°C, 1000 hrs
VIN= 8 ~ 35 V
4.95
V
△VREF
△VREF
20
10
20
20
40
80
mV
mV
mV
mV
20
△VREF
Load Regulation
IL = 0 ~ 20 mA
50
△VREF/△T
Temp. Stability (Note 1)
Output Noise Voltage (Note 1)
Short Circuit Current
Over Operating Range
10 Hz ≤ f ≤ 10 kHz, TJ = 25°C
VREF = 0, TJ = 25°C
50
200 μVrms
100
mA
OSCILLATOR SECTION
Clock Amplitude (Note 1, 2)
Sync Threshold
3
3.5
2
V
V
1.2
2.8
2.5
2.2
Sync Input Current
Sync Voltage = 3.5 V
IRT = 2 mA
1
mA
mA
KHz
Hz
μs
%
Current Mirror
1.7
2
Maximum Frequency
Minimum Frequency
fMAX
fMIN
RT = 2 KΩ, CT = 470 pF
RT = 200KΩ, CT = 0.1μF
TJ = 25°C
400
120
1
Clock Width (Note 1, 2)
Initial Accuracy (Note 1, 2)
Voltage Stability (Note 1, 2)
Temperature Stability (Note 1)
0.3
0.5
±2
±1
±3
TJ = 25°C
±6
±2
±6
VIN = 8 ~ 35 V
%
△f /△T
Over Operating Range
%
ERROR AMPLIFIER SECTION (VCM = 5.1 V)
Output Low Level
0.2
5.6
2
0.5
V
V
Output High Level
3.8
Input Offset Voltage
VOS
10
10
1
mV
μA
µA
dB
dB
dB
ms
MHz
Input Bias Current
Ib
1
Input Offset Current
Ios
Comm. Mode Reject.
CMR
PSR
VCM = 1.5 ~ 5.2 V
VIN = 8 ~ 35 V
60
50
60
1.1
1
75
60
75
1.5
2
Supply Voltage Rejection
DC Open Loop Gain
RL ≥10 MΩ
DC Transconduct. (Note 1, 3)
Gain Bandwidth Product (Note 1)
PWM COMPARATOR
30 KΩ ≤RL≤1 MΩ, TJ = 25°C
Gv = 0 dB, TJ = 25°C
Zero Duty-cycle
0.7
0.9
3.3
V
V
Input Threshold (Note 2)
Maximum Duty-cycle
3.6
1
Input Bias Current (Note 1)
Minimum Duty-cycle
0.05
µA
%
%
0
Maximum Duty-cycle (Note 2)
SHUTDOWN SECTION
Soft Start Low Level
45
49
VSD = 2.5 V
0.4
0.8
0.4
50
0.7
1
V
V
Shutdown Threshold
To outputs, VSS = 5.1 V, TJ = 25°C
VSD = 2.5 V
0.6
25
Shutdown Input Current
Soft Start Current
1
mA
µA
μs
VSD = 0 V, VSS = 0 V
VSD = 2.5 V, TJ = 25°C
80
0.5
Shutdown Delay (Note 1)
0.2
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LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
OUTPUT DRIVERS (each output) (VC = 20 V)
ISINK = 20 mA
0.2
1
0.4
2
V
V
Output Low Level
ISINK = 100 mA
ISOURCE = 20 mA
ISOURCE = 100 mA
VCOMP and VSS = High
VC = 35 V
18
17
6
19
18
7
V
Output High Level
V
Under-Voltage Lockout
8
V
Collector Leakage
IC
tR
tF
200
600
300
µA
ns
ns
Rise Time (Note 1)
Fall Time (Note 1)
CL = 1 nF, TJ = 25°C
CL = 1 nF, TJ = 25°C
100
50
TOTAL STANDBY CURRENT
Supply Current
IS
VIN = 35 V
14
20
mA
Notes: 1. The parameters are not 100% tested in production.
2. Tested at fosc=40 KHz (RT=3.6 KΩ, CT=10nF, RD=0 Ω). Approximate oscillator frequency is defined by :
3. DC transconductance (gM) relates to DC open-loop voltage gain (GV) according to the following equation:
GV=gM RL where RL is the resistance from pin 9 to ground. The minimum gM specification is used to calculate
minimum GV when the error amplifier output is loaded.
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U3525
LINEAR INTEGRATED CIRCUIT
TEST CIRCUIT
VREF
+V1
0.1μF
VC
15
13
11
0.1μF
CLOCK
4
0.1μF
3kΩ
OUTA
SYNC
3
6
1KΩ
RT
3.6kΩ
PWM
ADJ.
10kΩ
1W
1KΩ
DEAD
TIME
1W
UTC
U3525
14
12
7
5
9
OUT B
9nF
RAMP
100Ω
1.5kΩ
CT
GND
COMP
10kΩ
1nF
0.1μF
SOFT
START
1
0.01μF
8
2
2
1
5μF
3
3
VREF
V/I METER
10
1
1
2
2
2
SHUT
DOWN
2kΩ
V
OS = 1
(+) = 2
(-) = 3
3
3
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LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION AND CIRCUIT
SHUTDOWN OPTIONS (see Block Diagram)
Since both the compensation and soft-start terminals (Pins 9 and 8) have current source pull-ups, either can
readily accept a pull-down signal which only has to sink a maximum of 100μA to turn off the outputs. This is subject
to the added requirement of discharging whatever external capacitance may be attached to these pins.
An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance the
available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions: the
PWM latch is immediately set providing the fastest turn-off signal to the outputs; and a 150μA current sink begins to
discharge the external soft-start capacitor. If the shutdown command is short, the PWM signal is terminated without
significant discharge of the soft-start capacitor, thus, allowing, for example, a convenient implementation of
pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, will ultimately discharge this
external capacitor, recycling slow turn-on upon release.
Pin 10 should not be left floating as noise pickup could conceivably interrupt normal operation.
OSCILLATOR SCHEMATIC
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LINEAR INTEGRATED CIRCUIT
APPLICATION INFORMATION AND CIRCUIT(Cont.)
OUTPUT CIRCUIT (1/2 CIRCUIT SHOWN)
ERROR AMPLIFIER
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U3525
LINEAR INTEGRATED CIRCUIT
TYPICAL CHARACTERISTICS
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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