3513F-D16-T [UTC]
PC POWER SUPPLY SUPERVISOR; PC电源监控器![3513F-D16-T](http://pdffile.icpdf.com/pdf1/p00166/img/icpdf/3513F_926375_icpdf.jpg)
型号: | 3513F-D16-T |
厂家: | ![]() |
描述: | PC POWER SUPPLY SUPERVISOR |
文件: | 总12页 (文件大小:268K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
UNISONIC TECHNOLOGIES CO., LTD
3513
CMOS IC
PC POWER SUPPLY
SUPERVISOR
DESCRIPTION
The UTC 3513 is designed to provide protection circuits,
power good output (PGO) indicator, fault protection output
(FPOB) and a PSONB control for PC switching power supply
systems.
The protection circuits include over voltage protection
(OVP), under voltage protection (UVP) and over current
protection(OCP) monitoring for 3.3V, 5V and two 12V.
When 3.3V, 5V or 12V voltage is decreasing to 2.68V, 4.3V
and 9.9V respectively, the under voltage protection (UVP)
function will be enabled. FPO will be set to high to turn off the
PWM controller IC. Toggling the PSONB from low to high will
reset the fault protection latch.
The voltage difference across external current shunt is used
for OCP functions. An external resistor can be used to adjust
protection threshold.
* Pb-free plating product number: 3513EL/3513FL
The power supply is turned on after 38mS delay time when
PSONB signal is set from high to low. To turn off power
supply, PSONB signal is set from low to high with the delay
time 38mS. The PGI circuitry provides a power-down warning
signal for PGO. When PGI input is lower than the internal
1.20V reference voltage, PGO signal is pulled low.
The device is available in two versions: UTC 3513E/3513F.
Specially, fan control function is available in OTP/FC pin of
UTC 3513F.
FEATURES
* OVP/UVP monitors 3.3V, 5V, 12V input voltage level.
* OCP monitors IS33, IS5, IS12 input current sense.
* Fault protection output (FPOB) with Open Drain Output
stage.
* Power good output (PGO) with Open Drain Output stage.
* 38ms de-bounce time for PSONB input signal.
* 300ms time delay from PGI to PGO.
* 2.4ms time delay for PSONB to turn off FPOB.
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3513
CMOS IC
ORDERING INFORMATION
Order Number
Lead Free Plating
Package
Packing
Normal
3513E-D16-T
3513E-S16-R
3513E-S16-T
3513F-D16-T
3513F-S16-R
3513F-S16-T
3513EL-D16-T
3513EL-S16-R
3513EL-S16-T
3513FL-D16-T
3513FL-S16-R
3513FL-S16-T
DIP-16
SOP-16
SOP-16
DIP-16
Tube
Tape Reel
Tube
Tube
SOP-16
SOP-16
Tape Reel
Tube
3513EL-D16-T
(1)Packing Type
(2)Package Type
(3)Lead Plating
(1) R: Tape Reel, T: Tube
(2) D16: DIP-16, S16: SOP-16
(3) L: Lead Free Plating, Blank: Pb/Sn
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3513
CMOS IC
PIN ASSIGNMENT
3513E
1
2
3
4
5
6
7
8
16
PGI
PGO
GND
15
14
VDD
VS5
FPOB
13
12
11
10
9
PSONB
OTP
RI
IS5
VS33
IS33
VS12A
IS12A
VS12B
IS12B
3513F
1
2
3
4
5
6
7
8
16
PGI
PGO
GND
15
14
VDD
VS5
FPOB
13
12
11
10
9
PSONB
OTP/FC
RI
IS5
VS33
IS33
VS12A
IS12AB
VS12B
PWM
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CMOS IC
FUNCTION DESCRIPTION(1)
T(PSONB ON)/
T(PSONB OFF)
38ms
ORDERING
OTP low level
OTP high level
FC/PWM
tg2
3513E
3513F
2.45V
2.45V
3.25V
3.25V
X
○
73µs
73µs
38ms
FUNCTION DESCRIPTION(2)
PGI
PSONB
UV&OC Protection OV Protection
FPOB
PGO
PGI<1.2V
PGI<1.2V
PGI<1.2V
PGI<1.2V
PGI>1.2V
PGI>1.2V
PGI>1.2V
PGI>1.2V
X
L
L
L
L
L
L
L
L
H
No
No
No
Yes
No
L
H
L
L
L
L
L
H
L
L
L
L
Yes
Yes
No
Yes
No
H
L
No
Yes
No
H
H
H
H
Yes
Yes
X
Yes
X
Note: FPOB=L means: fault is not latched. FPOB=H means: fault is latched
PGO=L means: fault. PGO=H means: No fault
X=do not care
PIN DESCRIPTIONS
PIN NO
PIN NAME
PGI
TYPE
Input
DESCRIPTION
Power Good Input. For ATX SMPS, it detects AC line voltage through
the main transformer.
1
2
3
GND
Supply
Output
Ground
Fault Protection Output. Output signal to control the primary PWM IC
through an opto-coupler. When FPOB is low, the PWM IC is enabled.
Remote On/Off logic input from CPU or main-board. The power
supply will be turned on/off after 38mS delay.
Over temperature protection/Fan speed control
Reference setting. One external resistor Ri connected between RI
and GND pin will determine a reference current, IREF = 1.20/Ri, for
OCP programming.
FPOB
4
5
PSONB
OTP/FC
Input
Input
6
RI
Input
7
8
VS12B
Input
Input
Output
Input
Input
Input
Input
Input
Input
Input
Supply
12V over/under voltage protection.
IS12B
PWM**
IS12A
*
12V over current protection.
8
Pulse width modulation.
9
*
12V over current protection.
9
IS12AB**
VS12A
IS33
12V over current protection.
10
11
12
13
14
15
12V over/under voltage protection.
3.3V over current protection
VS33
IS5
3.3V over/under voltage protection
5V over current protection.
VS5
5V over/under voltage protection.
VDD
Power supply.
Power good logic output, 0 or 1(open-drain). Power good=1 means
that the power supply is good for operation. The power good delay is
300mS.
16
PGO
Output
* 3513E only
** 3513F only
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3513
CMOS IC
BLOCK DIAGRAM
VDD
RST
PGO
+
PGI
300ms
delay
73 µs
debounce
UN
clr
-
Bandgap
Reference
V
REF=1.2V
V12A
+
I
S33
-
IREF*8
73 µs
debounce
FPOB
R Q
S Q
VS33
+
OV
-
+
UN
-
Internal
Power
V12A
Power On Reset
PWR
IS12A
+
VCCI=3.6
V
-
IREF*8
2.4ms
delay
38 ms
debounce
PSONB
OTP
+
VS12A
OV
-
75ms/ 300ms
delay
+
2.4V~3.2V
UN
-
V12A
PWR
OSC
IS12B
+
-
IREF*8
CLK
+
OV
VS12B
-
+
UN
V12A
-
V12A
IS5
+
+
-
VREF=1.2V
-
IREF*8
RI
+
VS5
OV
-
+
UN
-
Figure 1. 3513E
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CMOS IC
BLOCK DIAGRAM(Cont.)
VDD
RST
PGO
+
300ms
delay
73µs/
debounce
PGI
UN
clr
-
Bandgap
Reference
VREF=1.2V
V12A
+
IS33
-
73µs
debounce
IREF*8
FPOB
R Q
S Q
VS33
+
OV
-
+
UN
-
Internal
Power
V12A
Power On Reset
PWR
VCCI=3.6V
+
IS12AB
VS12A
-
2.4ms
delay
IREF*8
38ms
debounce
PSONB
OTP/FC
+
OV
-
75ms/300ms
delay
2.4V~3.2V
+
-
UN
V12A
+
-
IREF*8
+
PWM
-
+
OV
-
VS12B
+
-
PWR
OSC
UN
V12A
CLK
+
IS5
-
IREF*8
V12A
+
VS5
OV
-
+
-
VREF=1.2V
+
-
UN
RI
Figure 2. 3513F
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3513
CMOS IC
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
-0.3 ~ 16
-0.3 ~ 7
UNIT
Supply Voltage
Input Voltage
VDD
V
V
V
VS5,VS33
VS12A, VS12B
IS12A, IS12B, IS5, IS33
PSONB, PGI, OTP
FPOB
-0.3 ~ 16
VIN
-0.3 ~ V12A+0.3
-0.3 ~ 7
V
V
-0.3 ~ VDD+0.3
-0.3 ~ VDD+0.3
-40 ~ +125
V
Output Voltage
VOUT
PGO
V
℃
℃
Operating Temperature
Storage Temperature
TOPR
TSTG
-55 ~ +150
Note 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. Stress above those listed may cause permanent damage to the devices.
RECOMMENDED OPERATING CONDITIONS
PARAMETER
SYMBOL MIN
TYP MAX UNIT
Supply Voltage
Input Voltage
VDD
4
12
15
7
V
V
VS5,VS33
VS12A, VS12B
IS12A, IS12B, IS5, IS33
PSONB, PGI,OTP
FPOB
15
15
7
V
VIN
V
V
7
V
Output Voltage
VOUT
PGO
7
V
FPOB
30
10
65
mA
mA
uA
ms
Output Sink Current
IO(SINK)
PGO
RI Output Current
IO(RI)
tR
10
1
Supply Voltage Rising Time (VDD
)
ELECTRICAL CHARACTERISTICS (Ta=25℃and VDD=5V and V12A=12V)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Over Voltage Detection
V12A, V12B
V5
13.2
5.7
13.8
5.95
3.9
14.4
6.2
4.1
0.3
0.7
5
V
V
V
Over Voltage Threshold
V33
3.7
@ ISINK=10mA
Low Level Output Voltage (FPOB)
VOL
V
@ ISINK=30mA
@ V(FPOB)=5V
Output Leakage Current (FPOB)
PSONB
ILEAK
uA
High-Level Input Voltage
Low-Level Input Voltage
Input Pull-up Current
PGI and PGO
VIH
VIL
IIN
2
V
V
0.8
@ PSONB=0V
100
uA
V12A, V12B
V5
9.5
9.90
4.30
2.68
1.20
10.5
4.45
2.82
1.24
0.4
V
V
Under Voltage Threshold
4.15
2.54
1.16
V33
V
Input Threshold Voltage (PGI)
Low Level Output Voltage (PGO)
Output Leakage current (PGO)
OTP/FC
VI(THD)
VOL
V
@ ISINK=10mA
@ PGO=5V
V
ILEAK
5
uA
High-Level Input Voltage (OTP)
Low-Level Input Voltage (OTP)
Start-up Voltage (FC)
VIH
VIL
3513E/3513F
3.10
2.30
0.7
3.25
2.45
0.8
3.40
2.60
0.9
V
V
V
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3513
CMOS IC
ELECTRICAL CHARACTERISTICS (Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
0.55
TYP
0.65
MAX
UNIT
V
Stop Voltage (FC)
0.75
PWM
High Level Output Voltage
Low Level Output Voltage
Output Leakage Current
PWM Frequency
VOH
VOL
@ ISOURCE=4.5mA
@ ISINK=4.5mA
V12A-0.4
28
V
V
0.4
5
ILEAK
fPWM
µA
KHz
35
42
SWITCHING CHARACTERISTICS
PSONB ON(PSONB Low to FPOB
Low)
T(PSONB ON) @ VDD=5V
T(PSONB OFF) @ VDD=5V
32
32
38
38
62
62
ms
ms
PSONB OFF(PSONB Hi to PGO
Low)
PGI to PGO Delay Time
TPG
@ VDD=5V
200
2.0
65
300
2.4
75
490
4
ms
ms
ms
ms
µs
Timing PGO Low to FPO high
TPSOFF @ VDD=5V
TUVP1
TUVP2
tg1
@ FPOB=Low & PGI > 1.2V
@ FPOB=Low & PGI < 1.2V
122
488
120
120
UVD/OCD turn on delay Time
260
63
300
75
Noise Deglitch Time
Noise Deglitch Time for Latch
TOTAL DEVICE
tg2
63
75
µs
Low Voltage
VDD
IDD
3.6
V
Supply Current
@ PSONB=5V
1
mA
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CMOS IC
APPLICATION CIRCUIT
5VSB
5V
3513E
3KΩ
100Ω
16
1
2
PGI
PGI
PGO
0.01μF
15
14
GND
VDD
10KΩ
3
4
VS5
FPOB
47Ω
300
13
12
PSONB
IS5
PSONB
IS5
VS33
IS33
+3.3V
0.01μF
5
6
OTP
OTP
RI
RI
11
IS33
7
8
10
9
12VB
12VA
IS12A
VS12B
VS12A
IS12A
IS12B
IS12B
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CMOS IC
APPLICATION CIRCUIT(Cont.)
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CMOS IC
TYPICAL TIMMING DIAGRAM
1) PGI (UNDER-VOLTAGE):
2) V33, V5, V12A, V12B (UNDER-VOLTAGE) or IS33, IS5, IS12A, IS12B (OVER-CURRENT):
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CMOS IC
TYPICAL TIMMING DIAGRAM
3) V33, V5, V12A, V12B (OVER-VOLTAGE).
4) OTP/FC, PWM, FPOB:
(at VDD=5V, PSONB=0V, V12A, V12B =12V, V5=5V, V33=3.3V)
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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